I2c producing crazy console messages [[Re: insanely-high interrupt rates -- PARTIAL resolution (Pi2)]]

[Ian Lepore]

On Sat, 2019-04-20 at 12:39 +0200, Per Hedeland wrote:
> On 2019-04-19 18:04, Ian Lepore wrote:
> > On Fri, 2019-04-19 at 13:32 +0200, Per Hedeland wrote:
> > > But anyway I would be *extremely* surprised if I saw them, since
> > > AFAIU
> > > the i2c bus per se has no concept of interrupts - you need to
> > > connect
> > > some other wire from the device to e.g. a gpio pin (with
> > > appropriate
> > > config) in order to generate interrupts - and I haven't done
> > > that.
> > > (The
> > > ads1015 does have an ALERT/RDY pin that could potentially be used
> > > for
> > > it, but since FreeBSD AFAIK doesn't have a way to deliver the
> > > interrupts to userland code, I had no interest in it.)
> > 
> > You're thinking about this all wrong.  The interrupts have nothing
> > to
> > do with the i2c bus, but the i2c controller still uses interrupts
> > to
> > signal things like "trasnfer done" or "fifo empty".
> 
> OK...
> 
> > If there's nothing
> > on the bus, you don't end up doing any transfers, so you don't get
> > any
> > spurious interrupts.
> 
> That much is clear even to me, but I'm doing 128 transfers/second
> without seeing any spurious interrupts. But I guess my observation
> matches the second alternative in one of your earlier messages (where
> the first alternative, as far as I understood, was about interrupts
> from the i2c device itself...) - i.e. interrupts being dispatched to
> multiple cores. This obviously can't happen on the RPi 0/1 that I've
> tried, since they're single-core.
> 
> 

Exactly so.  I did all my recent rpi i2c driver work using an old rpi1
so I never saw the problem.  Now I've got an rpi2, and oddly enough,
last night I finally saw a few spurious interrupts while writing to an
RTC chip (but never while reading from one).  I also now have an
ADS1015 in hand (gotta love amazon free same-day delivery).  So
hopefully today I can track this down, although without something like
jtag debugging, the only way to know if it's the "multiple cores
signalled at once" situation is to eliminate all other possibilities.

-- Ian