intpm: add support for AMD SBxxx SMBus controller

[John Baldwin]

On Tuesday 08 September 2009 4:09:32 pm Andriy Gapon wrote:
> on 08/09/2009 20:35 John Baldwin said the following:
> > On Sunday 06 September 2009 4:36:26 pm Andriy Gapon wrote:
> >> Please review the included patch that adds support from SMBus controller found
> >> in AMD SB600/700/710/750 south-bridges (not sure about SB800).
> >> As I understand, this controller works only in polling mode, so support for this
> >> mode was enabled in the code.
> >>
> >> There are two places that I was not sure about, so I marked them with XXX.
> >> The static variable intsmb_cfg_irq9 would be problematic if there are multiple
> >> SMBus controllers in a system.
> > 
> > I would move this into the softc and set it in the attach() routine by
> > duplicating that bit of the switch() statement in attach().
> 
> OK, thank you for the idea.
> 
> >> Also, PCI_INTR_SMB_IRQ_AMD is probably not the best name. Maybe something like
> >> PCI_INTR_SMB_IRQ_OTHER or just PCI_INTR_SMB_IRQ would be better?
> > 
> > I would maybe just change the driver to print the value in hex instead of
> > bogus and not add a #define for '2'.  The PIIX4 datasheet says '2' is a
> > reserved value for that field FWIW.
> 
> But, OTOH, SB700 datasheet says '2' is a regular interrupt.
> Although it is quite unclear from that datasheet what that interrupt might be
> and if interrupt-driven configuration is possible at all.

Does it have a valid intpin config register?  Maybe '2' means it has a legacy
INTx PCI interrupt.

-- 
John Baldwin