I submitted https://github.com/llvm/llvm-project/issues/62383 (against main) for cortex-a78c and cortex-x1c

From: Mark Millard <marklmi_at_yahoo.com>
Date: Wed, 26 Apr 2023 20:45:03 UTC
I have submitted:

https://github.com/llvm/llvm-project/issues/62383

against LLVM main for cortex-a78c and cortex-x1c
having 4 default features messed up for the likes
of use of at least one of:

-mcpu=coretex-a78c
and:
-mcpu=coretex-x1c

(the core types in the Windows Dev Kit 2023).

Things are somewhat different in LLVM15 and I'm not
sure about the LLVM16 details but there are still
problems. But as there were already some attempts at
fixing cortex-x1c in main I did not bother with the
LLVM15/LLVM16 contexts for the submittal. I'm hoping
that, if/when fixes are made, backporting whatever
is in place atthe time would probably be doable.

One presentation of the details of the status in
main for what I found in LLVM's main is:

QUOTE
ID_AA64ISAR0_EL1 TS, bits [55:52] = 0b0001 (FEAT_FlagM)
but LLVM git main still has cortex-x1c with AArch64::AEK_FLAGM
missing in AArch64TargetParser.h --yet correctly has FeatureFlagM
in AArch64.td .
It seems -mcpu=cortex-x1c+flagm notation is best used
explicitly as things are.

ID_AA64ISAR0_EL1 FHM, bits [51:48] = 0b0000 (no FEAT_FHM/no fp16fmll)
but git main still has cortex-a78c with AArch64::AEK_FP16FML in
AArch64TargetParser.h and FeatureFP16FML in AArch64.td .
I seems -mcpu=cortex-a78c+nofp16fml notation is best used
explicitly as things are.

ID_AA64ISAR1_EL1 LRCPC, bits [23:20] = 0b0010 (FEAT_LRCPC2)
but LLVM git main still has cortex-a78c with FeatureRCPC (FEAT_LRCPC)
in AArch64.td instead of FeatureRCPC_IMMO (FEAT_LRCPC2).
No notation in AArch64TargetParser.h refers to FEAT_LRCPC2
so no -mcpu=cortex-a78c+??? can cause the FEAT_LRCPC2 status.

ID_AA64MMFR2_EL1 AT, bits [35:32] = 0b0001 (FEAT_LSE2)
but LLVM git main still has cortex-a78c with FeatureLSE2 (FEAT_LSE2)
missing in AArch64.td . Nothing in AArch64TargetParser.h refers to
FEAT_LSE2 so no -mcpu=cortex-a78c+??? can cause the FEAT_LSE2
status.
END QUOTE 

The materials that the above is based on are:

arm_cortex_a78c_core_trm_102226_0002_03_en.pdf (the "a78c .pdf")
arm_cortex_x1c_core_trm_101968_0002_04_en.pdf (the "x1c .pdf")
DDI0487_I_a_a-profile_architecture_reference_manual.pdf

https://github.com/llvm/llvm-project/blob/main/llvm/include/llvm/TargetParser/AArch64TargetParser.h
https://github.com/llvm/llvm-project/blob/main/llvm/lib/Target/AArch64/AArch64.td

(The first two .pdf's indicate specific field values to look
at in the 3rd .pdf .)

===
Mark Millard
marklmi at yahoo.com