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Hermes SMTP Server) with ESMTPA ID b45bf486a2a996065fc5e5d3c32d3eb8; Wed, 26 Apr 2023 20:45:15 +0000 (UTC) From: Mark Millard Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: quoted-printable List-Id: Porting FreeBSD to ARM processors List-Archive: https://lists.freebsd.org/archives/freebsd-arm List-Help: List-Post: List-Subscribe: List-Unsubscribe: Sender: owner-freebsd-arm@freebsd.org Mime-Version: 1.0 (Mac OS X Mail 16.0 \(3731.400.51.1.1\)) Subject: I submitted https://github.com/llvm/llvm-project/issues/62383 (against main) for cortex-a78c and cortex-x1c Message-Id: <04C5E972-250B-4E71-94EA-01496FBAF194@yahoo.com> Date: Wed, 26 Apr 2023 13:45:03 -0700 To: freebsd-arm , FreeBSD Toolchain X-Mailer: Apple Mail (2.3731.400.51.1.1) References: <04C5E972-250B-4E71-94EA-01496FBAF194.ref@yahoo.com> X-Spamd-Result: default: False [-2.92 / 15.00]; NEURAL_HAM_MEDIUM(-1.00)[-1.000]; NEURAL_HAM_LONG(-1.00)[-1.000]; MV_CASE(0.50)[]; DMARC_POLICY_ALLOW(-0.50)[yahoo.com,reject]; NEURAL_HAM_SHORT(-0.42)[-0.419]; R_DKIM_ALLOW(-0.20)[yahoo.com:s=s2048]; R_SPF_ALLOW(-0.20)[+ptr:yahoo.com]; MIME_GOOD(-0.10)[text/plain]; ARC_NA(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_HAS_DN(0.00)[]; TO_MATCH_ENVRCPT_SOME(0.00)[]; DWL_DNSWL_NONE(0.00)[yahoo.com:dkim]; BLOCKLISTDE_FAIL(0.00)[98.137.66.146:query timed out]; MID_RHS_MATCH_FROM(0.00)[]; ASN(0.00)[asn:36647, ipnet:98.137.64.0/20, country:US]; RCVD_IN_DNSWL_NONE(0.00)[98.137.66.146:from]; TO_DN_ALL(0.00)[]; RCVD_COUNT_THREE(0.00)[3]; FREEMAIL_FROM(0.00)[yahoo.com]; RCVD_TLS_LAST(0.00)[]; DKIM_TRACE(0.00)[yahoo.com:+]; FROM_EQ_ENVFROM(0.00)[]; RCPT_COUNT_TWO(0.00)[2]; FREEMAIL_ENVFROM(0.00)[yahoo.com]; MIME_TRACE(0.00)[0:+]; MLMMJ_DEST(0.00)[freebsd-arm@freebsd.org] X-Rspamd-Queue-Id: 4Q69qM6x7pz4Pk9 X-Spamd-Bar: -- X-ThisMailContainsUnwantedMimeParts: N I have submitted: https://github.com/llvm/llvm-project/issues/62383 against LLVM main for cortex-a78c and cortex-x1c having 4 default features messed up for the likes of use of at least one of: -mcpu=3Dcoretex-a78c and: -mcpu=3Dcoretex-x1c (the core types in the Windows Dev Kit 2023). Things are somewhat different in LLVM15 and I'm not sure about the LLVM16 details but there are still problems. But as there were already some attempts at fixing cortex-x1c in main I did not bother with the LLVM15/LLVM16 contexts for the submittal. I'm hoping that, if/when fixes are made, backporting whatever is in place atthe time would probably be doable. One presentation of the details of the status in main for what I found in LLVM's main is: QUOTE ID_AA64ISAR0_EL1 TS, bits [55:52] =3D 0b0001 (FEAT_FlagM) but LLVM git main still has cortex-x1c with AArch64::AEK_FLAGM missing in AArch64TargetParser.h --yet correctly has FeatureFlagM in AArch64.td . It seems -mcpu=3Dcortex-x1c+flagm notation is best used explicitly as things are. ID_AA64ISAR0_EL1 FHM, bits [51:48] =3D 0b0000 (no FEAT_FHM/no fp16fmll) but git main still has cortex-a78c with AArch64::AEK_FP16FML in AArch64TargetParser.h and FeatureFP16FML in AArch64.td . I seems -mcpu=3Dcortex-a78c+nofp16fml notation is best used explicitly as things are. ID_AA64ISAR1_EL1 LRCPC, bits [23:20] =3D 0b0010 (FEAT_LRCPC2) but LLVM git main still has cortex-a78c with FeatureRCPC (FEAT_LRCPC) in AArch64.td instead of FeatureRCPC_IMMO (FEAT_LRCPC2). No notation in AArch64TargetParser.h refers to FEAT_LRCPC2 so no -mcpu=3Dcortex-a78c+??? can cause the FEAT_LRCPC2 status. ID_AA64MMFR2_EL1 AT, bits [35:32] =3D 0b0001 (FEAT_LSE2) but LLVM git main still has cortex-a78c with FeatureLSE2 (FEAT_LSE2) missing in AArch64.td . Nothing in AArch64TargetParser.h refers to FEAT_LSE2 so no -mcpu=3Dcortex-a78c+??? can cause the FEAT_LSE2 status. END QUOTE=20 The materials that the above is based on are: arm_cortex_a78c_core_trm_102226_0002_03_en.pdf (the "a78c .pdf") arm_cortex_x1c_core_trm_101968_0002_04_en.pdf (the "x1c .pdf") DDI0487_I_a_a-profile_architecture_reference_manual.pdf = https://github.com/llvm/llvm-project/blob/main/llvm/include/llvm/TargetPar= ser/AArch64TargetParser.h = https://github.com/llvm/llvm-project/blob/main/llvm/lib/Target/AArch64/AAr= ch64.td (The first two .pdf's indicate specific field values to look at in the 3rd .pdf .) =3D=3D=3D Mark Millard marklmi at yahoo.com