git: 43eebd036447 - main - mpc85xx/pci: Conditionally reset PCI bridges

The branch main has been updated by jhibbits:

URL: https://cgit.FreeBSD.org/src/commit/?id=43eebd036447f5399dd4bfa9b9d3e4e6f6596f48

commit 43eebd036447f5399dd4bfa9b9d3e4e6f6596f48
Author:     Justin Hibbits <jhibbits@FreeBSD.org>
AuthorDate: 2022-07-30 01:43:42 +0000
Commit:     Justin Hibbits <jhibbits@FreeBSD.org>
CommitDate: 2022-07-30 01:54:20 +0000

    mpc85xx/pci: Conditionally reset PCI bridges
    
    Sometimes we need to reset a PCIe bus, but sometimes it breaks the
    downstream device(s).  Since, from my testing, this is only needed for
    Radeon cards installed in the AmigaOne machines because the card was
    already initialized by firmware, make the reset dependent on a device
    hint (hint.pcib.X.reset=1).  With this, AmigaOne X5000 machines can have
    other devices in the secondary PCIe slots.
---
 sys/powerpc/mpc85xx/pci_mpc85xx.c | 28 ++++++++++++++++------------
 1 file changed, 16 insertions(+), 12 deletions(-)

diff --git a/sys/powerpc/mpc85xx/pci_mpc85xx.c b/sys/powerpc/mpc85xx/pci_mpc85xx.c
index 5536024c9b2f..e19cb0554b6b 100644
--- a/sys/powerpc/mpc85xx/pci_mpc85xx.c
+++ b/sys/powerpc/mpc85xx/pci_mpc85xx.c
@@ -313,7 +313,7 @@ fsl_pcib_attach(device_t dev)
 	struct fsl_pcib_softc *sc;
 	phandle_t node;
 	uint32_t cfgreg, brctl, ipreg;
-	int error, rid;
+	int do_reset, error, rid;
 	uint8_t ltssm, capptr;
 
 	sc = device_get_softc(dev);
@@ -374,17 +374,21 @@ fsl_pcib_attach(device_t dev)
 	    PCIM_CMD_PORTEN;
 	fsl_pcib_cfgwrite(sc, 0, 0, 0, PCIR_COMMAND, cfgreg, 2);
 
-	/* Reset the bus.  Needed for Radeon video cards. */
-	brctl = fsl_pcib_read_config(sc->sc_dev, 0, 0, 0,
-	    PCIR_BRIDGECTL_1, 1);
-	brctl |= PCIB_BCR_SECBUS_RESET;
-	fsl_pcib_write_config(sc->sc_dev, 0, 0, 0,
-	    PCIR_BRIDGECTL_1, brctl, 1);
-	DELAY(100000);
-	brctl &= ~PCIB_BCR_SECBUS_RESET;
-	fsl_pcib_write_config(sc->sc_dev, 0, 0, 0,
-	    PCIR_BRIDGECTL_1, brctl, 1);
-	DELAY(100000);
+	do_reset = 0;
+	resource_int_value("pcib", device_get_unit(dev), "reset", &do_reset);
+	if (do_reset) {
+		/* Reset the bus.  Needed for Radeon video cards. */
+		brctl = fsl_pcib_read_config(sc->sc_dev, 0, 0, 0,
+		    PCIR_BRIDGECTL_1, 1);
+		brctl |= PCIB_BCR_SECBUS_RESET;
+		fsl_pcib_write_config(sc->sc_dev, 0, 0, 0,
+		    PCIR_BRIDGECTL_1, brctl, 1);
+		DELAY(100000);
+		brctl &= ~PCIB_BCR_SECBUS_RESET;
+		fsl_pcib_write_config(sc->sc_dev, 0, 0, 0,
+		    PCIR_BRIDGECTL_1, brctl, 1);
+		DELAY(100000);
+	}
 
 	if (sc->sc_pcie) {
 		ltssm = fsl_pcib_cfgread(sc, 0, 0, 0, PCIR_LTSSM, 1);