From nobody Sat Jul 30 01:56:41 2022 X-Original-To: dev-commits-src-main@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4LvnYk0T0Rz4XkMr; Sat, 30 Jul 2022 01:56:42 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4LvnYj6n40z3rNh; Sat, 30 Jul 2022 01:56:41 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1659146202; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=Xqqv9zGGMG9TjpzmxDl1DD1be6VRPfjRZ20U9TjPhv8=; b=lC3ugn81sLLmdDHpG2yUPec+MrVGuIz6swo9QDfRB0UTtPQkc8EVUDLCLLXiwbfHFhiQ7T Tp6XUaLp1dNK4zjB24jRQoV6cCYYYq3JPjpxqAdKENxu10NgjKrc9J90j2mMFopzCv1Tlb vZebXTXpzYQ04kjeUfg9lFDZ8bIffZD/yw2mSIGqfUZWHp3UienbZOtkXAJ4wV4pR+rUjz 5XRbhCWqWLTWkkWaZFHvMX65Ch4jI6sXOpxkGzBBJnjQBZtxpA2yv6iC/2WTmjZcvvLBPT leHr3aF8C69P5asyz7lXhTqyJ1OCz5dDvgFPLSMcE1Qx3nj0e71vP/3ZKNKKXA== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4LvnYj5pJjzxqV; Sat, 30 Jul 2022 01:56:41 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.16.1/8.16.1) with ESMTP id 26U1ufw7008754; Sat, 30 Jul 2022 01:56:41 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.16.1/8.16.1/Submit) id 26U1ufic008753; Sat, 30 Jul 2022 01:56:41 GMT (envelope-from git) Date: Sat, 30 Jul 2022 01:56:41 GMT Message-Id: <202207300156.26U1ufic008753@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: Justin Hibbits Subject: git: 43eebd036447 - main - mpc85xx/pci: Conditionally reset PCI bridges List-Id: Commit messages for the main branch of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-main List-Help: List-Post: List-Subscribe: List-Unsubscribe: Sender: owner-dev-commits-src-main@freebsd.org X-BeenThere: dev-commits-src-main@freebsd.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: jhibbits X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: 43eebd036447f5399dd4bfa9b9d3e4e6f6596f48 Auto-Submitted: auto-generated ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1659146202; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=Xqqv9zGGMG9TjpzmxDl1DD1be6VRPfjRZ20U9TjPhv8=; b=F+IrDQu8TeSTUV+FkzZ8lOZZ0Zaqjq04ZXGMYXz+aGBf/RHTIxUwsjaBS1J4aafUo5usRx 5X0Xcp1thL66M1JS9se4sUKbl5ne/ByvDpUrJmC4k/bPuy7kYcEuyvbdb7G7Bm1Fm4N2UE ItED71PA0yPUEqgqGLV/mVWsoxRgtRw7mB5RvVmiAIFKxeRGRcNe4rEtNQCiYzJgu/7y1J 1rS+JRYlYteTIeDObIIUeduQh4aHoLt0DnFd0wdz1ExteM+N4Muf3zTKX/tnWf1SYH8RVt zwtnzHgiqLhfGfqGRI/dmql3BTFisQ5MR05e4FmdnZphdz+hU69Wnsa1i2qMfQ== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1659146202; a=rsa-sha256; cv=none; b=qsrtLT5tIKG4QhdaeKrngOkhyLdj0+NMeeWGxM04C6gcEflE0BFo/hC0CKtHOhEQ1Hi74h HK8U3xtos0iPEPt+wwRZyS1l3lBmeKalHtmOmsZnuByH+zjeevWeHUmV3CEyrCY8GSOrpP iqOilLQz3bNwIq75xJN32OXyr/3HLP9PA8XNPBPGzQ0/nA/LetSREOkActO8nlUhGZ30R4 uJzsDvVX9zgsLBBquBp8OSf8lxTXuI9qK8wrHAKmMxNJCtOA2Z9qLua2F2UZmXirOJIH+h 4EHWuTqAmwUFgslPIQ0kWFepj8ukTOLOmpFim0831d8gutDOtymWfH0lEvT9IQ== ARC-Authentication-Results: i=1; mx1.freebsd.org; none X-ThisMailContainsUnwantedMimeParts: N The branch main has been updated by jhibbits: URL: https://cgit.FreeBSD.org/src/commit/?id=43eebd036447f5399dd4bfa9b9d3e4e6f6596f48 commit 43eebd036447f5399dd4bfa9b9d3e4e6f6596f48 Author: Justin Hibbits AuthorDate: 2022-07-30 01:43:42 +0000 Commit: Justin Hibbits CommitDate: 2022-07-30 01:54:20 +0000 mpc85xx/pci: Conditionally reset PCI bridges Sometimes we need to reset a PCIe bus, but sometimes it breaks the downstream device(s). Since, from my testing, this is only needed for Radeon cards installed in the AmigaOne machines because the card was already initialized by firmware, make the reset dependent on a device hint (hint.pcib.X.reset=1). With this, AmigaOne X5000 machines can have other devices in the secondary PCIe slots. --- sys/powerpc/mpc85xx/pci_mpc85xx.c | 28 ++++++++++++++++------------ 1 file changed, 16 insertions(+), 12 deletions(-) diff --git a/sys/powerpc/mpc85xx/pci_mpc85xx.c b/sys/powerpc/mpc85xx/pci_mpc85xx.c index 5536024c9b2f..e19cb0554b6b 100644 --- a/sys/powerpc/mpc85xx/pci_mpc85xx.c +++ b/sys/powerpc/mpc85xx/pci_mpc85xx.c @@ -313,7 +313,7 @@ fsl_pcib_attach(device_t dev) struct fsl_pcib_softc *sc; phandle_t node; uint32_t cfgreg, brctl, ipreg; - int error, rid; + int do_reset, error, rid; uint8_t ltssm, capptr; sc = device_get_softc(dev); @@ -374,17 +374,21 @@ fsl_pcib_attach(device_t dev) PCIM_CMD_PORTEN; fsl_pcib_cfgwrite(sc, 0, 0, 0, PCIR_COMMAND, cfgreg, 2); - /* Reset the bus. Needed for Radeon video cards. */ - brctl = fsl_pcib_read_config(sc->sc_dev, 0, 0, 0, - PCIR_BRIDGECTL_1, 1); - brctl |= PCIB_BCR_SECBUS_RESET; - fsl_pcib_write_config(sc->sc_dev, 0, 0, 0, - PCIR_BRIDGECTL_1, brctl, 1); - DELAY(100000); - brctl &= ~PCIB_BCR_SECBUS_RESET; - fsl_pcib_write_config(sc->sc_dev, 0, 0, 0, - PCIR_BRIDGECTL_1, brctl, 1); - DELAY(100000); + do_reset = 0; + resource_int_value("pcib", device_get_unit(dev), "reset", &do_reset); + if (do_reset) { + /* Reset the bus. Needed for Radeon video cards. */ + brctl = fsl_pcib_read_config(sc->sc_dev, 0, 0, 0, + PCIR_BRIDGECTL_1, 1); + brctl |= PCIB_BCR_SECBUS_RESET; + fsl_pcib_write_config(sc->sc_dev, 0, 0, 0, + PCIR_BRIDGECTL_1, brctl, 1); + DELAY(100000); + brctl &= ~PCIB_BCR_SECBUS_RESET; + fsl_pcib_write_config(sc->sc_dev, 0, 0, 0, + PCIR_BRIDGECTL_1, brctl, 1); + DELAY(100000); + } if (sc->sc_pcie) { ltssm = fsl_pcib_cfgread(sc, 0, 0, 0, PCIR_LTSSM, 1);