svn commit: r205107 - user/jmallett/octeon/sys/mips/cavium
Juli Mallett
jmallett at FreeBSD.org
Fri Mar 12 23:57:28 UTC 2010
Author: jmallett
Date: Fri Mar 12 23:57:27 2010
New Revision: 205107
URL: http://svn.freebsd.org/changeset/base/205107
Log:
Remove some unused functions and macros.
Modified:
user/jmallett/octeon/sys/mips/cavium/octeon_machdep.c
user/jmallett/octeon/sys/mips/cavium/octeon_pcmap_regs.h
Modified: user/jmallett/octeon/sys/mips/cavium/octeon_machdep.c
==============================================================================
--- user/jmallett/octeon/sys/mips/cavium/octeon_machdep.c Fri Mar 12 23:46:26 2010 (r205106)
+++ user/jmallett/octeon/sys/mips/cavium/octeon_machdep.c Fri Mar 12 23:57:27 2010 (r205107)
@@ -184,82 +184,6 @@ octeon_led_run_wheel(int *prog_count, in
*prog_count &= 0x7;
}
-#define LSR_DATAREADY 0x01 /* Data ready */
-#define LSR_THRE 0x20 /* Transmit holding register empty */
-#define LSR_TEMT 0x40 /* Transmitter Empty. THR, TSR & FIFO */
-#define USR_TXFIFO_NOTFULL 0x02 /* Uart TX FIFO Not full */
-
-/*
- * octeon_uart_write_byte
- *
- * Put out a single byte off of uart port.
- */
-
-void
-octeon_uart_write_byte(int uart_index, uint8_t ch)
-{
- uint64_t val, val2;
- if (uart_index < 0 || uart_index > 1)
- return;
-
- while (1) {
- val = oct_read64(OCTEON_MIO_UART0_LSR + (uart_index * 0x400));
- val2 = oct_read64(OCTEON_MIO_UART0_USR + (uart_index * 0x400));
- if ((((uint8_t) val) & LSR_THRE) ||
- (((uint8_t) val2) & USR_TXFIFO_NOTFULL)) {
- break;
- }
- }
-
- /* Write the byte */
- oct_write8(OCTEON_MIO_UART0_THR + (uart_index * 0x400), (uint64_t) ch);
-
- /* Force Flush the IOBus */
- oct_read64(OCTEON_MIO_BOOT_BIST_STAT);
-}
-
-
-void
-octeon_uart_write_byte0(uint8_t ch)
-{
- uint64_t val, val2;
-
- while (1) {
- val = oct_read64(OCTEON_MIO_UART0_LSR);
- val2 = oct_read64(OCTEON_MIO_UART0_USR);
- if ((((uint8_t) val) & LSR_THRE) ||
- (((uint8_t) val2) & USR_TXFIFO_NOTFULL)) {
- break;
- }
- }
-
- /* Write the byte */
- oct_write8(OCTEON_MIO_UART0_THR, (uint64_t) ch);
-
- /* Force Flush the IOBus */
- oct_read64(OCTEON_MIO_BOOT_BIST_STAT);
-}
-
-/*
- * octeon_uart_write_string
- *
- */
-void
-octeon_uart_write_string(int uart_index, const char *str)
-{
- /* Just loop writing one byte at a time */
-
- while (*str) {
- octeon_uart_write_byte(uart_index, *str);
- if (*str == '\n') {
- octeon_uart_write_byte(uart_index, '\r');
- }
- str++;
- }
-}
-
-static char wstr[30];
-
void
octeon_led_write_hex(uint32_t wl)
{
@@ -270,44 +194,6 @@ octeon_led_write_hex(uint32_t wl)
}
-void octeon_uart_write_hex2(uint32_t wl, uint32_t wh)
-{
- sprintf(wstr, "0x%X-0x%X ", wh, wl);
- octeon_uart_write_string(0, wstr);
-}
-
-void
-octeon_uart_write_hex(uint32_t wl)
-{
- sprintf(wstr, " 0x%X ", wl);
- octeon_uart_write_string(0, wstr);
-}
-
-/*
- * octeon_wait_uart_flush
- */
-void
-octeon_wait_uart_flush(int uart_index, uint8_t ch)
-{
- uint64_t val;
- int64_t val3;
- uint32_t cpu_status_bits;
-
- if (uart_index < 0 || uart_index > 1)
- return;
-
- cpu_status_bits = intr_disable();
- /* Force Flush the IOBus */
- oct_read64(OCTEON_MIO_BOOT_BIST_STAT);
- for (val3 = 0xfffffffff; val3 > 0; val3--) {
- val = oct_read64(OCTEON_MIO_UART0_LSR + (uart_index * 0x400));
- if (((uint8_t) val) & LSR_TEMT)
- break;
- }
- intr_restore(cpu_status_bits);
-}
-
-
/*
* octeon_debug_symbol
*
Modified: user/jmallett/octeon/sys/mips/cavium/octeon_pcmap_regs.h
==============================================================================
--- user/jmallett/octeon/sys/mips/cavium/octeon_pcmap_regs.h Fri Mar 12 23:46:26 2010 (r205106)
+++ user/jmallett/octeon/sys/mips/cavium/octeon_pcmap_regs.h Fri Mar 12 23:57:27 2010 (r205107)
@@ -324,62 +324,6 @@ static inline void oct_write32 (uint64_t
#define OCTEON_SCRATCH_2 32
-static inline uint64_t oct_mf_chord (void)
-{
- uint64_t dest;
-
- __asm __volatile ( ".set push\n"
- ".set noreorder\n"
- ".set noat\n"
- ".set mips64\n"
- "dmfc2 $1, 0x400\n"
- "move %0, $1\n"
- ".set pop\n"
- : "=r" (dest) : : "$1");
- return dest;
-}
-
-
-#define MIPS64_DMFCz(cop,regnum,cp0reg,select) \
- .word (0x40200000 | (cop << 25) | (regnum << 16) | (cp0reg << 11) | select)
-
-
-#define mips64_getcpz_xstr(s) mips64_getcpz_str(s)
-#define mips64_getcpz_str(s) #s
-
-#define mips64_dgetcpz(cop,cpzreg,sel,val_ptr) \
- ({ __asm __volatile( \
- ".set push\n" \
- ".set mips3\n" \
- ".set noreorder\n" \
- ".set noat\n" \
- mips64_getcpz_xstr(MIPS64_DMFCz(cop,1,cpzreg,sel)) "\n" \
- "nop\n" \
- "nop\n" \
- "nop\n" \
- "nop\n" \
- "sd $1,0(%0)\n" \
- ".set pop" \
- : /* no outputs */ : "r" (val_ptr) : "$1"); \
- })
-
-
-#define mips64_dgetcp2(cp2reg,sel,retval_ptr) \
- mips64_dgetcpz(2,cp2reg,sel,retval_ptr)
-
-
-#define OCTEON_MF_CHORD(dest) mips64_dgetcp2(0x400, 0, &dest)
-
-
-
-#define OCTEON_RDHWR(result, regstr) \
- __asm __volatile ( \
- ".set mips3\n" \
- "rdhwr %0,$" OCTEON_TMP_STR(regstr) "\n" \
- ".set mips\n" \
- : "=d" (result));
-
-#define CVMX_MF_CHORD(dest) OCTEON_RDHWR(dest, 30)
#define OCTEON_CHORD_HEX(dest_ptr) \
({ __asm __volatile( \
@@ -397,15 +341,6 @@ static inline uint64_t oct_mf_chord (voi
: /* no outputs */ : "r" (dest_ptr) : "$2"); \
})
-
-
-#define OCTEON_MF_CHORD_BAD(dest) \
- __asm __volatile ( \
- ".set mips3\n" \
- "dmfc2 %0, 0x400\n" \
- ".set mips0\n" \
- : "=&r" (dest) : )
-
static inline uint64_t oct_scratch_read64 (uint64_t address)
{
return(*((volatile uint64_t *)(OCTEON_SCRATCH_BASE + address)));
@@ -417,17 +352,6 @@ static inline void oct_scratch_write64 (
}
-#define OCTEON_READ_CSR32(addr, val) \
- addr_ptr = addr; \
- oct_read_32_ptr(&addr_ptr, &val);
-
-#define OCTEON_WRITE_CSR32(addr, val, val_dummy) \
- addr_ptr = addr; \
- oct_write_32_ptr(&addr_ptr, &val); \
- oct_read64(OCTEON_MIO_BOOT_BIST_STAT);
-
-
-
/*
* Octeon Address Space Definitions
*/
@@ -791,12 +715,6 @@ extern void octeon_led_write_hexchar(int
extern void octeon_led_write_hex(uint32_t wl);
extern void octeon_led_write_string(const char *str);
extern void octeon_reset(void);
-extern void octeon_uart_write_byte(int uart_index, uint8_t ch);
-extern void octeon_uart_write_string(int uart_index, const char *str);
-extern void octeon_uart_write_hex(uint32_t wl);
-extern void octeon_uart_write_hex2(uint32_t wl, uint32_t wh);
-extern void octeon_wait_uart_flush(int uart_index, uint8_t ch);
-extern void octeon_uart_write_byte0(uint8_t ch);
extern void octeon_led_write_char0(char val);
extern void octeon_led_run_wheel(int *pos, int led_position);
extern void octeon_debug_symbol(void);
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