svn commit: r211726 - in user/nwhitehorn/ps3/powerpc: include ps3

[Nathan Whitehorn]

Author: nwhitehorn
Date: Mon Aug 23 22:41:49 2010
New Revision: 211726
URL: http://svn.freebsd.org/changeset/base/211726

Log:
  Fix propagation of ref/changed bits out of the page table. Thanks to
  Geoff Levand of SCE for explaining how lv1_read_htab_entries() works.
  
  Unfortunately, this does not fix some userspace programs from crashing
  after a fork()...

Modified:
  user/nwhitehorn/ps3/powerpc/include/pte.h
  user/nwhitehorn/ps3/powerpc/ps3/mmu_ps3.c

Modified: user/nwhitehorn/ps3/powerpc/include/pte.h
==============================================================================
--- user/nwhitehorn/ps3/powerpc/include/pte.h	Mon Aug 23 22:24:11 2010	(r211725)
+++ user/nwhitehorn/ps3/powerpc/include/pte.h	Mon Aug 23 22:41:49 2010	(r211726)
@@ -94,6 +94,7 @@ struct lpteg {
 
 /* High quadword: */
 #define LPTE_VSID_SHIFT		12
+#define LPTE_AVPN_MASK		0xFFFFFFFFFFFFFF80ULL
 #define LPTE_API		0x0000000000000F80ULL
 #define LPTE_WIRED		0x0000000000000010ULL
 #define LPTE_LOCKED		0x0000000000000008ULL

Modified: user/nwhitehorn/ps3/powerpc/ps3/mmu_ps3.c
==============================================================================
--- user/nwhitehorn/ps3/powerpc/ps3/mmu_ps3.c	Mon Aug 23 22:24:11 2010	(r211725)
+++ user/nwhitehorn/ps3/powerpc/ps3/mmu_ps3.c	Mon Aug 23 22:41:49 2010	(r211726)
@@ -50,7 +50,8 @@
 #include "mmu_if.h"
 #include "ps3-hvcall.h"
 
-#define VSID_HASH_MASK	0x0000007fffffffffULL
+#define VSID_HASH_MASK		0x0000007fffffffffUL
+#define LV1_READ_HTAB_LO_MASK	0xfffUL
 
 extern int ps3fb_remap(void);
 
@@ -198,10 +199,23 @@ mps3_pte_synch(struct lpte *pt, struct l
 	uint64_t halfbucket[4], rcbits;
 	uint64_t slot = (uint64_t)(pt)-1;
 	
+	__asm __volatile("ptesync");
 	lv1_read_htab_entries(mps3_vas_id, slot & ~0x3UL, &halfbucket[0],
 	    &halfbucket[1], &halfbucket[2], &halfbucket[3], &rcbits);
 
-	pvo_pt->pte_lo |= ((rcbits >> (slot & 0x3)) & 0x3) << 7;
+	/*
+	 * rcbits contains the low 12 bits of each PTEs 2nd part,
+	 * spaced at 16-bit intervals
+	 */
+
+	KASSERT((halfbucket[slot & 0x3] & LPTE_AVPN_MASK) ==
+	    (pvo_pt->pte_hi & LPTE_AVPN_MASK),
+	    ("PTE upper word %#lx != %#lx\n",
+	    halfbucket[slot & 0x3], pvo_pt->pte_hi));
+
+	pvo_pt->pte_lo &= ~LV1_READ_HTAB_LO_MASK;
+ 	pvo_pt->pte_lo |= (rcbits >> ((3 - (slot & 0x3))*16)) &
+	    LV1_READ_HTAB_LO_MASK;
 }
 
 static void
@@ -219,6 +233,7 @@ mps3_pte_unset(struct lpte *pt, struct l
 {
 	uint64_t slot = (uint64_t)(pt)-1;
 
+	mps3_pte_synch(pt, pvo_pt);
 	pvo_pt->pte_hi &= ~LPTE_VALID;
 	lv1_write_htab_entry(mps3_vas_id, slot, 0, 0);
 	moea64_pte_valid--;
@@ -229,6 +244,7 @@ mps3_pte_change(struct lpte *pt, struct 
 {
 	uint64_t slot = (uint64_t)(pt)-1;
  
+	mps3_pte_synch(pt, pvo_pt);
 	pvo_pt->pte_hi |= LPTE_VALID;
 	lv1_write_htab_entry(mps3_vas_id, slot & ~0x3UL, pvo_pt->pte_hi,
 	    pvo_pt->pte_lo);