svn commit: r206171 - user/jmallett/octeon/sys/mips/mips

[Juli Mallett]

Author: jmallett
Date: Sun Apr  4 23:33:44 2010
New Revision: 206171
URL: http://svn.freebsd.org/changeset/base/206171

Log:
  o) Adjust bitmasks for PTE and page directory pages.
  o) Add hazards after mtc0s.

Modified:
  user/jmallett/octeon/sys/mips/mips/exception.S

Modified: user/jmallett/octeon/sys/mips/mips/exception.S
==============================================================================
--- user/jmallett/octeon/sys/mips/mips/exception.S	Sun Apr  4 23:19:11 2010	(r206170)
+++ user/jmallett/octeon/sys/mips/mips/exception.S	Sun Apr  4 23:33:44 2010	(r206171)
@@ -136,20 +136,22 @@ MipsDoTLBMiss:
 	PTR_L		k1, PC_SEGBASE(k1)
 	beqz		k1, 2f				#05: make sure segbase is not null
 #if defined(__mips_n64)
-	andi		k0, k0, 0xff8			#06: k0=seg offset (mask 0x7)
+	andi		k0, k0, 0x1ff8			#06: k0=seg offset (mask 0x7)
 #else
-	andi		k0, k0, 0x7fc			#06: k0=seg offset (mask 0x3)
+	andi		k0, k0, 0x1ffc			#06: k0=seg offset (mask 0x3)
 #endif
 	PTR_ADDU	k1, k0, k1			#07: k1=seg entry address
+
 	PTR_L		k1, 0(k1)			#08: k1=seg entry
 	MFC0		k0, COP_0_BAD_VADDR		#09: k0=bad address (again)
 	beq		k1, zero, 2f			#0a: ==0 -- no page table
 	srl		k0, PAGE_SHIFT - 2		#0b: k0=VPN (aka va>>10)
-	andi		k0, k0, 0xffc			#0c: k0=page tab offset
+	andi		k0, k0, 0x1ffc			#0c: k0=page tab offset
 	PTR_ADDU	k1, k1, k0			#0d: k1=pte address
 	lw		k0, 0(k1)			#0e: k0=lo0 pte
 	CLEAR_PTE_SWBITS(k0)
 	MTC0		k0, COP_0_TLB_LO0		#12: lo0 is loaded
+	HAZARD_DELAY
 	addu		k0, TLBLO_PFN_ODD
 	MTC0		k0, COP_0_TLB_LO1		#15: lo1 is loaded
 	HAZARD_DELAY
@@ -836,7 +838,7 @@ NLEAF(MipsTLBInvalidException)
 #if defined(__mips_n64)
 	andi		k0, k0, 0x1ff8			# k0=seg offset (mask 0x7)
 #else
-	andi		k0, k0, 0xffc			# k0=seg offset (mask 0x3)
+	andi		k0, k0, 0x1ffc			# k0=seg offset (mask 0x3)
 #endif
 	PTR_ADDU	k1, k0, k1			# k1=seg entry address
 	PTR_L		k1, 0(k1)			# k1=seg entry
@@ -847,7 +849,7 @@ NLEAF(MipsTLBInvalidException)
 
 	MFC0		k0, COP_0_BAD_VADDR		# k0=bad address (again)
 	PTR_SRL		k0, PAGE_SHIFT - 2		# k0=VPN
-	andi		k0, k0, 0xffc			# k0=page tab offset
+	andi		k0, k0, 0x1ffc			# k0=page tab offset
 	PTR_ADDU	k1, k1, k0			# k1=pte address
 	lw		k0, 0(k1)			# k0=this PTE
 
@@ -859,8 +861,10 @@ NLEAF(MipsTLBInvalidException)
 	lw		k0, 0(k1)
 	CLEAR_PTE_SWBITS(k0)
 	MTC0		k0, COP_0_TLB_LO0
+	HAZARD_DELAY
 	addu		k0, TLBLO_PFN_ODD
 	MTC0		k0, COP_0_TLB_LO1
+	HAZARD_DELAY
 
 	tlbp
 	HAZARD_DELAY
@@ -986,18 +990,19 @@ NLEAF(MipsTLBMissException)
 #if defined(__mips_n64)
 	andi		k0, k0, 0x1ff8			# k0=seg offset (mask 0x7)
 #else
-	andi		k0, k0, 0xffc			# k0=seg offset (mask 0x3)
+	andi		k0, k0, 0x1ffc			# k0=seg offset (mask 0x3)
 #endif
 	PTR_ADDU	k1, k0, k1			# k1=seg entry address
 	PTR_L		k1, 0(k1)			# k1=seg entry
 	MFC0		k0, COP_0_BAD_VADDR		# k0=bad address (again)
 	beq		k1, zero, MipsKernGenException	# ==0 -- no page table
 	PTR_SRL		k0, PAGE_SHIFT - 2		# k0=VPN
-	andi		k0, k0, 0xffc			# k0=page tab offset
+	andi		k0, k0, 0x1ffc			# k0=page tab offset
 	PTR_ADDU	k1, k1, k0			# k1=pte address
 	lw		k0, 0(k1)			# k0=lo0 pte
 	CLEAR_PTE_SWBITS(k0)
 	MTC0		k0, COP_0_TLB_LO0		# lo0 is loaded
+	HAZARD_DELAY
 	addu		k0, TLBLO_PFN_ODD
 	MTC0		k0, COP_0_TLB_LO1		# lo1 is loaded
 	HAZARD_DELAY