svn commit: r345254 - stable/11/sys/dev/urtwn

[Andriy Voskoboinyk]

Author: avos
Date: Mon Mar 18 02:58:34 2019
New Revision: 345254
URL: https://svnweb.freebsd.org/changeset/base/345254

Log:
  MFC r344745:
  urtwn(4): fix Tx instability with RTL8192CU chipsets
  
  PR:		233949

Modified:
  stable/11/sys/dev/urtwn/if_urtwn.c
  stable/11/sys/dev/urtwn/if_urtwnreg.h
Directory Properties:
  stable/11/   (props changed)

Modified: stable/11/sys/dev/urtwn/if_urtwn.c
==============================================================================
--- stable/11/sys/dev/urtwn/if_urtwn.c	Mon Mar 18 02:56:51 2019	(r345253)
+++ stable/11/sys/dev/urtwn/if_urtwn.c	Mon Mar 18 02:58:34 2019	(r345254)
@@ -3036,10 +3036,17 @@ urtwn_tx_data(struct urtwn_softc *sc, struct ieee80211
 				    R92C_TXDW4_HWRTSEN);
 			}
 
-			/* XXX TODO: rtsrate is configurable? 24mbit may
-			 * be a bit high for RTS rate? */
-			txd->txdw4 |= htole32(SM(R92C_TXDW4_RTSRATE,
-			    URTWN_RIDX_OFDM24));
+			if (!(sc->chip & URTWN_CHIP_88E)) {
+				/* XXX other rates will not work without
+				 * urtwn_ra_init() */
+				txd->txdw4 |= htole32(SM(R92C_TXDW4_RTSRATE,
+				    URTWN_RIDX_CCK1));
+			} else {
+				/* XXX TODO: rtsrate is configurable? 24mbit
+				 * may be a bit high for RTS rate? */
+				txd->txdw4 |= htole32(SM(R92C_TXDW4_RTSRATE,
+				    URTWN_RIDX_OFDM24));
+			}
 
 			txd->txdw5 |= htole32(0x0001ff00);
 		} else	/* IEEE80211_FC0_TYPE_MGT */
@@ -5498,6 +5505,9 @@ urtwn_init(struct urtwn_softc *sc)
 		urtwn_write_1(sc, R88E_TX_RPT_CTRL,
 		    urtwn_read_1(sc, R88E_TX_RPT_CTRL) | R88E_TX_RPT1_ENA);
 	}
+
+	if (!(sc->chip & URTWN_CHIP_88E))
+		urtwn_write_4(sc, R92C_POWER_STATUS, 0x5);
 
 	/* Perform LO and IQ calibrations. */
 	urtwn_iq_calib(sc);

Modified: stable/11/sys/dev/urtwn/if_urtwnreg.h
==============================================================================
--- stable/11/sys/dev/urtwn/if_urtwnreg.h	Mon Mar 18 02:56:51 2019	(r345253)
+++ stable/11/sys/dev/urtwn/if_urtwnreg.h	Mon Mar 18 02:58:34 2019	(r345254)
@@ -163,6 +163,7 @@
 #define R92C_RD_RESP_PKT_TH		0x463
 #define R92C_INIRTS_RATE_SEL		0x480
 #define R92C_INIDATA_RATE_SEL(macid)	(0x484 + (macid))
+#define R92C_POWER_STATUS		0x4a4
 #define R92C_MAX_AGGR_NUM		0x4ca
 #define R88E_TX_RPT_CTRL		0x4ec
 #define R88E_TX_RPT_MACID_MAX		0x4ed