svn commit: r308279 - stable/11/sys/arm/allwinner

[Emmanuel Vadot]

Author: manu
Date: Fri Nov  4 01:50:59 2016
New Revision: 308279
URL: https://svnweb.freebsd.org/changeset/base/308279

Log:
  MFC r302522, r302591-r302592 (by jmcneill)
  
  r302522:
  Align descriptors and data buffers to 32 bits. This restriction is
  described in the A20 (and later) user manuals.
  
  r302591:
  Add support for arm64. The allwinner_soc_family() function is not available
  on arm64 and all SoCs using the old FIFO register location are 32-bit only,
  so unconditionally use the new location for arm64.
  
  Reviewed by:	andrew, manu
  
  r302592:
  Return early from bus_dmamap_load callback if the error indicator is set.
  
  Reviewed by:	andrew, manu

Modified:
  stable/11/sys/arm/allwinner/a10_mmc.c
  stable/11/sys/arm/allwinner/a10_mmc.h
Directory Properties:
  stable/11/   (props changed)

Modified: stable/11/sys/arm/allwinner/a10_mmc.c
==============================================================================
--- stable/11/sys/arm/allwinner/a10_mmc.c	Fri Nov  4 01:14:41 2016	(r308278)
+++ stable/11/sys/arm/allwinner/a10_mmc.c	Fri Nov  4 01:50:59 2016	(r308279)
@@ -182,6 +182,7 @@ a10_mmc_attach(device_t dev)
 	    MTX_DEF);
 	callout_init_mtx(&sc->a10_timeoutc, &sc->a10_mtx, 0);
 
+#if defined(__arm__)
 	/*
 	 * Later chips use a different FIFO offset. Unfortunately the FDT
 	 * uses the same compatible string for old and new implementations.
@@ -196,6 +197,9 @@ a10_mmc_attach(device_t dev)
 		sc->a10_fifo_reg = A31_MMC_FIFO;
 		break;
 	}
+#else /* __aarch64__ */
+	sc->a10_fifo_reg = A31_MMC_FIFO;
+#endif
 
 	/* De-assert reset */
 	if (hwreset_get_by_ofw_name(dev, "ahb", &sc->a10_rst_ahb) == 0) {
@@ -255,7 +259,7 @@ a10_mmc_attach(device_t dev)
 		    a10_mmc_pio_mode ? "disabled" : "enabled");
 
 	if (OF_getencprop(node, "bus-width", &bus_width, sizeof(uint32_t)) <= 0)
-		bus_width = 1;
+		bus_width = 4;
 
 	sc->a10_host.f_min = 400000;
 	sc->a10_host.f_max = 50000000;
@@ -316,7 +320,8 @@ a10_mmc_setup_dma(struct a10_mmc_softc *
 
 	/* Allocate the DMA descriptor memory. */
 	dma_desc_size = sizeof(struct a10_mmc_dma_desc) * A10_MMC_DMA_SEGS;
-	error = bus_dma_tag_create(bus_get_dma_tag(sc->a10_dev), 1, 0,
+	error = bus_dma_tag_create(bus_get_dma_tag(sc->a10_dev),
+	    A10_MMC_DMA_ALIGN, 0,
 	    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
 	    dma_desc_size, 1, dma_desc_size, 0, NULL, NULL, &sc->a10_dma_tag);
 	if (error)
@@ -334,7 +339,8 @@ a10_mmc_setup_dma(struct a10_mmc_softc *
 		return (sc->a10_dma_map_err);
 
 	/* Create the DMA map for data transfers. */
-	error = bus_dma_tag_create(bus_get_dma_tag(sc->a10_dev), 1, 0,
+	error = bus_dma_tag_create(bus_get_dma_tag(sc->a10_dev),
+	    A10_MMC_DMA_ALIGN, 0,
 	    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
 	    A10_MMC_DMA_MAX_SIZE * A10_MMC_DMA_SEGS, A10_MMC_DMA_SEGS,
 	    A10_MMC_DMA_MAX_SIZE, BUS_DMA_ALLOCNOW, NULL, NULL,
@@ -358,6 +364,10 @@ a10_dma_cb(void *arg, bus_dma_segment_t 
 
 	sc = (struct a10_mmc_softc *)arg;
 	sc->a10_dma_map_err = err;
+
+	if (err)
+		return;
+
 	dma_desc = sc->a10_dma_desc;
 	/* Note nsegs is guaranteed to be zero if err is non-zero. */
 	for (i = 0; i < nsegs; i++) {

Modified: stable/11/sys/arm/allwinner/a10_mmc.h
==============================================================================
--- stable/11/sys/arm/allwinner/a10_mmc.h	Fri Nov  4 01:14:41 2016	(r308278)
+++ stable/11/sys/arm/allwinner/a10_mmc.h	Fri Nov  4 01:50:59 2016	(r308279)
@@ -196,4 +196,7 @@ struct a10_mmc_dma_desc {
 	uint32_t next;
 };
 
+/* DMA descriptors and data buffers must be aligned to 32-bits */
+#define	A10_MMC_DMA_ALIGN		4
+
 #endif /* _A10_MMC_H_ */