svn commit: r310252 - stable/11/sys/compat/linuxkpi/common/include/linux

[Hans Petter Selasky]

Author: hselasky
Date: Mon Dec 19 09:49:16 2016
New Revision: 310252
URL: https://svnweb.freebsd.org/changeset/base/310252

Log:
  MFC r309737:
  Add more LinuxKPI PCI definitions.
  
  Obtained from:	kmacy @
  Sponsored by:	Mellanox Technologies

Modified:
  stable/11/sys/compat/linuxkpi/common/include/linux/pci.h
Directory Properties:
  stable/11/   (props changed)

Modified: stable/11/sys/compat/linuxkpi/common/include/linux/pci.h
==============================================================================
--- stable/11/sys/compat/linuxkpi/common/include/linux/pci.h	Mon Dec 19 09:48:29 2016	(r310251)
+++ stable/11/sys/compat/linuxkpi/common/include/linux/pci.h	Mon Dec 19 09:49:16 2016	(r310252)
@@ -64,8 +64,18 @@ struct pci_device_id {
 
 #define	MODULE_DEVICE_TABLE(bus, table)
 #define	PCI_ANY_ID		(-1)
+#define	PCI_VENDOR_ID_APPLE		0x106b
+#define	PCI_VENDOR_ID_ASUSTEK		0x1043
+#define	PCI_VENDOR_ID_ATI		0x1002
+#define	PCI_VENDOR_ID_DELL		0x1028
+#define	PCI_VENDOR_ID_HP		0x103c
+#define	PCI_VENDOR_ID_IBM		0x1014
+#define	PCI_VENDOR_ID_INTEL		0x8086
 #define	PCI_VENDOR_ID_MELLANOX			0x15b3
+#define	PCI_VENDOR_ID_SERVERWORKS	0x1166
+#define	PCI_VENDOR_ID_SONY		0x104d
 #define	PCI_VENDOR_ID_TOPSPIN			0x1867
+#define	PCI_VENDOR_ID_VIA		0x1106
 #define	PCI_DEVICE_ID_MELLANOX_TAVOR		0x5a44
 #define	PCI_DEVICE_ID_MELLANOX_TAVOR_BRIDGE	0x5a46
 #define	PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT	0x6278
@@ -121,6 +131,10 @@ struct pci_device_id {
 #define	PCI_EXP_LNKCAP2_SLS_5_0GB 0x04	/* Supported Link Speed 5.0GT/s */
 #define	PCI_EXP_LNKCAP2_SLS_8_0GB 0x08	/* Supported Link Speed 8.0GT/s */
 
+#define PCI_EXP_LNKCTL_HAWD	PCIEM_LINK_CTL_HAWD
+#define PCI_EXP_LNKCAP_CLKPM	0x00040000
+#define PCI_EXP_DEVSTA_TRPND	0x0020
+
 #define	IORESOURCE_MEM	(1 << SYS_RES_MEMORY)
 #define	IORESOURCE_IO	(1 << SYS_RES_IOPORT)
 #define	IORESOURCE_IRQ	(1 << SYS_RES_IRQ)
@@ -133,9 +147,19 @@ enum pci_bus_speed {
 };
 
 enum pcie_link_width {
-	PCIE_LNK_WIDTH_UNKNOWN = -1,
+	PCIE_LNK_WIDTH_UNKNOWN = 0xFF,
 };
 
+typedef int pci_power_t;
+
+#define PCI_D0	PCI_POWERSTATE_D0
+#define PCI_D1	PCI_POWERSTATE_D1
+#define PCI_D2	PCI_POWERSTATE_D2
+#define PCI_D3hot	PCI_POWERSTATE_D3
+#define PCI_D3cold	4
+
+#define PCI_POWER_ERROR	PCI_POWERSTATE_UNKNOWN
+
 struct pci_dev;
 
 struct pci_driver {
@@ -303,6 +327,14 @@ pci_set_master(struct pci_dev *pdev)
 }
 
 static inline int
+pci_set_power_state(struct pci_dev *pdev, int state)
+{
+
+	pci_set_powerstate(pdev->dev.bsddev, state);
+	return (0);
+}
+
+static inline int
 pci_clear_master(struct pci_dev *pdev)
 {
 
@@ -368,9 +400,23 @@ pci_disable_msix(struct pci_dev *pdev)
 	pci_release_msi(pdev->dev.bsddev);
 }
 
+static inline bus_addr_t
+pci_bus_address(struct pci_dev *pdev, int bar)
+{
+
+	return (pci_resource_start(pdev, bar));
+}
+
 #define	PCI_CAP_ID_EXP	PCIY_EXPRESS
 #define	PCI_CAP_ID_PCIX	PCIY_PCIX
+#define PCI_CAP_ID_AGP  PCIY_AGP
+#define PCI_CAP_ID_PM   PCIY_PMG
 
+#define PCI_EXP_DEVCTL		PCIER_DEVICE_CTL
+#define PCI_EXP_DEVCTL_PAYLOAD	PCIEM_CTL_MAX_PAYLOAD
+#define PCI_EXP_DEVCTL_READRQ	PCIEM_CTL_MAX_READ_REQUEST
+#define PCI_EXP_LNKCTL		PCIER_LINK_CTL
+#define PCI_EXP_LNKSTA		PCIER_LINK_STA
 
 static inline int
 pci_find_capability(struct pci_dev *pdev, int capid)
@@ -410,7 +456,7 @@ pci_read_config_dword(struct pci_dev *pd
 
 	*val = (u32)pci_read_config(pdev->dev.bsddev, where, 4);
 	return (0);
-} 
+}
 
 static inline int
 pci_write_config_byte(struct pci_dev *pdev, int where, u8 val)
@@ -430,7 +476,7 @@ pci_write_config_word(struct pci_dev *pd
 
 static inline int
 pci_write_config_dword(struct pci_dev *pdev, int where, u32 val)
-{ 
+{
 
 	pci_write_config(pdev->dev.bsddev, where, val, 4);
 	return (0);
@@ -708,7 +754,8 @@ static bool pcie_capability_reg_implemen
         }
 }
 
-static inline int pcie_capability_read_dword(struct pci_dev *dev, int pos, u32 *dst)
+static inline int
+pcie_capability_read_dword(struct pci_dev *dev, int pos, u32 *dst)
 {
         if (pos & 3)
                 return -EINVAL;
@@ -719,7 +766,20 @@ static inline int pcie_capability_read_d
         return pci_read_config_dword(dev, pci_pcie_cap(dev) + pos, dst);
 }
 
-static inline int pcie_capability_write_word(struct pci_dev *dev, int pos, u16 val)
+static inline int
+pcie_capability_read_word(struct pci_dev *dev, int pos, u16 *dst)
+{
+        if (pos & 3)
+                return -EINVAL;
+
+        if (!pcie_capability_reg_implemented(dev, pos))
+                return -EINVAL;
+
+        return pci_read_config_word(dev, pci_pcie_cap(dev) + pos, dst);
+}
+
+static inline int
+pcie_capability_write_word(struct pci_dev *dev, int pos, u16 val)
 {
         if (pos & 1)
                 return -EINVAL;