svn commit: r277061 - stable/10/sys/dev/ahci
Steven Hartland
smh at FreeBSD.org
Mon Jan 12 10:25:08 UTC 2015
Author: smh
Date: Mon Jan 12 10:25:07 2015
New Revision: 277061
URL: https://svnweb.freebsd.org/changeset/base/277061
Log:
MFC r276012:
Add a constant AHCI_MAX_IRQS removing magic number
MFC r276013:
Clamp ahci max irq's to AHCI_MAX_IRQS
MFC r276016:
Return the error from ahci_setup_interrupt in ahci_attach
MFC r276019:
style (9) nits
Sponsored by: Multiplay
Modified:
stable/10/sys/dev/ahci/ahci.c
stable/10/sys/dev/ahci/ahci.h
Directory Properties:
stable/10/ (props changed)
Modified: stable/10/sys/dev/ahci/ahci.c
==============================================================================
--- stable/10/sys/dev/ahci/ahci.c Mon Jan 12 10:02:23 2015 (r277060)
+++ stable/10/sys/dev/ahci/ahci.c Mon Jan 12 10:25:07 2015 (r277061)
@@ -467,7 +467,7 @@ ahci_attach(device_t dev)
ctlr->r_rid = PCIR_BAR(5);
if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
&ctlr->r_rid, RF_ACTIVE)))
- return ENXIO;
+ return (ENXIO);
/* Setup our own memory management for channels. */
ctlr->sc_iomem.rm_start = rman_get_start(ctlr->r_mem);
ctlr->sc_iomem.rm_end = rman_get_end(ctlr->r_mem);
@@ -537,16 +537,16 @@ ahci_attach(device_t dev)
bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid,
ctlr->r_mem);
rman_fini(&ctlr->sc_iomem);
- return ENXIO;
+ return (ENXIO);
}
ahci_ctlr_setup(dev);
/* Setup interrupts. */
- if (ahci_setup_interrupt(dev)) {
+ if ((error = ahci_setup_interrupt(dev)) != 0) {
bus_dma_tag_destroy(ctlr->dma_tag);
bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem);
rman_fini(&ctlr->sc_iomem);
- return ENXIO;
+ return (error);
}
i = 0;
for (u = ctlr->ichannels; u != 0; u >>= 1)
@@ -624,7 +624,7 @@ ahci_attach(device_t dev)
device_set_ivars(child, (void *)(intptr_t)-1);
}
bus_generic_attach(dev);
- return 0;
+ return (0);
}
static int
@@ -674,7 +674,7 @@ ahci_ctlr_reset(device_t dev)
}
if (timeout == 0) {
device_printf(dev, "AHCI controller reset failure\n");
- return ENXIO;
+ return (ENXIO);
}
/* Reenable AHCI mode */
ATA_OUTL(ctlr->r_mem, AHCI_GHC, AHCI_GHC_AE);
@@ -717,7 +717,7 @@ ahci_suspend(device_t dev)
/* Disable interupts, so the state change(s) doesn't trigger */
ATA_OUTL(ctlr->r_mem, AHCI_GHC,
ATA_INL(ctlr->r_mem, AHCI_GHC) & (~AHCI_GHC_IE));
- return 0;
+ return (0);
}
static int
@@ -763,6 +763,14 @@ ahci_setup_interrupt(device_t dev)
device_printf(dev, "Falling back to one MSI\n");
ctlr->numirqs = 1;
}
+
+ /* Ensure we don't overrun irqs. */
+ if (ctlr->numirqs > AHCI_MAX_IRQS) {
+ device_printf(dev, "Too many irqs %d > %d (clamping)\n",
+ ctlr->numirqs, AHCI_MAX_IRQS);
+ ctlr->numirqs = AHCI_MAX_IRQS;
+ }
+
/* Allocate all IRQs. */
for (i = 0; i < ctlr->numirqs; i++) {
ctlr->irqs[i].ctlr = ctlr;
@@ -777,7 +785,7 @@ ahci_setup_interrupt(device_t dev)
if (!(ctlr->irqs[i].r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ,
&ctlr->irqs[i].r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) {
device_printf(dev, "unable to map interrupt\n");
- return ENXIO;
+ return (ENXIO);
}
if ((bus_setup_intr(dev, ctlr->irqs[i].r_irq, ATA_INTR_FLAGS, NULL,
(ctlr->irqs[i].mode != AHCI_IRQ_MODE_ONE) ? ahci_intr :
@@ -786,7 +794,7 @@ ahci_setup_interrupt(device_t dev)
&ctlr->irqs[i], &ctlr->irqs[i].handle))) {
/* SOS XXX release r_irq */
device_printf(dev, "unable to setup interrupt\n");
- return ENXIO;
+ return (ENXIO);
}
if (ctlr->numirqs > 1) {
bus_describe_intr(dev, ctlr->irqs[i].r_irq,
@@ -934,7 +942,7 @@ ahci_release_resource(device_t dev, devi
return (0);
case SYS_RES_IRQ:
if (rid != ATA_IRQ_RID)
- return ENOENT;
+ return (ENOENT);
return (0);
}
return (EINVAL);
Modified: stable/10/sys/dev/ahci/ahci.h
==============================================================================
--- stable/10/sys/dev/ahci/ahci.h Mon Jan 12 10:02:23 2015 (r277060)
+++ stable/10/sys/dev/ahci/ahci.h Mon Jan 12 10:25:07 2015 (r277061)
@@ -143,6 +143,7 @@
#define AHCI_MAX_PORTS 32
#define AHCI_MAX_SLOTS 32
+#define AHCI_MAX_IRQS 16
/* SATA AHCI v1.0 register defines */
#define AHCI_CAP 0x00
@@ -485,7 +486,7 @@ struct ahci_controller {
#define AHCI_IRQ_MODE_ALL 0
#define AHCI_IRQ_MODE_AFTER 1
#define AHCI_IRQ_MODE_ONE 2
- } irqs[16];
+ } irqs[AHCI_MAX_IRQS];
uint32_t caps; /* Controller capabilities */
uint32_t caps2; /* Controller capabilities */
uint32_t capsem; /* Controller capabilities */
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