svn commit: r270241 - in stable/10/sys: arm/ti dev/iicbus

[Luiz Otavio O Souza]

Author: loos
Date: Wed Aug 20 19:12:19 2014
New Revision: 270241
URL: http://svnweb.freebsd.org/changeset/base/270241

Log:
  MFC r266923:
  
    Ignore IIC_ENOADDR from iicbus_reset() as it only means we have a
    master-only controller.
  
    This fixes the iic bus scan with i2c(8) (on supported controllers).
  
    Tested with gpioiic(4).
  
  MFC r267009:
  
    Remove the unnecessary i2c slave address assignment.
  
    The ti_i2c controller only works in the master mode and the i2c address
    passed on iicbus_reset() is used to set the controller slave address when
    operating as an i2c slave (which isn't currently supported).
  
    When talking to a slave, the slave address is correctly provided to
    ti_i2c_tranfer().

Modified:
  stable/10/sys/arm/ti/ti_i2c.c
  stable/10/sys/dev/iicbus/iic.c
Directory Properties:
  stable/10/   (props changed)

Modified: stable/10/sys/arm/ti/ti_i2c.c
==============================================================================
--- stable/10/sys/arm/ti/ti_i2c.c	Wed Aug 20 18:40:29 2014	(r270240)
+++ stable/10/sys/arm/ti/ti_i2c.c	Wed Aug 20 19:12:19 2014	(r270241)
@@ -91,7 +91,6 @@ struct ti_i2c_softc
 
 	volatile uint16_t	sc_stat_flags;	/* contains the status flags last IRQ */
 
-	uint16_t		sc_i2c_addr;
 	uint16_t		sc_rev;
 };
 
@@ -294,10 +293,6 @@ ti_i2c_reset(device_t dev, u_char speed,
 
 	TI_I2C_LOCK(sc);
 
-	if (oldaddr)
-		*oldaddr = sc->sc_i2c_addr;
-	sc->sc_i2c_addr = addr;
-
 	/* First disable the controller while changing the clocks */
 	con_reg = ti_i2c_read_reg(sc, I2C_REG_CON);
 	ti_i2c_write_reg(sc, I2C_REG_CON, 0x0000);
@@ -309,9 +304,6 @@ ti_i2c_reset(device_t dev, u_char speed,
 	ti_i2c_write_reg(sc, I2C_REG_SCLL, clkcfg->scll | (clkcfg->hsscll<<8));
 	ti_i2c_write_reg(sc, I2C_REG_SCLH, clkcfg->sclh | (clkcfg->hssclh<<8));
 
-	/* Set the remote slave address */
-	ti_i2c_write_reg(sc, I2C_REG_SA, addr);
-
 	/* Check if we are dealing with high speed mode */
 	if ((clkcfg->hsscll + clkcfg->hssclh) > 0)
 		con_reg  = I2C_CON_OPMODE_HS;
@@ -323,7 +315,7 @@ ti_i2c_reset(device_t dev, u_char speed,
 
 	TI_I2C_UNLOCK(sc);
 
-	return 0;
+	return (IIC_ENOADDR);
 }
 
 /**

Modified: stable/10/sys/dev/iicbus/iic.c
==============================================================================
--- stable/10/sys/dev/iicbus/iic.c	Wed Aug 20 18:40:29 2014	(r270240)
+++ stable/10/sys/dev/iicbus/iic.c	Wed Aug 20 19:12:19 2014	(r270241)
@@ -322,6 +322,12 @@ iicioctl(struct cdev *dev, u_long cmd, c
 
 	case I2CRSTCARD:
 		error = iicbus_reset(parent, IIC_UNKNOWN, 0, NULL);
+		/*
+		 * Ignore IIC_ENOADDR as it only means we have a master-only
+		 * controller.
+		 */
+		if (error == IIC_ENOADDR)
+			error = 0;
 		break;
 
 	case I2CWRITE: