svn commit: r258963 - stable/9/sys/dev/bge

[Pyun YongHyeon]

Author: yongari
Date: Thu Dec  5 07:20:03 2013
New Revision: 258963
URL: http://svnweb.freebsd.org/changeset/base/258963

Log:
  MFC r253480:
    Setup the PCIE Fast Training Sequence (FTS) value to prevent
    transmit hangs for 57766 and non Ax versions of 57765.
    While here, correct definition of BGE_CHIPREV_57765_AX.

Modified:
  stable/9/sys/dev/bge/if_bge.c
  stable/9/sys/dev/bge/if_bgereg.h
Directory Properties:
  stable/9/sys/   (props changed)
  stable/9/sys/dev/   (props changed)

Modified: stable/9/sys/dev/bge/if_bge.c
==============================================================================
--- stable/9/sys/dev/bge/if_bge.c	Thu Dec  5 07:18:32 2013	(r258962)
+++ stable/9/sys/dev/bge/if_bge.c	Thu Dec  5 07:20:03 2013	(r258963)
@@ -1796,6 +1796,20 @@ bge_chipinit(struct bge_softc *sc)
 		pci_write_config(sc->bge_dev, BGE_PCI_MSI_DATA + 2, val, 2);
 	}
 
+	if (sc->bge_asicrev == BGE_ASICREV_BCM57765 ||
+	    sc->bge_asicrev == BGE_ASICREV_BCM57766) {
+		/*
+		 * For the 57766 and non Ax versions of 57765, bootcode
+		 * needs to setup the PCIE Fast Training Sequence (FTS)
+		 * value to prevent transmit hangs.
+		 */
+		if (sc->bge_chiprev != BGE_CHIPREV_57765_AX) {
+			CSR_WRITE_4(sc, BGE_CPMU_PADRNG_CTL,
+			    CSR_READ_4(sc, BGE_CPMU_PADRNG_CTL) |
+			    BGE_CPMU_PADRNG_CTL_RDIV2);
+		}
+	}
+
 	/*
 	 * Set up the PCI DMA control register.
 	 */

Modified: stable/9/sys/dev/bge/if_bgereg.h
==============================================================================
--- stable/9/sys/dev/bge/if_bgereg.h	Thu Dec  5 07:18:32 2013	(r258962)
+++ stable/9/sys/dev/bge/if_bgereg.h	Thu Dec  5 07:20:03 2013	(r258963)
@@ -378,6 +378,7 @@
 #define	BGE_CHIPREV_5717_AX		0x57170
 #define	BGE_CHIPREV_5717_BX		0x57171
 #define	BGE_CHIPREV_5761_AX		0x57611
+#define	BGE_CHIPREV_57765_AX		0x577850
 #define	BGE_CHIPREV_5784_AX		0x57841
 
 /* PCI DMA Read/Write Control register */
@@ -1289,6 +1290,7 @@
 #define	BGE_CPMU_MUTEX_REQ		0x365C
 #define	BGE_CPMU_MUTEX_GNT		0x3660
 #define	BGE_CPMU_PHY_STRAP		0x3664
+#define	BGE_CPMU_PADRNG_CTL		0x3668
 
 /* Central Power Management Unit (CPMU) register */
 #define	BGE_CPMU_CTRL_LINK_IDLE_MODE	0x00000200
@@ -1328,6 +1330,9 @@
 /* CPMU GPHY Strap register */
 #define	BGE_CPMU_PHY_STRAP_IS_SERDES	0x00000020
 
+/* CPMU Padring Control register */
+#define	BGE_CPMU_PADRNG_CTL_RDIV2	0x00040000
+
 /*
  * Mbuf Cluster Free registers (has nothing to do with BSD mbufs)
  */