svn commit: r236080 - stable/9/sys/arm/at91
Marius Strobl
marius at FreeBSD.org
Sat May 26 09:03:14 UTC 2012
Author: marius
Date: Sat May 26 09:03:14 2012
New Revision: 236080
URL: http://svn.freebsd.org/changeset/base/236080
Log:
MFC: r234281
- Try to bring these files closer to style(9).
- Use DEVMETHOD_END.
- Use NULL instead of 0 for pointers.
Modified:
stable/9/sys/arm/at91/at91_pio.c
stable/9/sys/arm/at91/at91_piovar.h
stable/9/sys/arm/at91/at91_pit.c
stable/9/sys/arm/at91/at91_pmc.c
stable/9/sys/arm/at91/at91_rst.c
stable/9/sys/arm/at91/at91_twi.c
stable/9/sys/arm/at91/at91_twireg.h
stable/9/sys/arm/at91/at91_wdt.c
stable/9/sys/arm/at91/at91reg.h
stable/9/sys/arm/at91/at91sam9260.c
stable/9/sys/arm/at91/at91var.h
stable/9/sys/arm/at91/if_ate.c
Directory Properties:
stable/9/sys/ (props changed)
stable/9/sys/amd64/include/xen/ (props changed)
stable/9/sys/boot/ (props changed)
stable/9/sys/boot/i386/efi/ (props changed)
stable/9/sys/boot/ia64/efi/ (props changed)
stable/9/sys/boot/ia64/ski/ (props changed)
stable/9/sys/boot/powerpc/boot1.chrp/ (props changed)
stable/9/sys/boot/powerpc/ofw/ (props changed)
stable/9/sys/cddl/contrib/opensolaris/ (props changed)
stable/9/sys/conf/ (props changed)
stable/9/sys/contrib/dev/acpica/ (props changed)
stable/9/sys/contrib/octeon-sdk/ (props changed)
stable/9/sys/contrib/pf/ (props changed)
stable/9/sys/contrib/x86emu/ (props changed)
stable/9/sys/dev/ (props changed)
stable/9/sys/dev/e1000/ (props changed)
stable/9/sys/dev/ixgbe/ (props changed)
stable/9/sys/fs/ (props changed)
stable/9/sys/fs/ntfs/ (props changed)
stable/9/sys/modules/ (props changed)
Modified: stable/9/sys/arm/at91/at91_pio.c
==============================================================================
--- stable/9/sys/arm/at91/at91_pio.c Sat May 26 08:58:29 2012 (r236079)
+++ stable/9/sys/arm/at91/at91_pio.c Sat May 26 09:03:14 2012 (r236080)
@@ -52,30 +52,32 @@ struct at91_pio_softc
struct mtx sc_mtx; /* basically a perimeter lock */
struct cdev *cdev;
int flags;
-#define OPENED 1
+#define OPENED 1
};
static inline uint32_t
RD4(struct at91_pio_softc *sc, bus_size_t off)
{
+
return (bus_read_4(sc->mem_res, off));
}
static inline void
WR4(struct at91_pio_softc *sc, bus_size_t off, uint32_t val)
{
+
bus_write_4(sc->mem_res, off, val);
}
-#define AT91_PIO_LOCK(_sc) mtx_lock_spin(&(_sc)->sc_mtx)
+#define AT91_PIO_LOCK(_sc) mtx_lock_spin(&(_sc)->sc_mtx)
#define AT91_PIO_UNLOCK(_sc) mtx_unlock_spin(&(_sc)->sc_mtx)
-#define AT91_PIO_LOCK_INIT(_sc) \
+#define AT91_PIO_LOCK_INIT(_sc) \
mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->dev), \
"pio", MTX_SPIN)
-#define AT91_PIO_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx);
-#define AT91_PIO_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED);
-#define AT91_PIO_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED);
-#define CDEV2SOFTC(dev) ((dev)->si_drv1)
+#define AT91_PIO_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx);
+#define AT91_PIO_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED);
+#define AT91_PIO_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED);
+#define CDEV2SOFTC(dev) ((dev)->si_drv1)
static devclass_t at91_pio_devclass;
@@ -132,9 +134,10 @@ at91_pio_probe(device_t dev)
static int
at91_pio_attach(device_t dev)
{
- struct at91_pio_softc *sc = device_get_softc(dev);
+ struct at91_pio_softc *sc;
int err;
+ sc = device_get_softc(dev);
sc->dev = dev;
err = at91_pio_activate(dev);
if (err)
@@ -146,7 +149,7 @@ at91_pio_attach(device_t dev)
AT91_PIO_LOCK_INIT(sc);
/*
- * Activate the interrupt, but disable all interrupts in the hardware
+ * Activate the interrupt, but disable all interrupts in the hardware.
*/
WR4(sc, PIO_IDR, 0xffffffff);
err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC,
@@ -171,6 +174,7 @@ out:;
static int
at91_pio_detach(device_t dev)
{
+
return (EBUSY); /* XXX */
}
@@ -215,7 +219,6 @@ at91_pio_deactivate(device_t dev)
bus_release_resource(dev, SYS_RES_IRQ,
rman_get_rid(sc->irq_res), sc->irq_res);
sc->irq_res = 0;
- return;
}
static int
@@ -225,7 +228,7 @@ at91_pio_intr(void *xsc)
#if 0
uint32_t status;
- /* Reading the status also clears the interrupt */
+ /* Reading the status also clears the interrupt. */
status = RD4(sc, PIO_SR);
if (status == 0)
return;
@@ -236,7 +239,7 @@ at91_pio_intr(void *xsc)
return (FILTER_HANDLED);
}
-static int
+static int
at91_pio_open(struct cdev *dev, int oflags, int devtype, struct thread *td)
{
struct at91_pio_softc *sc;
@@ -246,11 +249,11 @@ at91_pio_open(struct cdev *dev, int ofla
if (!(sc->flags & OPENED)) {
sc->flags |= OPENED;
#if 0
- // Enable interrupts
+ /* Enable interrupts. */
#endif
}
AT91_PIO_UNLOCK(sc);
- return (0);
+ return (0);
}
static int
@@ -262,7 +265,7 @@ at91_pio_close(struct cdev *dev, int ffl
AT91_PIO_LOCK(sc);
sc->flags &= ~OPENED;
#if 0
- // Disable interrupts
+ /* Disable interrupts. */
#endif
AT91_PIO_UNLOCK(sc);
return (0);
@@ -272,6 +275,7 @@ static int
at91_pio_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag,
struct thread *td)
{
+
return (ENXIO);
}
@@ -280,6 +284,7 @@ at91_pio_ioctl(struct cdev *dev, u_long
* don't use bus_space, as that isn't yet available when we need to use
* them.
*/
+
void
at91_pio_use_periph_a(uint32_t pio, uint32_t periph_a_mask, int use_pullup)
{
@@ -369,11 +374,10 @@ at91_pio_gpio_set_deglitch(uint32_t pio,
PIO[PIO_IFER / 4] = data_mask;
else
PIO[PIO_IFDR / 4] = data_mask;
- return;
}
void
-at91_pio_gpio_set_interrupt(uint32_t pio, uint32_t data_mask,
+at91_pio_gpio_set_interrupt(uint32_t pio, uint32_t data_mask,
int enable_interrupt)
{
uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
@@ -382,14 +386,14 @@ at91_pio_gpio_set_interrupt(uint32_t pio
PIO[PIO_IER / 4] = data_mask;
else
PIO[PIO_IDR / 4] = data_mask;
- return;
}
uint32_t
at91_pio_gpio_clear_interrupt(uint32_t pio)
{
uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
- /* reading this register will clear the interrupts */
+
+ /* Reading this register will clear the interrupts. */
return (PIO[PIO_ISR / 4]);
}
@@ -399,7 +403,7 @@ static device_method_t at91_pio_methods[
DEVMETHOD(device_attach, at91_pio_attach),
DEVMETHOD(device_detach, at91_pio_detach),
- { 0, 0 }
+ DEVMETHOD_END
};
static driver_t at91_pio_driver = {
@@ -408,4 +412,5 @@ static driver_t at91_pio_driver = {
sizeof(struct at91_pio_softc),
};
-DRIVER_MODULE(at91_pio, atmelarm, at91_pio_driver, at91_pio_devclass, 0, 0);
+DRIVER_MODULE(at91_pio, atmelarm, at91_pio_driver, at91_pio_devclass, NULL,
+ NULL);
Modified: stable/9/sys/arm/at91/at91_piovar.h
==============================================================================
--- stable/9/sys/arm/at91/at91_piovar.h Sat May 26 08:58:29 2012 (r236079)
+++ stable/9/sys/arm/at91/at91_piovar.h Sat May 26 09:03:14 2012 (r236080)
@@ -26,19 +26,23 @@
/* $FreeBSD$ */
#ifndef ARM_AT91_AT91_PIOVAR_H
-#define ARM_AT91_AT91_PIOVAR_H
+#define ARM_AT91_AT91_PIOVAR_H
-void at91_pio_use_periph_a(uint32_t pio, uint32_t periph_a_mask, int use_pullup);
-void at91_pio_use_periph_b(uint32_t pio, uint32_t periph_b_mask, int use_pullup);
+void at91_pio_use_periph_a(uint32_t pio, uint32_t periph_a_mask,
+ int use_pullup);
+void at91_pio_use_periph_b(uint32_t pio, uint32_t periph_b_mask,
+ int use_pullup);
void at91_pio_use_gpio(uint32_t pio, uint32_t gpio_mask);
void at91_pio_gpio_input(uint32_t pio, uint32_t input_enable_mask);
void at91_pio_gpio_output(uint32_t pio, uint32_t output_enable_mask,
- int use_pullup);
+ int use_pullup);
void at91_pio_gpio_set(uint32_t pio, uint32_t data_mask);
void at91_pio_gpio_clear(uint32_t pio, uint32_t data_mask);
uint8_t at91_pio_gpio_get(uint32_t pio, uint32_t data_mask);
-void at91_pio_gpio_set_deglitch(uint32_t pio, uint32_t data_mask, int use_deglitch);
-void at91_pio_gpio_set_interrupt(uint32_t pio, uint32_t data_mask, int enable_interrupt);
+void at91_pio_gpio_set_deglitch(uint32_t pio, uint32_t data_mask,
+ int use_deglitch);
+void at91_pio_gpio_set_interrupt(uint32_t pio, uint32_t data_mask,
+ int enable_interrupt);
uint32_t at91_pio_gpio_clear_interrupt(uint32_t pio);
#endif /* ARM_AT91_AT91_PIOVAR_H */
Modified: stable/9/sys/arm/at91/at91_pit.c
==============================================================================
--- stable/9/sys/arm/at91/at91_pit.c Sat May 26 08:58:29 2012 (r236079)
+++ stable/9/sys/arm/at91/at91_pit.c Sat May 26 09:03:14 2012 (r236080)
@@ -59,12 +59,14 @@ static uint32_t timecount = 0;
static inline uint32_t
RD4(struct pit_softc *sc, bus_size_t off)
{
+
return (bus_read_4(sc->mem_res, off));
}
static inline void
WR4(struct pit_softc *sc, bus_size_t off, uint32_t val)
{
+
bus_write_4(sc->mem_res, off, val);
}
@@ -112,11 +114,11 @@ at91pit_attach(device_t dev)
RF_ACTIVE);
if (sc->mem_res == NULL)
- panic("couldn't allocate register resources");
+ panic("couldn't allocate register resources");
rid = 0;
irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 1, 1, 1,
- RF_ACTIVE | RF_SHAREABLE);
+ RF_ACTIVE | RF_SHAREABLE);
if (!irq) {
device_printf(dev, "could not allocate interrupt resources.\n");
err = ENOMEM;
@@ -124,16 +126,15 @@ at91pit_attach(device_t dev)
}
/* Activate the interrupt. */
- err = bus_setup_intr(dev, irq, INTR_TYPE_CLK, pit_intr,
- NULL, NULL, &ih);
-
+ err = bus_setup_intr(dev, irq, INTR_TYPE_CLK, pit_intr, NULL, NULL,
+ &ih);
+
at91pit_timecounter.tc_frequency = at91_master_clock / PIT_PRESCALE;
tc_init(&at91pit_timecounter);
- //Enable the PIT here.
- WR4(sc, PIT_MR,
- PIT_PIV(at91_master_clock / PIT_PRESCALE / hz) |
- PIT_EN | PIT_IEN);
+ /* Enable the PIT here. */
+ WR4(sc, PIT_MR, PIT_PIV(at91_master_clock / PIT_PRESCALE / hz) |
+ PIT_EN | PIT_IEN);
out:
return (err);
}
@@ -141,7 +142,7 @@ out:
static device_method_t at91pit_methods[] = {
DEVMETHOD(device_probe, at91pit_probe),
DEVMETHOD(device_attach, at91pit_attach),
- {0,0},
+ DEVMETHOD_END
};
static driver_t at91pit_driver = {
@@ -152,7 +153,8 @@ static driver_t at91pit_driver = {
static devclass_t at91pit_devclass;
-DRIVER_MODULE(at91_pit, atmelarm, at91pit_driver, at91pit_devclass, 0, 0);
+DRIVER_MODULE(at91_pit, atmelarm, at91pit_driver, at91pit_devclass, NULL,
+ NULL);
static int
pit_intr(void *arg)
@@ -175,7 +177,7 @@ pit_intr(void *arg)
static unsigned
at91pit_get_timecount(struct timecounter *tc)
{
- uint32_t piir, icnt;
+ uint32_t piir, icnt;
piir = RD4(sc, PIT_PIIR); /* Current count | over flows */
icnt = piir >> 20; /* Overflows */
@@ -192,7 +194,7 @@ DELAY(int us)
last = PIT_PIV(RD4(sc, PIT_PIIR));
/* Max delay ~= 260s. @ 133Mhz */
- pit_freq = at91_master_clock / PIT_PRESCALE;
+ pit_freq = at91_master_clock / PIT_PRESCALE;
cnt = ((pit_freq * us) + (mhz -1)) / mhz;
cnt = (cnt <= 0) ? 1 : cnt;
@@ -211,14 +213,17 @@ DELAY(int us)
void
cpu_startprofclock(void)
{
+
}
void
cpu_stopprofclock(void)
{
+
}
void
cpu_initclocks(void)
{
+
}
Modified: stable/9/sys/arm/at91/at91_pmc.c
==============================================================================
--- stable/9/sys/arm/at91/at91_pmc.c Sat May 26 08:58:29 2012 (r236079)
+++ stable/9/sys/arm/at91/at91_pmc.c Sat May 26 09:03:14 2012 (r236080)
@@ -180,9 +180,8 @@ at91_pmc_set_pllb_mode(struct at91_pmc_c
if (on) {
on = PMC_IER_LOCKB;
value = sc->pllb_init;
- } else {
+ } else
value = 0;
- }
/* Workaround RM9200 Errata #26 */
if (at91_is_rm92() &&
@@ -232,12 +231,12 @@ at91_pmc_clock_add(const char *name, uin
int i, buflen;
clk = malloc(sizeof(*clk), M_PMC, M_NOWAIT | M_ZERO);
- if (clk == NULL)
+ if (clk == NULL)
goto err;
buflen = strlen(name) + 1;
clk->name = malloc(buflen, M_PMC, M_NOWAIT);
- if (clk->name == NULL)
+ if (clk->name == NULL)
goto err;
strlcpy(clk->name, name, buflen);
@@ -256,7 +255,7 @@ at91_pmc_clock_add(const char *name, uin
}
err:
if (clk != NULL) {
- if (clk->name != NULL)
+ if (clk->name != NULL)
free(clk->name, M_PMC);
free(clk, M_PMC);
}
@@ -331,15 +330,16 @@ at91_pmc_pll_rate(struct at91_pmc_clock
div = (reg >> clk->pll_div_shift) & clk->pll_div_mask;
mul = (reg >> clk->pll_mul_shift) & clk->pll_mul_mask;
-// printf("pll = (%d / %d) * %d = %d\n",
-// freq, div ,mul + 1, (freq/div) * (mul+1));
+#if 0
+ printf("pll = (%d / %d) * %d = %d\n",
+ freq, div, mul + 1, (freq/div) * (mul+1));
+#endif
if (div != 0 && mul != 0) {
freq /= div;
freq *= mul + 1;
- } else {
+ } else
freq = 0;
- }
clk->hz = freq;
@@ -431,9 +431,8 @@ at91_pmc_init_clock(struct at91_pmc_soft
if (at91_is_rm92()) {
WR4(sc, PMC_SCDR, PMC_SCER_UHP | PMC_SCER_UDP);
WR4(sc, PMC_SCER, PMC_SCER_MCKUDP);
- } else {
+ } else
WR4(sc, PMC_SCDR, PMC_SCER_UHP_SAM9 | PMC_SCER_UDP_SAM9);
- }
WR4(sc, CKGR_PLLBR, 0);
/*
@@ -443,15 +442,14 @@ at91_pmc_init_clock(struct at91_pmc_soft
mck.parent = clock_list[mckr & 0x3];
mck.parent->refcnt++;
- cpu.hz =
- mck.hz = mck.parent->hz /
- (1 << ((mckr & PMC_MCKR_PRES_MASK) >> 2));
+ cpu.hz = mck.hz = mck.parent->hz /
+ (1 << ((mckr & PMC_MCKR_PRES_MASK) >> 2));
mdiv = (mckr & PMC_MCKR_MDIV_MASK) >> 8;
if (at91_is_sam9()) {
if (mdiv > 0)
mck.hz /= mdiv * 2;
- } else
+ } else
mck.hz /= (1 + mdiv);
/* Only found on SAM9G20 */
@@ -574,7 +572,7 @@ at91_pmc_attach(device_t dev)
static device_method_t at91_pmc_methods[] = {
DEVMETHOD(device_probe, at91_pmc_probe),
DEVMETHOD(device_attach, at91_pmc_attach),
- {0, 0},
+ DEVMETHOD_END
};
static driver_t at91_pmc_driver = {
@@ -584,4 +582,5 @@ static driver_t at91_pmc_driver = {
};
static devclass_t at91_pmc_devclass;
-DRIVER_MODULE(at91_pmc, atmelarm, at91_pmc_driver, at91_pmc_devclass, 0, 0);
+DRIVER_MODULE(at91_pmc, atmelarm, at91_pmc_driver, at91_pmc_devclass, NULL,
+ NULL);
Modified: stable/9/sys/arm/at91/at91_rst.c
==============================================================================
--- stable/9/sys/arm/at91/at91_rst.c Sat May 26 08:58:29 2012 (r236079)
+++ stable/9/sys/arm/at91/at91_rst.c Sat May 26 09:03:14 2012 (r236080)
@@ -40,7 +40,7 @@ __FBSDID("$FreeBSD$");
#include <arm/at91/at91board.h>
#define RST_TIMEOUT (5) /* Seconds to hold NRST for hard reset */
-#define RST_TICK (20) /* sample NRST at hz/RST_TICK intervals */
+#define RST_TICK (20) /* sample NRST at hz/RST_TICK intervals */
static int rst_intr(void *arg);
@@ -122,7 +122,7 @@ at91_rst_attach(device_t dev)
case RST_SR_RST_WAKE:
cause = "Wake Up";
break;
- case RST_SR_RST_WDT:
+ case RST_SR_RST_WDT:
cause = "Watchdog";
break;
case RST_SR_RST_SOFT:
@@ -153,7 +153,7 @@ rst_tick(void *argp)
cpu_reset();
} else if ((RD4(sc, RST_SR) & RST_SR_NRSTL)) {
/* User released the button in less than RST_TIMEOUT */
- sc->shutdown = 0;
+ sc->shutdown = 0;
device_printf(sc->sc_dev, "shutting down...\n");
shutdown_nice(0);
} else {
@@ -167,7 +167,7 @@ rst_intr(void *argp)
struct rst_softc *sc = argp;
if (RD4(sc, RST_SR) & RST_SR_URSTS) {
- if (sc->shutdown == 0)
+ if (sc->shutdown == 0)
callout_reset(&sc->tick_ch, hz/RST_TICK, rst_tick, sc);
return (FILTER_HANDLED);
}
@@ -177,7 +177,7 @@ rst_intr(void *argp)
static device_method_t at91_rst_methods[] = {
DEVMETHOD(device_probe, at91_rst_probe),
DEVMETHOD(device_attach, at91_rst_attach),
- {0,0},
+ DEVMETHOD_END
};
static driver_t at91_rst_driver = {
@@ -188,7 +188,8 @@ static driver_t at91_rst_driver = {
static devclass_t at91_rst_devclass;
-DRIVER_MODULE(at91_rst, atmelarm, at91_rst_driver, at91_rst_devclass, 0, 0);
+DRIVER_MODULE(at91_rst, atmelarm, at91_rst_driver, at91_rst_devclass, NULL,
+ NULL);
void cpu_reset_sam9g20(void) __attribute__((weak));
void cpu_reset_sam9g20(void) {}
@@ -198,7 +199,6 @@ cpu_reset(void)
{
if (rst_sc) {
-
cpu_reset_sam9g20(); /* May be null */
WR4(rst_sc, RST_MR,
@@ -211,5 +211,6 @@ cpu_reset(void)
RST_CR_KEY);
}
- for(;;) ;
+ for(;;)
+ ;
}
Modified: stable/9/sys/arm/at91/at91_twi.c
==============================================================================
--- stable/9/sys/arm/at91/at91_twi.c Sat May 26 08:58:29 2012 (r236079)
+++ stable/9/sys/arm/at91/at91_twi.c Sat May 26 09:03:14 2012 (r236080)
@@ -46,9 +46,9 @@ __FBSDID("$FreeBSD$");
#include <dev/iicbus/iicbus.h>
#include "iicbus_if.h"
-#define TWI_SLOW_CLOCK 1500
-#define TWI_FAST_CLOCK 45000
-#define TWI_FASTEST_CLOCK 90000
+#define TWI_SLOW_CLOCK 1500
+#define TWI_FAST_CLOCK 45000
+#define TWI_FASTEST_CLOCK 90000
struct at91_twi_softc
{
@@ -67,24 +67,26 @@ struct at91_twi_softc
static inline uint32_t
RD4(struct at91_twi_softc *sc, bus_size_t off)
{
+
return bus_read_4(sc->mem_res, off);
}
static inline void
WR4(struct at91_twi_softc *sc, bus_size_t off, uint32_t val)
{
+
bus_write_4(sc->mem_res, off, val);
}
-#define AT91_TWI_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
+#define AT91_TWI_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
#define AT91_TWI_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
-#define AT91_TWI_LOCK_INIT(_sc) \
+#define AT91_TWI_LOCK_INIT(_sc) \
mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->dev), \
"twi", MTX_DEF)
-#define AT91_TWI_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx);
-#define AT91_TWI_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED);
-#define AT91_TWI_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED);
-#define TWI_DEF_CLK 100000
+#define AT91_TWI_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx);
+#define AT91_TWI_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED);
+#define AT91_TWI_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED);
+#define TWI_DEF_CLK 100000
static devclass_t at91_twi_devclass;
@@ -102,6 +104,7 @@ static void at91_twi_deactivate(device_t
static int
at91_twi_probe(device_t dev)
{
+
device_set_desc(dev, "TWI");
return (0);
}
@@ -385,7 +388,7 @@ static device_method_t at91_twi_methods[
DEVMETHOD(iicbus_callback, at91_twi_callback),
DEVMETHOD(iicbus_reset, at91_twi_rst_card),
DEVMETHOD(iicbus_transfer, at91_twi_transfer),
- { 0, 0 }
+ DEVMETHOD_END
};
static driver_t at91_twi_driver = {
@@ -394,6 +397,7 @@ static driver_t at91_twi_driver = {
sizeof(struct at91_twi_softc),
};
-DRIVER_MODULE(at91_twi, atmelarm, at91_twi_driver, at91_twi_devclass, 0, 0);
-DRIVER_MODULE(iicbus, at91_twi, iicbus_driver, iicbus_devclass, 0, 0);
+DRIVER_MODULE(at91_twi, atmelarm, at91_twi_driver, at91_twi_devclass, NULL,
+ NULL);
+DRIVER_MODULE(iicbus, at91_twi, iicbus_driver, iicbus_devclass, NULL, NULL);
MODULE_DEPEND(at91_twi, iicbus, 1, 1, 1);
Modified: stable/9/sys/arm/at91/at91_twireg.h
==============================================================================
--- stable/9/sys/arm/at91/at91_twireg.h Sat May 26 08:58:29 2012 (r236079)
+++ stable/9/sys/arm/at91/at91_twireg.h Sat May 26 09:03:14 2012 (r236080)
@@ -26,61 +26,61 @@
/* $FreeBSD$ */
#ifndef ARM_AT91_AT91_TWIREG_H
-#define ARM_AT91_AT91_TWIREG_H
+#define ARM_AT91_AT91_TWIREG_H
-#define TWI_CR 0x00 /* TWI Control Register */
-#define TWI_MMR 0x04 /* TWI Master Mode Register */
-#define TWI_SMR 0x08 /* TWI Master Mode Register */
-#define TWI_IADR 0x0c /* TWI Internal Address Register */
-#define TWI_CWGR 0x10 /* TWI Clock Waveform Generator Reg */
+#define TWI_CR 0x00 /* TWI Control Register */
+#define TWI_MMR 0x04 /* TWI Master Mode Register */
+#define TWI_SMR 0x08 /* TWI Master Mode Register */
+#define TWI_IADR 0x0c /* TWI Internal Address Register */
+#define TWI_CWGR 0x10 /* TWI Clock Waveform Generator Reg */
/* 0x14 reserved */
/* 0x18 reserved */
/* 0x1c reserved */
-#define TWI_SR 0x20 /* TWI Status Register */
-#define TWI_IER 0x24 /* TWI Interrupt Enable Register */
-#define TWI_IDR 0x28 /* TWI Interrupt Disable Register */
-#define TWI_IMR 0x2c /* TWI Interrupt Mask Register */
-#define TWI_RHR 0x30 /* TWI Receiver Holding Register */
-#define TWI_THR 0x34 /* TWI Transmit Holding Register */
+#define TWI_SR 0x20 /* TWI Status Register */
+#define TWI_IER 0x24 /* TWI Interrupt Enable Register */
+#define TWI_IDR 0x28 /* TWI Interrupt Disable Register */
+#define TWI_IMR 0x2c /* TWI Interrupt Mask Register */
+#define TWI_RHR 0x30 /* TWI Receiver Holding Register */
+#define TWI_THR 0x34 /* TWI Transmit Holding Register */
/* TWI_CR */
-#define TWI_CR_START (1U << 0) /* Send a start */
-#define TWI_CR_STOP (1U << 1) /* Send a stop */
-#define TWI_CR_MSEN (1U << 2) /* Master Transfer Enable */
-#define TWI_CR_MSDIS (1U << 3) /* Master Transfer Disable */
-#define TWI_CR_SVEN (1U << 4) /* Slave Transfer Enable */
-#define TWI_CR_SVDIS (1U << 5) /* Slave Transfer Disable */
-#define TWI_CR_SWRST (1U << 7) /* Software Reset */
+#define TWI_CR_START (1U << 0) /* Send a start */
+#define TWI_CR_STOP (1U << 1) /* Send a stop */
+#define TWI_CR_MSEN (1U << 2) /* Master Transfer Enable */
+#define TWI_CR_MSDIS (1U << 3) /* Master Transfer Disable */
+#define TWI_CR_SVEN (1U << 4) /* Slave Transfer Enable */
+#define TWI_CR_SVDIS (1U << 5) /* Slave Transfer Disable */
+#define TWI_CR_SWRST (1U << 7) /* Software Reset */
/* TWI_MMR */
/* TWI_SMR */
-#define TWI_MMR_IADRSZ(n) ((n) << 8) /* Set size of transfer */
-#define TWI_MMR_MWRITE 0U /* Master Read Direction */
-#define TWI_MMR_MREAD (1U << 12) /* Master Read Direction */
-#define TWI_MMR_DADR(n) ((n) << 15) /* Device Address */
+#define TWI_MMR_IADRSZ(n) ((n) << 8) /* Set size of transfer */
+#define TWI_MMR_MWRITE 0U /* Master Read Direction */
+#define TWI_MMR_MREAD (1U << 12) /* Master Read Direction */
+#define TWI_MMR_DADR(n) ((n) << 15) /* Device Address */
/* TWI_CWGR */
-#define TWI_CWGR_CKDIV(x) ((x) << 16) /* Clock Divider */
-#define TWI_CWGR_CHDIV(x) ((x) << 8) /* Clock High Divider */
-#define TWI_CWGR_CLDIV(x) ((x) << 0) /* Clock Low Divider */
-#define TWI_CWGR_DIV(rate) \
- (at91_is_sam9() ? \
- ((at91_master_clock /(4*(rate))) - 3) : \
- ((at91_master_clock /(4*(rate))) - 2))
+#define TWI_CWGR_CKDIV(x) ((x) << 16) /* Clock Divider */
+#define TWI_CWGR_CHDIV(x) ((x) << 8) /* Clock High Divider */
+#define TWI_CWGR_CLDIV(x) ((x) << 0) /* Clock Low Divider */
+#define TWI_CWGR_DIV(rate) \
+ (at91_is_sam9() ? \
+ ((at91_master_clock / (4 * (rate))) - 3) : \
+ ((at91_master_clock / (4 * (rate))) - 2))
/* TWI_SR */
/* TWI_IER */
/* TWI_IDR */
/* TWI_IMR */
-#define TWI_SR_TXCOMP (1U << 0) /* Transmission Completed */
-#define TWI_SR_RXRDY (1U << 1) /* Receive Holding Register Ready */
-#define TWI_SR_TXRDY (1U << 2) /* Transmit Holding Register Ready */
-#define TWI_SR_SVREAD (1U << 3) /* Slave Read */
-#define TWI_SR_SVACC (1U << 4) /* Slave Access */
-#define TWI_SR_GCACC (1U << 5) /* General Call Access */
-#define TWI_SR_OVRE (1U << 6) /* Overrun error */
-#define TWI_SR_UNRE (1U << 7) /* Underrun Error */
-#define TWI_SR_NACK (1U << 8) /* Not Acknowledged */
-#define TWI_SR_ARBLST (1U << 9) /* Arbitration Lost */
+#define TWI_SR_TXCOMP (1U << 0) /* Transmission Completed */
+#define TWI_SR_RXRDY (1U << 1) /* Receive Holding Register Ready */
+#define TWI_SR_TXRDY (1U << 2) /* Transmit Holding Register Ready */
+#define TWI_SR_SVREAD (1U << 3) /* Slave Read */
+#define TWI_SR_SVACC (1U << 4) /* Slave Access */
+#define TWI_SR_GCACC (1U << 5) /* General Call Access */
+#define TWI_SR_OVRE (1U << 6) /* Overrun error */
+#define TWI_SR_UNRE (1U << 7) /* Underrun Error */
+#define TWI_SR_NACK (1U << 8) /* Not Acknowledged */
+#define TWI_SR_ARBLST (1U << 9) /* Arbitration Lost */
#endif /* ARM_AT91_AT91_TWIREG_H */
Modified: stable/9/sys/arm/at91/at91_wdt.c
==============================================================================
--- stable/9/sys/arm/at91/at91_wdt.c Sat May 26 08:58:29 2012 (r236079)
+++ stable/9/sys/arm/at91/at91_wdt.c Sat May 26 09:03:14 2012 (r236080)
@@ -24,9 +24,9 @@
*/
/*
- * The sam9 watchdog hardware can be programed only once. So we set the hardware
- * watchdog to 16s in wdt_attach and only reset it in the wdt_tick
- * handler. The watchdog is halted in processor debug mode.
+ * The SAM9 watchdog hardware can be programed only once. So we set the
+ * hardware watchdog to 16 s in wdt_attach and only reset it in the wdt_tick
+ * handler. The watchdog is halted in processor debug mode.
*/
#include <sys/cdefs.h>
@@ -52,19 +52,21 @@ struct wdt_softc {
struct callout tick_ch;
eventhandler_tag sc_wet;
void *intrhand;
- u_int cmd;
- u_int interval;
+ u_int cmd;
+ u_int interval;
};
static inline uint32_t
RD4(struct wdt_softc *sc, bus_size_t off)
{
+
return (bus_read_4(sc->mem_res, off));
}
static inline void
WR4(struct wdt_softc *sc, bus_size_t off, uint32_t val)
{
+
bus_write_4(sc->mem_res, off, val);
}
@@ -157,7 +159,7 @@ wdt_attach(device_t dev)
RF_ACTIVE);
if (sc->mem_res == NULL)
- panic("couldn't allocate wdt register resources");
+ panic("couldn't allocate wdt register resources");
wdt_mr = RD4(sc, WDT_MR);
if ((wdt_mr & WDT_WDRSTEN) == 0)
@@ -172,9 +174,11 @@ wdt_attach(device_t dev)
WR4(sc, WDT_MR, WDT_WDDBGHLT | WDT_WDD(0xC00)|
WDT_WDFIEN| WDT_WDV(0xFFF));
#endif
- /* This may have been set by Boot ROM so register value
- * may not be what we just requested since this is a
- * write once register. */
+ /*
+ * This may have been set by Boot ROM so register value may
+ * not be what we just requested since this is a write once
+ * register.
+ */
wdt_mr = RD4(sc, WDT_MR);
if (wdt_mr & WDT_WDFIEN) {
rid = 0;
@@ -184,15 +188,15 @@ wdt_attach(device_t dev)
panic("could not allocate interrupt.\n");
err = bus_setup_intr(dev, irq, INTR_TYPE_CLK, wdt_intr,
- NULL, sc, &sc->intrhand);
+ NULL, sc, &sc->intrhand);
}
/* interval * hz */
sc->interval = (((wdt_mr & WDT_WDV(~0)) + 1) * WDT_DIV) /
- (WDT_CLOCK/hz);
+ (WDT_CLOCK/hz);
device_printf(dev, "watchdog timeout: %d seconds\n",
- sc->interval/hz);
+ sc->interval / hz);
/* Slightly less than 1/2 of watchdog hardware timeout */
sc->interval = (sc->interval/2) - (sc->interval/20);
@@ -208,7 +212,7 @@ wdt_attach(device_t dev)
static device_method_t wdt_methods[] = {
DEVMETHOD(device_probe, wdt_probe),
DEVMETHOD(device_attach, wdt_attach),
- {0,0},
+ DEVMETHOD_END
};
static driver_t wdt_driver = {
@@ -219,4 +223,4 @@ static driver_t wdt_driver = {
static devclass_t wdt_devclass;
-DRIVER_MODULE(at91_wdt, atmelarm, wdt_driver, wdt_devclass, 0, 0);
+DRIVER_MODULE(at91_wdt, atmelarm, wdt_driver, wdt_devclass, NULL, NULL);
Modified: stable/9/sys/arm/at91/at91reg.h
==============================================================================
--- stable/9/sys/arm/at91/at91reg.h Sat May 26 08:58:29 2012 (r236079)
+++ stable/9/sys/arm/at91/at91reg.h Sat May 26 09:03:14 2012 (r236080)
@@ -28,43 +28,44 @@
*/
#ifndef _AT91REG_H_
-#define _AT91REG_H_
+#define _AT91REG_H_
#include "opt_at91.h"
/* Where builtin peripherals start in KVM */
-#define AT91_BASE 0xd0000000
+#define AT91_BASE 0xd0000000
/* A few things that we count on being the same
* throught the whole family of SOCs */
/* SYSC System Controler */
/* System Registers */
-#define AT91_SYS_BASE 0xffff000
-#define AT91_SYS_SIZE 0x1000
+#define AT91_SYS_BASE 0xffff000
+#define AT91_SYS_SIZE 0x1000
#if defined(AT91SAM9G45) || defined(AT91SAM9263)
-#define AT91_DBGU_BASE 0xfffee00
+#define AT91_DBGU_BASE 0xfffee00
#else
-#define AT91_DBGU_BASE 0xffff200
+#define AT91_DBGU_BASE 0xffff200
#endif
-#define AT91_DBGU_SIZE 0x200
-#define DBGU_C1R (64) /* Chip ID1 Register */
-#define DBGU_C2R (68) /* Chip ID2 Register */
-#define DBGU_FNTR (72) /* Force NTRST Register */
-
-#define AT91_CPU_VERSION_MASK 0x0000001f
-#define AT91_CPU_RM9200 0x09290780
-#define AT91_CPU_SAM9260 0x019803a0
-#define AT91_CPU_SAM9261 0x019703a0
-#define AT91_CPU_SAM9263 0x019607a0
-#define AT91_CPU_SAM9G10 0x819903a0
-#define AT91_CPU_SAM9G20 0x019905a0
-#define AT91_CPU_SAM9G45 0x819b05a0
-
-#define AT91_ARCH(chipid) ((chipid >> 20) & 0xff)
-#define AT91_CPU(chipid) (chipid & ~AT91_CPU_VERSION_MASK)
-#define AT91_ARCH_SAM9 (0x19)
-#define AT91_ARCH_RM92 (0x92)
+#define AT91_DBGU_SIZE 0x200
+#define DBGU_C1R (64) /* Chip ID1 Register */
+#define DBGU_C2R (68) /* Chip ID2 Register */
+#define DBGU_FNTR (72) /* Force NTRST Register */
+
+#define AT91_CPU_VERSION_MASK 0x0000001f
+#define AT91_CPU_RM9200 0x09290780
+#define AT91_CPU_SAM9260 0x019803a0
+#define AT91_CPU_SAM9261 0x019703a0
+#define AT91_CPU_SAM9263 0x019607a0
+#define AT91_CPU_SAM9G10 0x819903a0
+#define AT91_CPU_SAM9G20 0x019905a0
+#define AT91_CPU_SAM9G45 0x819b05a0
+
+#define AT91_ARCH(chipid) ((chipid >> 20) & 0xff)
+#define AT91_CPU(chipid) (chipid & ~AT91_CPU_VERSION_MASK)
+#define AT91_ARCH_SAM9 (0x19)
+#define AT91_ARCH_SAM9XE (0x29)
+#define AT91_ARCH_RM92 (0x92)
#endif /* _AT91REG_H_ */
Modified: stable/9/sys/arm/at91/at91sam9260.c
==============================================================================
--- stable/9/sys/arm/at91/at91sam9260.c Sat May 26 08:58:29 2012 (r236079)
+++ stable/9/sys/arm/at91/at91sam9260.c Sat May 26 09:03:14 2012 (r236080)
@@ -93,7 +93,7 @@ static const int at91_irq_prio[32] =
0, /* Advanced Interrupt Controller IRQ2 */
};
-#define DEVICE(_name, _id, _unit) \
+#define DEVICE(_name, _id, _unit) \
{ \
_name, _unit, \
AT91SAM9260_ ## _id ##_BASE, \
@@ -157,7 +157,7 @@ at91_add_child(device_t dev, int prio, c
bus_set_resource(kid, SYS_RES_IRQ, 1, irq1, 1);
if (irq2 != 0)
bus_set_resource(kid, SYS_RES_IRQ, 2, irq2, 1);
- if (addr != 0 && addr < AT91SAM9260_BASE)
+ if (addr != 0 && addr < AT91SAM9260_BASE)
addr += AT91SAM9260_BASE;
if (addr != 0)
bus_set_resource(kid, SYS_RES_MEMORY, 0, addr, size);
@@ -182,13 +182,14 @@ at91_pll_outa(int freq)
if (freq > 195000000)
return (0x20000000);
- else
+ else
return (0x20008000);
}
static uint32_t
at91_pll_outb(int freq)
{
+
return (0x4000);
}
@@ -226,7 +227,7 @@ at91_attach(device_t dev)
sc->sc_sh = at91sc->sc_sh;
sc->dev = dev;
- /*
+ /*
* XXX These values work for the RM9200, SAM926[01], and SAM9260
* will have to fix this when we want to support anything else. XXX
*/
@@ -247,7 +248,7 @@ at91_attach(device_t dev)
at91sc->sc_irq_system = AT91SAM9260_IRQ_SYSTEM;
for (i = 0; i < 32; i++) {
- bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_SVR +
+ bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_SVR +
i * 4, i);
/* Priority. */
bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_SMR + i * 4,
@@ -276,10 +277,9 @@ at91_attach(device_t dev)
i = bus_space_read_4(sc->sc_st, sc->sc_matrix_sh,
AT91SAM9260_EBICSA);
bus_space_write_4(sc->sc_st, sc->sc_matrix_sh,
- AT91SAM9260_EBICSA,
+ AT91SAM9260_EBICSA,
i | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
-
/* Update USB device port clock info */
clk = at91_pmc_clock_ref("udpck");
clk->pmc_mask = PMC_SCER_UDP_SAM9;
@@ -304,11 +304,12 @@ at91_attach(device_t dev)
at91_pmc_clock_deref(clk);
/*
- * Fudge MAX pll in frequence down below 3.0 Mhz to ensure
- * PMC alogrithm choose the divisor that causes the input clock
- * to be near the optimal 2 Mhz per datasheet. We know
- * we are going to be using this for the USB clock at 96 Mhz.
- * Causes no extra frequency deviation for all recomended crystal values.
+ * Fudge MAX pll in frequence down below 3.0 MHz to ensure
+ * PMC alogrithm choose the divisor that causes the input clock
+ * to be near the optimal 2 MHz per datasheet. We know
+ * we are going to be using this for the USB clock at 96 MHz.
+ * Causes no extra frequency deviation for all recomended crystal
+ * values.
*/
clk = at91_pmc_clock_ref("pllb");
clk->pll_min_in = SAM9260_PLL_B_MIN_IN_FREQ; /* 1 MHz */
@@ -329,7 +330,7 @@ static device_method_t at91sam9260_metho
DEVMETHOD(device_probe, at91_probe),
DEVMETHOD(device_attach, at91_attach),
DEVMETHOD(device_identify, at91_identify),
- {0, 0},
+ DEVMETHOD_END
};
static driver_t at91sam9260_driver = {
@@ -340,4 +341,5 @@ static driver_t at91sam9260_driver = {
static devclass_t at91sam9260_devclass;
-DRIVER_MODULE(at91sam9260, atmelarm, at91sam9260_driver, at91sam9260_devclass, 0, 0);
+DRIVER_MODULE(at91sam9260, atmelarm, at91sam9260_driver, at91sam9260_devclass,
+ NULL, NULL);
Modified: stable/9/sys/arm/at91/at91var.h
==============================================================================
--- stable/9/sys/arm/at91/at91var.h Sat May 26 08:58:29 2012 (r236079)
+++ stable/9/sys/arm/at91/at91var.h Sat May 26 09:03:14 2012 (r236080)
@@ -62,24 +62,27 @@ struct cpu_devs
extern uint32_t at91_chip_id;
static inline int at91_is_rm92(void);
-static inline int at91_is_sam9(void) ;
+static inline int at91_is_sam9(void);
static inline int at91_cpu_is(u_int cpu);
-static inline int
-at91_is_rm92(void)
+static inline int
+at91_is_rm92(void)
{
+
return (AT91_ARCH(at91_chip_id) == AT91_ARCH_RM92);
}
-static inline int
-at91_is_sam9(void)
+static inline int
+at91_is_sam9(void)
{
+
return (AT91_ARCH(at91_chip_id) == AT91_ARCH_SAM9);
}
-static inline int
+static inline int
at91_cpu_is(u_int cpu)
{
+
return (AT91_CPU(at91_chip_id) == cpu);
}
Modified: stable/9/sys/arm/at91/if_ate.c
==============================================================================
--- stable/9/sys/arm/at91/if_ate.c Sat May 26 08:58:29 2012 (r236079)
+++ stable/9/sys/arm/at91/if_ate.c Sat May 26 09:03:14 2012 (r236080)
@@ -120,38 +120,38 @@ __FBSDID("$FreeBSD$");
struct ate_softc
{
- struct ifnet *ifp; /* ifnet pointer */
- struct mtx sc_mtx; /* Basically a perimeter lock */
- device_t dev; /* Myself */
- device_t miibus; /* My child miibus */
- struct resource *irq_res; /* IRQ resource */
- struct resource *mem_res; /* Memory resource */
- struct callout tick_ch; /* Tick callout */
+ struct ifnet *ifp; /* ifnet pointer */
+ struct mtx sc_mtx; /* Basically a perimeter lock */
+ device_t dev; /* Myself */
+ device_t miibus; /* My child miibus */
*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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