svn commit: r330200 - stable/11/sys/dev/iwm
Eitan Adler
eadler at FreeBSD.org
Thu Mar 1 06:33:28 UTC 2018
Author: eadler
Date: Thu Mar 1 06:33:27 2018
New Revision: 330200
URL: https://svnweb.freebsd.org/changeset/base/330200
Log:
MFC r318003:
[iwm] Add iwm_nic_unlock() calls missing from previous commit.
Modified:
stable/11/sys/dev/iwm/if_iwm.c
stable/11/sys/dev/iwm/if_iwm_pcie_trans.c
Directory Properties:
stable/11/ (props changed)
Modified: stable/11/sys/dev/iwm/if_iwm.c
==============================================================================
--- stable/11/sys/dev/iwm/if_iwm.c Thu Mar 1 06:32:46 2018 (r330199)
+++ stable/11/sys/dev/iwm/if_iwm.c Thu Mar 1 06:33:27 2018 (r330200)
@@ -1326,6 +1326,7 @@ iwm_stop_device(struct iwm_softc *sc)
if (iwm_nic_lock(sc)) {
iwm_write_prph(sc, IWM_APMG_CLK_DIS_REG,
IWM_APMG_CLK_VAL_DMA_CLK_RQT);
+ iwm_nic_unlock(sc);
}
DELAY(5);
}
@@ -2596,6 +2597,7 @@ iwm_pcie_load_given_ucode(struct iwm_softc *sc,
iwm_write_prph(sc,
IWM_LMPM_SECURE_UCODE_LOAD_CPU2_HDR_ADDR,
IWM_LMPM_SECURE_CPU2_HDR_MEM_SPACE);
+ iwm_nic_unlock(sc);
}
/* load to FW the binary sections of CPU2 */
@@ -2628,6 +2630,7 @@ iwm_pcie_load_given_ucode_8000(struct iwm_softc *sc,
if (iwm_nic_lock(sc)) {
iwm_write_prph(sc, IWM_RELEASE_CPU_RESET,
IWM_RELEASE_CPU_RESET_BIT);
+ iwm_nic_unlock(sc);
}
/* load to FW the binary Secured sections of CPU1 */
@@ -2886,6 +2889,7 @@ iwm_mvm_load_ucode_wait_alive(struct iwm_softc *sc,
if (iwm_nic_lock(sc)) {
a = iwm_read_prph(sc, IWM_SB_CPU_1_STATUS);
b = iwm_read_prph(sc, IWM_SB_CPU_2_STATUS);
+ iwm_nic_unlock(sc);
}
device_printf(sc->sc_dev,
"SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
Modified: stable/11/sys/dev/iwm/if_iwm_pcie_trans.c
==============================================================================
--- stable/11/sys/dev/iwm/if_iwm_pcie_trans.c Thu Mar 1 06:32:46 2018 (r330199)
+++ stable/11/sys/dev/iwm/if_iwm_pcie_trans.c Thu Mar 1 06:33:27 2018 (r330200)
@@ -501,11 +501,13 @@ iwm_apm_init(struct iwm_softc *sc)
if (iwm_nic_lock(sc)) {
iwm_read_prph(sc, IWM_OSC_CLK);
iwm_read_prph(sc, IWM_OSC_CLK);
+ iwm_nic_unlock(sc);
}
iwm_set_bits_prph(sc, IWM_OSC_CLK, IWM_OSC_CLK_FORCE_CONTROL);
if (iwm_nic_lock(sc)) {
iwm_read_prph(sc, IWM_OSC_CLK);
iwm_read_prph(sc, IWM_OSC_CLK);
+ iwm_nic_unlock(sc);
}
}
@@ -520,6 +522,7 @@ iwm_apm_init(struct iwm_softc *sc)
if (iwm_nic_lock(sc)) {
iwm_write_prph(sc, IWM_APMG_CLK_EN_REG,
IWM_APMG_CLK_VAL_DMA_CLK_RQT);
+ iwm_nic_unlock(sc);
}
DELAY(20);
@@ -531,6 +534,7 @@ iwm_apm_init(struct iwm_softc *sc)
if (iwm_nic_lock(sc)) {
iwm_write_prph(sc, IWM_APMG_RTC_INT_STT_REG,
IWM_APMG_RTC_INT_STT_RFKILL);
+ iwm_nic_unlock(sc);
}
}
out:
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