svn commit: r318328 - stable/11/sys/dev/uart

[Alexander Motin]

Author: mav
Date: Tue May 16 00:21:03 2017
New Revision: 318328
URL: https://svnweb.freebsd.org/changeset/base/318328

Log:
  MFC r317659, r317752:
  Make some UART consoles to not spin wait for data to be sent.
  
  At least with Tx FIFO enabled it shows me ~10% reduction of verbose boot
  time with serial console at 115200 baud.

Modified:
  stable/11/sys/dev/uart/uart_dev_lpc.c
  stable/11/sys/dev/uart/uart_dev_ns8250.c
Directory Properties:
  stable/11/   (props changed)

Modified: stable/11/sys/dev/uart/uart_dev_lpc.c
==============================================================================
--- stable/11/sys/dev/uart/uart_dev_lpc.c	Mon May 15 23:13:49 2017	(r318327)
+++ stable/11/sys/dev/uart/uart_dev_lpc.c	Tue May 16 00:21:03 2017	(r318328)
@@ -345,9 +345,6 @@ lpc_ns8250_putc(struct uart_bas *bas, in
 		DELAY(4);
 	uart_setreg(bas, REG_DATA, c);
 	uart_barrier(bas);
-	limit = 250000;
-	while ((uart_getreg(bas, REG_LSR) & LSR_TEMT) == 0 && --limit)
-		DELAY(4);
 }
 
 static int
@@ -890,8 +887,13 @@ lpc_ns8250_bus_transmit(struct uart_soft
 
 	bas = &sc->sc_bas;
 	uart_lock(sc->sc_hwmtx);
-	while ((uart_getreg(bas, REG_LSR) & LSR_THRE) == 0)
-		;
+	if (sc->sc_txdatasz > 1) {
+		if ((uart_getreg(bas, REG_LSR) & LSR_TEMT) == 0)
+			lpc_ns8250_drain(bas, UART_DRAIN_TRANSMITTER);
+	} else {
+		while ((uart_getreg(bas, REG_LSR) & LSR_THRE) == 0)
+			DELAY(4);
+	}
 	for (i = 0; i < sc->sc_txdatasz; i++) {
 		uart_setreg(bas, REG_DATA, sc->sc_txbuf[i]);
 		uart_barrier(bas);

Modified: stable/11/sys/dev/uart/uart_dev_ns8250.c
==============================================================================
--- stable/11/sys/dev/uart/uart_dev_ns8250.c	Mon May 15 23:13:49 2017	(r318327)
+++ stable/11/sys/dev/uart/uart_dev_ns8250.c	Tue May 16 00:21:03 2017	(r318328)
@@ -335,9 +335,6 @@ ns8250_putc(struct uart_bas *bas, int c)
 		DELAY(4);
 	uart_setreg(bas, REG_DATA, c);
 	uart_barrier(bas);
-	limit = 250000;
-	while ((uart_getreg(bas, REG_LSR) & LSR_TEMT) == 0 && --limit)
-		DELAY(4);
 }
 
 static int
@@ -968,8 +965,13 @@ ns8250_bus_transmit(struct uart_softc *s
 
 	bas = &sc->sc_bas;
 	uart_lock(sc->sc_hwmtx);
-	while ((uart_getreg(bas, REG_LSR) & LSR_THRE) == 0)
-		;
+	if (sc->sc_txdatasz > 1) {
+		if ((uart_getreg(bas, REG_LSR) & LSR_TEMT) == 0)
+			ns8250_drain(bas, UART_DRAIN_TRANSMITTER);
+	} else {
+		while ((uart_getreg(bas, REG_LSR) & LSR_THRE) == 0)
+			DELAY(4);
+	}
 	for (i = 0; i < sc->sc_txdatasz; i++) {
 		uart_setreg(bas, REG_DATA, sc->sc_txbuf[i]);
 		uart_barrier(bas);