svn commit: r289970 - stable/10/tools/regression/lib/msun

[Garrett Cooper]

Author: ngie
Date: Mon Oct 26 00:06:04 2015
New Revision: 289970
URL: https://svnweb.freebsd.org/changeset/base/289970

Log:
  MFC r289332:
  
  Fix test-fenv:test_dfl_env when run on some amd64 CPUs
  
  Compare the fields that the AMD [1] and Intel [2] specs say will be
  set once fnstenv returns.
  
  Not all amd64 capable processors zero out the env.__x87.__other field
  (example: AMD Opteron 6308). The AMD64/x64 specs aren't explicit on what the
  env.__x87.__other field will contain after fnstenv is executed, so the values
  in env.__x87.__other could be filled with arbitrary data depending on how the
  CPU-specific implementation of fnstenv.
  
  1. http://support.amd.com/TechDocs/26569_APM_v5.pdf
  2. http://www.intel.com/Assets/en_US/PDF/manual/253666.pdf
  
  Discussed with: kib, Anton Rang <anton.rang at isilon.com>
  Reviewed by: Daniel O'Connor <darius at dons.net.au> (earlier patch; pre-generalization)
  Sponsored by: EMC / Isilon Storage Division
  Reported by: Bill Morchin <wmorchin at isilon.com>

Modified:
  stable/10/tools/regression/lib/msun/test-fenv.c
Directory Properties:
  stable/10/   (props changed)

Modified: stable/10/tools/regression/lib/msun/test-fenv.c
==============================================================================
--- stable/10/tools/regression/lib/msun/test-fenv.c	Mon Oct 26 00:05:02 2015	(r289969)
+++ stable/10/tools/regression/lib/msun/test-fenv.c	Mon Oct 26 00:06:04 2015	(r289970)
@@ -133,8 +133,35 @@ test_dfl_env(void)
 	fenv_t env;
 
 	fegetenv(&env);
+
+#ifdef __amd64__
+	/*
+	 * Compare the fields that the AMD [1] and Intel [2] specs say will be
+	 * set once fnstenv returns.
+	 *
+	 * Not all amd64 capable processors implement the fnstenv instruction
+	 * by zero'ing out the env.__x87.__other field (example: AMD Opteron
+	 * 6308). The AMD64/x64 specs aren't explicit on what the
+	 * env.__x87.__other field will contain after fnstenv is executed, so
+	 * the values in env.__x87.__other could be filled with arbitrary
+	 * data depending on how the CPU implements fnstenv.
+	 *
+	 * 1. http://support.amd.com/TechDocs/26569_APM_v5.pdf
+	 * 2. http://www.intel.com/Assets/en_US/PDF/manual/253666.pdf
+	 */
+	assert(memcmp(&env.__mxcsr, &FE_DFL_ENV->__mxcsr,
+	    sizeof(env.__mxcsr)) == 0);
+	assert(memcmp(&env.__x87.__control, &FE_DFL_ENV->__x87.__control,
+	    sizeof(env.__x87.__control)) == 0);
+	assert(memcmp(&env.__x87.__status, &FE_DFL_ENV->__x87.__status,
+	    sizeof(env.__x87.__status)) == 0);
+	assert(memcmp(&env.__x87.__tag, &FE_DFL_ENV->__x87.__tag,
+	    sizeof(env.__x87.__tag)) == 0);
+#else
 	assert(memcmp(&env, FE_DFL_ENV, sizeof(env)) == 0);
 #endif
+
+#endif
 	assert(fetestexcept(FE_ALL_EXCEPT) == 0);
 }