svn commit: r283334 - in stable/10/sys: arm/arm dev/fdt dev/ofw
Ian Lepore
ian at FreeBSD.org
Sat May 23 22:36:43 UTC 2015
Author: ian
Date: Sat May 23 22:36:41 2015
New Revision: 283334
URL: https://svnweb.freebsd.org/changeset/base/283334
Log:
MFC r277098, r279235:
Introduce ofw_bus_reg_to_rl() to replace part of common bus code
Fix endianness on FDT read in ARM GIC
Modified:
stable/10/sys/arm/arm/gic.c
stable/10/sys/dev/fdt/simplebus.c
stable/10/sys/dev/ofw/ofw_bus_subr.c
stable/10/sys/dev/ofw/ofw_bus_subr.h
stable/10/sys/dev/ofw/ofwbus.c
Directory Properties:
stable/10/ (props changed)
Modified: stable/10/sys/arm/arm/gic.c
==============================================================================
--- stable/10/sys/arm/arm/gic.c Sat May 23 22:34:25 2015 (r283333)
+++ stable/10/sys/arm/arm/gic.c Sat May 23 22:36:41 2015 (r283334)
@@ -204,7 +204,7 @@ gic_decode_fdt(uint32_t iparent, uint32_
*trig = INTR_TRIGGER_CONFORM;
*pol = INTR_POLARITY_CONFORM;
} else {
- if (intr[0] == 0)
+ if (fdt32_to_cpu(intr[0]) == 0)
*interrupt = fdt32_to_cpu(intr[1]) + GIC_FIRST_SPI;
else
*interrupt = fdt32_to_cpu(intr[1]) + GIC_FIRST_PPI;
@@ -216,13 +216,13 @@ gic_decode_fdt(uint32_t iparent, uint32_
* 8 = active low level-sensitive
* The hardware only supports active-high-level or rising-edge.
*/
- if (intr[2] & 0x0a) {
+ if (fdt32_to_cpu(intr[2]) & 0x0a) {
printf("unsupported trigger/polarity configuration "
- "0x%2x\n", intr[2] & 0x0f);
+ "0x%2x\n", fdt32_to_cpu(intr[2]) & 0x0f);
return (ENOTSUP);
}
*pol = INTR_POLARITY_CONFORM;
- if (intr[2] & 0x01)
+ if (fdt32_to_cpu(intr[2]) & 0x01)
*trig = INTR_TRIGGER_EDGE;
else
*trig = INTR_TRIGGER_LEVEL;
Modified: stable/10/sys/dev/fdt/simplebus.c
==============================================================================
--- stable/10/sys/dev/fdt/simplebus.c Sat May 23 22:34:25 2015 (r283333)
+++ stable/10/sys/dev/fdt/simplebus.c Sat May 23 22:36:41 2015 (r283334)
@@ -253,10 +253,6 @@ simplebus_setup_dinfo(device_t dev, phan
{
struct simplebus_softc *sc;
struct simplebus_devinfo *ndi;
- uint32_t *reg;
- uint64_t phys, size;
- int i, j, k;
- int nreg;
sc = device_get_softc(dev);
@@ -267,32 +263,7 @@ simplebus_setup_dinfo(device_t dev, phan
}
resource_list_init(&ndi->rl);
- nreg = OF_getencprop_alloc(node, "reg", sizeof(*reg), (void **)®);
- if (nreg == -1)
- nreg = 0;
- if (nreg % (sc->acells + sc->scells) != 0) {
- if (bootverbose)
- device_printf(dev, "Malformed reg property on <%s>\n",
- ndi->obdinfo.obd_name);
- nreg = 0;
- }
-
- for (i = 0, k = 0; i < nreg; i += sc->acells + sc->scells, k++) {
- phys = size = 0;
- for (j = 0; j < sc->acells; j++) {
- phys <<= 32;
- phys |= reg[i + j];
- }
- for (j = 0; j < sc->scells; j++) {
- size <<= 32;
- size |= reg[i + sc->acells + j];
- }
-
- resource_list_add(&ndi->rl, SYS_RES_MEMORY, k,
- phys, phys + size - 1, size);
- }
- free(reg, M_OFWPROP);
-
+ ofw_bus_reg_to_rl(dev, node, sc->acells, sc->scells, &ndi->rl);
ofw_bus_intr_to_rl(dev, node, &ndi->rl);
return (ndi);
Modified: stable/10/sys/dev/ofw/ofw_bus_subr.c
==============================================================================
--- stable/10/sys/dev/ofw/ofw_bus_subr.c Sat May 23 22:34:25 2015 (r283333)
+++ stable/10/sys/dev/ofw/ofw_bus_subr.c Sat May 23 22:36:41 2015 (r283334)
@@ -370,6 +370,54 @@ ofw_bus_search_intrmap(void *intr, int i
}
int
+ofw_bus_reg_to_rl(device_t dev, phandle_t node, pcell_t acells, pcell_t scells,
+ struct resource_list *rl)
+{
+ uint64_t phys, size;
+ ssize_t i, j, rid, nreg, ret;
+ uint32_t *reg;
+ char *name;
+
+ /*
+ * This may be just redundant when having ofw_bus_devinfo
+ * but makes this routine independent of it.
+ */
+ ret = OF_getencprop_alloc(node, "name", sizeof(*name), (void **)&name);
+ if (ret == -1)
+ name = NULL;
+
+ ret = OF_getencprop_alloc(node, "reg", sizeof(*reg), (void **)®);
+ nreg = (ret == -1) ? 0 : ret;
+
+ if (nreg % (acells + scells) != 0) {
+ if (bootverbose)
+ device_printf(dev, "Malformed reg property on <%s>\n",
+ (name == NULL) ? "unknown" : name);
+ nreg = 0;
+ }
+
+ for (i = 0, rid = 0; i < nreg; i += acells + scells, rid++) {
+ phys = size = 0;
+ for (j = 0; j < acells; j++) {
+ phys <<= 32;
+ phys |= reg[i + j];
+ }
+ for (j = 0; j < scells; j++) {
+ size <<= 32;
+ size |= reg[i + acells + j];
+ }
+ /* Skip the dummy reg property of glue devices like ssm(4). */
+ if (size != 0)
+ resource_list_add(rl, SYS_RES_MEMORY, rid,
+ phys, phys + size - 1, size);
+ }
+ free(name, M_OFWPROP);
+ free(reg, M_OFWPROP);
+
+ return (0);
+}
+
+int
ofw_bus_intr_to_rl(device_t dev, phandle_t node, struct resource_list *rl)
{
phandle_t iparent;
Modified: stable/10/sys/dev/ofw/ofw_bus_subr.h
==============================================================================
--- stable/10/sys/dev/ofw/ofw_bus_subr.h Sat May 23 22:34:25 2015 (r283333)
+++ stable/10/sys/dev/ofw/ofw_bus_subr.h Sat May 23 22:36:41 2015 (r283334)
@@ -73,6 +73,8 @@ int ofw_bus_search_intrmap(void *, int,
void *, void *, int, phandle_t *);
/* Routines for parsing device-tree data into resource lists. */
+int ofw_bus_reg_to_rl(device_t, phandle_t, pcell_t, pcell_t,
+ struct resource_list *);
int ofw_bus_intr_to_rl(device_t, phandle_t, struct resource_list *);
/* Helper to get device status property */
Modified: stable/10/sys/dev/ofw/ofwbus.c
==============================================================================
--- stable/10/sys/dev/ofw/ofwbus.c Sat May 23 22:34:25 2015 (r283333)
+++ stable/10/sys/dev/ofw/ofwbus.c Sat May 23 22:36:41 2015 (r283334)
@@ -442,10 +442,6 @@ ofwbus_setup_dinfo(device_t dev, phandle
struct ofwbus_softc *sc;
struct ofwbus_devinfo *ndi;
const char *nodename;
- uint32_t *reg;
- uint64_t phys, size;
- int i, j, rid;
- int nreg;
sc = device_get_softc(dev);
@@ -462,33 +458,7 @@ ofwbus_setup_dinfo(device_t dev, phandle
}
resource_list_init(&ndi->ndi_rl);
- nreg = OF_getencprop_alloc(node, "reg", sizeof(*reg), (void **)®);
- if (nreg == -1)
- nreg = 0;
- if (nreg % (sc->acells + sc->scells) != 0) {
- if (bootverbose)
- device_printf(dev, "Malformed reg property on <%s>\n",
- nodename);
- nreg = 0;
- }
-
- for (i = 0, rid = 0; i < nreg; i += sc->acells + sc->scells, rid++) {
- phys = size = 0;
- for (j = 0; j < sc->acells; j++) {
- phys <<= 32;
- phys |= reg[i + j];
- }
- for (j = 0; j < sc->scells; j++) {
- size <<= 32;
- size |= reg[i + sc->acells + j];
- }
- /* Skip the dummy reg property of glue devices like ssm(4). */
- if (size != 0)
- resource_list_add(&ndi->ndi_rl, SYS_RES_MEMORY, rid,
- phys, phys + size - 1, size);
- }
- free(reg, M_OFWPROP);
-
+ ofw_bus_reg_to_rl(dev, node, sc->acells, sc->scells, &ndi->ndi_rl);
ofw_bus_intr_to_rl(dev, node, &ndi->ndi_rl);
return (ndi);
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