svn commit: r278432 - in stable/10/sys/arm/ti: . am335x

[Rui Paulo]

Author: rpaulo
Date: Mon Feb  9 02:49:10 2015
New Revision: 278432
URL: https://svnweb.freebsd.org/changeset/base/278432

Log:
  MFC r277958, r278061:
  
   ti_pruss: make sure the mmap'ed memory region is uncacheable.
  
   am335x_clk_pruss_activate(): use the L3F clock.

Modified:
  stable/10/sys/arm/ti/am335x/am335x_prcm.c
  stable/10/sys/arm/ti/ti_pruss.c
Directory Properties:
  stable/10/   (props changed)

Modified: stable/10/sys/arm/ti/am335x/am335x_prcm.c
==============================================================================
--- stable/10/sys/arm/ti/am335x/am335x_prcm.c	Mon Feb  9 02:31:27 2015	(r278431)
+++ stable/10/sys/arm/ti/am335x/am335x_prcm.c	Mon Feb  9 02:49:10 2015	(r278432)
@@ -502,7 +502,7 @@ am335x_clk_gpio_activate(struct ti_clock
 	/* set *_CLKCTRL register MODULEMODE[1:0] to enable(2) */
 	/* set *_CLKCTRL register OPTFCLKEN_GPIO_1_G DBCLK[18] to FCLK_EN(1) */
 	prcm_write_4(clk_details->clkctrl_reg, 2 | (1 << 18));
-	while ((prcm_read_4(clk_details->clkctrl_reg) & 
+	while ((prcm_read_4(clk_details->clkctrl_reg) &
 	    (3 | (1 << 18) )) != (2 | (1 << 18)))
 		DELAY(10);
 
@@ -724,11 +724,11 @@ am335x_clk_lcdc_activate(struct ti_clock
 	prcm_write_4(CM_WKUP_CM_CLKMODE_DPLL_DISP, 0x4);
 
 	/* Make sure it's in bypass mode */
-	while (!(prcm_read_4(CM_WKUP_CM_IDLEST_DPLL_DISP) 
+	while (!(prcm_read_4(CM_WKUP_CM_IDLEST_DPLL_DISP)
 	    & (1 << 8)))
 		DELAY(10);
 
-	/* 
+	/*
 	 * For now set frequency to  5xSYSFREQ 
 	 * More flexible control might be required
 	 */
@@ -738,7 +738,7 @@ am335x_clk_lcdc_activate(struct ti_clock
 	prcm_write_4(CM_WKUP_CM_CLKMODE_DPLL_DISP, 0x7);
 
 	int timeout = 10000;
-	while ((!(prcm_read_4(CM_WKUP_CM_IDLEST_DPLL_DISP) 
+	while ((!(prcm_read_4(CM_WKUP_CM_IDLEST_DPLL_DISP)
 	    & (1 << 0))) && timeout--)
 		DELAY(10);
 
@@ -786,9 +786,9 @@ am335x_clk_pruss_activate(struct ti_cloc
 	while ((prcm_read_4(CM_PER_PRUSS_CLKSTCTRL) & (1<<6)) == 0)
 		DELAY(10);
 
-	/* Select DISP DPLL as OCP clock */
-	prcm_write_4(CLKSEL_PRUSS_OCP_CLK, 1);
-	while ((prcm_read_4(CLKSEL_PRUSS_OCP_CLK) & 0x3) != 1)
+	/* Select L3F as OCP clock */
+	prcm_write_4(CLKSEL_PRUSS_OCP_CLK, 0);
+	while ((prcm_read_4(CLKSEL_PRUSS_OCP_CLK) & 0x3) != 0)
 		DELAY(10);
 
 	/* Clear the RESET bit */

Modified: stable/10/sys/arm/ti/ti_pruss.c
==============================================================================
--- stable/10/sys/arm/ti/ti_pruss.c	Mon Feb  9 02:31:27 2015	(r278431)
+++ stable/10/sys/arm/ti/ti_pruss.c	Mon Feb  9 02:49:10 2015	(r278432)
@@ -259,6 +259,7 @@ ti_pruss_mmap(struct cdev *cdev, vm_ooff
 	if (offset > rman_get_size(sc->sc_mem_res))
 		return (-1);
 	*paddr = rman_get_start(sc->sc_mem_res) + offset;
+	*memattr = VM_MEMATTR_UNCACHEABLE;
 
 	return (0);
 }