svn commit: r266347 - in stable/10: share/man/man9 sys/arm/arm sys/arm/ti/omap4 sys/kern sys/sys
Ian Lepore
ian at FreeBSD.org
Sat May 17 20:10:14 UTC 2014
Author: ian
Date: Sat May 17 20:10:12 2014
New Revision: 266347
URL: http://svnweb.freebsd.org/changeset/base/266347
Log:
MFC 264019, 264041, 264048, 264049, 264050, 264051
Add support for event timers whose clock frequency can change while running.
Apparently all ARM configs build kern_et.c, but only a few of them also
build kern_clocksource.c, un-break the build by not referencing functions in
kern_clocksource if NO_EVENTTIMERS is defined.
Add variable-frequency support to the arm mpcore eventtimer driver.
mpcore_timer: Disable the timer and clear any pending bit, then setup the
new counter register values, then restart the timer. Also re-nest the parens
properly for casting the result of converting time and frequency to a count.
Added:
stable/10/sys/arm/arm/mpcore_timervar.h
- copied, changed from r264050, head/sys/arm/arm/mpcore_timervar.h
Modified:
stable/10/share/man/man9/eventtimers.9
stable/10/sys/arm/arm/mpcore_timer.c
stable/10/sys/arm/ti/omap4/omap4_prcm_clks.c
stable/10/sys/kern/kern_clocksource.c
stable/10/sys/kern/kern_et.c
stable/10/sys/sys/systm.h
stable/10/sys/sys/timeet.h
Directory Properties:
stable/10/ (props changed)
Modified: stable/10/share/man/man9/eventtimers.9
==============================================================================
--- stable/10/share/man/man9/eventtimers.9 Sat May 17 19:59:46 2014 (r266346)
+++ stable/10/share/man/man9/eventtimers.9 Sat May 17 20:10:12 2014 (r266347)
@@ -24,7 +24,7 @@
.\"
.\" $FreeBSD$
.\"
-.Dd February 25, 2013
+.Dd April 2, 2014
.Dt EVENTTIMERS 9
.Os
.Sh NAME
@@ -68,6 +68,8 @@ struct eventtimer {
.Fn et_register "struct eventtimer *et"
.Ft int
.Fn et_deregister "struct eventtimer *et"
+.Ft void
+.Fn et_change_frequency "struct eventtimer *et" "uint64_t newfreq"
.Fn ET_LOCK
.Fn ET_UNLOCK
.Ft struct eventtimer *
@@ -176,6 +178,21 @@ methods control timers associated with t
.Pp
Driver may deregister its functionality by calling
.Fn et_deregister .
+.Pp
+If the frequency of the clock hardware can change while it is
+running (for example, during power-saving modes), the driver must call
+.Fn et_change_frequency
+on each change.
+If the given event timer is the active timer,
+.Fn et_change_frequency
+stops the timer on all CPUs, updates
+.Va et->frequency ,
+then restarts the timer on all CPUs so that all
+current events are rescheduled using the new frequency.
+If the given timer is not currently active,
+.Fn et_change_frequency
+simply updates
+.Va et->frequency .
.Sh CONSUMER API
.Fn et_find
allows consumer to find available event timer, optionally matching specific
Modified: stable/10/sys/arm/arm/mpcore_timer.c
==============================================================================
--- stable/10/sys/arm/arm/mpcore_timer.c Sat May 17 19:59:46 2014 (r266346)
+++ stable/10/sys/arm/arm/mpcore_timer.c Sat May 17 20:10:12 2014 (r266347)
@@ -30,16 +30,16 @@
*/
/**
- * The ARM Cortex-A9 core can support a global timer plus a private and
- * watchdog timer per core. This driver reserves memory and interrupt
- * resources for accessing both timer register sets, these resources are
- * stored globally and used to setup the timecount and eventtimer.
+ * The ARM Cortex-A9 core can support a global timer plus a private and
+ * watchdog timer per core. This driver reserves memory and interrupt
+ * resources for accessing both timer register sets, these resources are
+ * stored globally and used to setup the timecount and eventtimer.
*
- * The timecount timer uses the global 64-bit counter, whereas the
- * per-CPU eventtimer uses the private 32-bit counters.
+ * The timecount timer uses the global 64-bit counter, whereas the
+ * per-CPU eventtimer uses the private 32-bit counters.
*
*
- * REF: ARM Cortex-A9 MPCore, Technical Reference Manual (rev. r2p2)
+ * REF: ARM Cortex-A9 MPCore, Technical Reference Manual (rev. r2p2)
*/
#include <sys/cdefs.h>
@@ -67,6 +67,8 @@ __FBSDID("$FreeBSD$");
#include <machine/bus.h>
#include <machine/fdt.h>
+#include <arm/arm/mpcore_timervar.h>
+
/* Private (per-CPU) timer register map */
#define PRV_TIMER_LOAD 0x0000
#define PRV_TIMER_COUNT 0x0004
@@ -100,7 +102,7 @@ struct arm_tmr_softc {
bus_space_tag_t gbl_bst;
bus_space_handle_t prv_bsh;
bus_space_handle_t gbl_bsh;
- uint32_t clkfreq;
+ uint64_t clkfreq;
struct eventtimer et;
};
@@ -114,7 +116,7 @@ static struct resource_spec arm_tmr_spec
static struct arm_tmr_softc *arm_tmr_sc = NULL;
-uint32_t platform_arm_tmr_freq = 0;
+static uint64_t platform_arm_tmr_freq = 0;
#define tmr_prv_read_4(reg) \
bus_space_read_4(arm_tmr_sc->prv_bst, arm_tmr_sc->prv_bsh, reg)
@@ -173,6 +175,9 @@ arm_tmr_start(struct eventtimer *et, sbi
uint32_t load, count;
uint32_t ctrl;
+ tmr_prv_write_4(PRV_TIMER_CTRL, 0);
+ tmr_prv_write_4(PRV_TIMER_INTR, PRV_TIMER_INTR_EVENT);
+
ctrl = PRV_TIMER_CTRL_IRQ_ENABLE | PRV_TIMER_CTRL_TIMER_ENABLE;
if (period != 0) {
@@ -182,14 +187,14 @@ arm_tmr_start(struct eventtimer *et, sbi
load = 0;
if (first != 0)
- count = ((uint32_t)et->et_frequency * first) >> 32;
+ count = (uint32_t)((et->et_frequency * first) >> 32);
else
count = load;
tmr_prv_write_4(PRV_TIMER_LOAD, load);
tmr_prv_write_4(PRV_TIMER_COUNT, count);
-
tmr_prv_write_4(PRV_TIMER_CTRL, ctrl);
+
return (0);
}
@@ -206,6 +211,7 @@ static int
arm_tmr_stop(struct eventtimer *et)
{
tmr_prv_write_4(PRV_TIMER_CTRL, 0);
+ tmr_prv_write_4(PRV_TIMER_INTR, PRV_TIMER_INTR_EVENT);
return (0);
}
@@ -275,24 +281,29 @@ arm_tmr_attach(device_t dev)
phandle_t node;
pcell_t clock;
void *ihl;
+ boolean_t fixed_freq;
if (arm_tmr_sc)
return (ENXIO);
- if (platform_arm_tmr_freq != 0)
- sc->clkfreq = platform_arm_tmr_freq;
- else {
- /* Get the base clock frequency */
- node = ofw_bus_get_node(dev);
- if ((OF_getprop(node, "clock-frequency", &clock,
- sizeof(clock))) <= 0) {
- device_printf(dev, "missing clock-frequency attribute in FDT\n");
- return (ENXIO);
+ if (platform_arm_tmr_freq == ARM_TMR_FREQUENCY_VARIES) {
+ fixed_freq = false;
+ } else {
+ fixed_freq = true;
+ if (platform_arm_tmr_freq != 0) {
+ sc->clkfreq = platform_arm_tmr_freq;
+ } else {
+ /* Get the base clock frequency */
+ node = ofw_bus_get_node(dev);
+ if ((OF_getencprop(node, "clock-frequency", &clock,
+ sizeof(clock))) <= 0) {
+ device_printf(dev, "missing clock-frequency "
+ "attribute in FDT\n");
+ return (ENXIO);
+ }
}
- sc->clkfreq = fdt32_to_cpu(clock);
}
-
if (bus_alloc_resources(dev, arm_tmr_spec, sc->tmr_res)) {
device_printf(dev, "could not allocate resources\n");
return (ENXIO);
@@ -312,14 +323,6 @@ arm_tmr_attach(device_t dev)
tmr_prv_write_4(PRV_TIMER_CTRL, 0x00000000);
tmr_gbl_write_4(GBL_TIMER_CTRL, 0x00000000);
- /* Setup and enable the global timer to use as the timecounter */
- tmr_gbl_write_4(GBL_TIMER_CTRL, (0x00 << GBL_TIMER_CTR_PRESCALER_SHIFT) |
- GBL_TIMER_CTRL_TIMER_ENABLE);
-
- arm_tmr_timecount.tc_frequency = sc->clkfreq;
- tc_init(&arm_tmr_timecount);
-
- /* Setup and enable the timer */
if (bus_setup_intr(dev, sc->tmr_res[3], INTR_TYPE_CLK, arm_tmr_intr,
NULL, sc, &ihl) != 0) {
bus_release_resources(dev, arm_tmr_spec, sc->tmr_res);
@@ -327,13 +330,35 @@ arm_tmr_attach(device_t dev)
return (ENXIO);
}
+ /*
+ * If the clock is fixed-frequency, setup and enable the global timer to
+ * use as the timecounter. If it's variable frequency it won't work as
+ * a timecounter. We also can't use it for DELAY(), so hopefully the
+ * platform provides its own implementation. If it doesn't, ours will
+ * get used, but since the frequency isn't set, it will only use the
+ * bogus loop counter.
+ */
+ if (fixed_freq) {
+ tmr_gbl_write_4(GBL_TIMER_CTRL, GBL_TIMER_CTRL_TIMER_ENABLE);
+ arm_tmr_timecount.tc_frequency = sc->clkfreq;
+ tc_init(&arm_tmr_timecount);
+ }
+
+ /*
+ * Setup and register the eventtimer. Most event timers set their min
+ * and max period values to some value calculated from the clock
+ * frequency. We might not know yet what our runtime clock frequency
+ * will be, so we just use some safe values. A max of 2 seconds ensures
+ * that even if our base clock frequency is 2GHz (meaning a 4GHz CPU),
+ * we won't overflow our 32-bit timer count register. A min of 20
+ * nanoseconds is pretty much completely arbitrary.
+ */
sc->et.et_name = "MPCore";
sc->et.et_flags = ET_FLAGS_PERIODIC | ET_FLAGS_ONESHOT | ET_FLAGS_PERCPU;
sc->et.et_quality = 1000;
-
sc->et.et_frequency = sc->clkfreq;
- sc->et.et_min_period = (0x00000002LLU << 32) / sc->et.et_frequency;
- sc->et.et_max_period = (0xfffffffeLLU << 32) / sc->et.et_frequency;
+ sc->et.et_min_period = 20 * SBT_1NS;
+ sc->et.et_max_period = 2 * SBT_1S;
sc->et.et_start = arm_tmr_start;
sc->et.et_stop = arm_tmr_stop;
sc->et.et_priv = sc;
@@ -358,6 +383,31 @@ static devclass_t arm_tmr_devclass;
DRIVER_MODULE(mp_tmr, simplebus, arm_tmr_driver, arm_tmr_devclass, 0, 0);
+/*
+ * Handle a change in clock frequency. The mpcore timer runs at half the CPU
+ * frequency. When the CPU frequency changes due to power-saving or thermal
+ * managment, the platform-specific code that causes the frequency change calls
+ * this routine to inform the clock driver, and we in turn inform the event
+ * timer system, which actually updates the value in et->frequency for us and
+ * reschedules the current event(s) in a way that's atomic with respect to
+ * start/stop/intr code that may be running on various CPUs at the time of the
+ * call.
+ *
+ * This routine can also be called by a platform's early init code. If the
+ * value passed is ARM_TMR_FREQUENCY_VARIES, that will cause the attach() code
+ * to register as an eventtimer, but not a timecounter. If the value passed in
+ * is any other non-zero value it is used as the fixed frequency for the timer.
+ */
+void
+arm_tmr_change_frequency(uint64_t newfreq)
+{
+
+ if (arm_tmr_sc == NULL)
+ platform_arm_tmr_freq = newfreq;
+ else
+ et_change_frequency(&arm_tmr_sc->et, newfreq);
+}
+
/**
* DELAY - Delay for at least usec microseconds.
* @usec: number of microseconds to delay by
@@ -377,7 +427,7 @@ arm_tmr_DELAY(int usec)
uint32_t first, last;
/* Check the timers are setup, if not just use a for loop for the meantime */
- if (arm_tmr_sc == NULL) {
+ if (arm_tmr_sc == NULL || arm_tmr_timecount.tc_frequency == 0) {
for (; usec > 0; usec--)
for (counts = 200; counts > 0; counts--)
cpufunc_nullop(); /* Prevent gcc from optimizing
Copied and modified: stable/10/sys/arm/arm/mpcore_timervar.h (from r264050, head/sys/arm/arm/mpcore_timervar.h)
==============================================================================
--- head/sys/arm/arm/mpcore_timervar.h Wed Apr 2 18:43:56 2014 (r264050, copy source)
+++ stable/10/sys/arm/arm/mpcore_timervar.h Sat May 17 20:10:12 2014 (r266347)
@@ -42,6 +42,6 @@
* Inform the mpcore timer driver of a new clock frequency. This can be called
* both before and after the mpcore timer driver attaches.
*/
-void arm_tmr_change_frequency(uint64_t newfreq);
+void arm_tmr_change_frequency(uint64_t newfreq);
#endif
Modified: stable/10/sys/arm/ti/omap4/omap4_prcm_clks.c
==============================================================================
--- stable/10/sys/arm/ti/omap4/omap4_prcm_clks.c Sat May 17 19:59:46 2014 (r266346)
+++ stable/10/sys/arm/ti/omap4/omap4_prcm_clks.c Sat May 17 20:10:12 2014 (r266347)
@@ -46,6 +46,7 @@ __FBSDID("$FreeBSD$");
#include <machine/resource.h>
#include <machine/intr.h>
+#include <arm/arm/mpcore_timervar.h>
#include <arm/ti/tivar.h>
#include <arm/ti/ti_prcm.h>
#include <arm/ti/omap4/omap4_reg.h>
@@ -85,7 +86,6 @@ __FBSDID("$FreeBSD$");
* OMAP4 devices are different from the previous OMAP3 devices in that there
* is no longer a separate functional and interface clock for each module,
* instead there is typically an interface clock that spans many modules.
- *
*/
#define FREQ_96MHZ 96000000
@@ -1404,7 +1404,7 @@ omap4_prcm_attach(device_t dev)
omap4_prcm_sc = sc;
ti_cpu_reset = omap4_prcm_reset;
omap4_clk_get_arm_fclk_freq(NULL, &freq);
- platform_arm_tmr_freq = freq / 2;
+ arm_tmr_change_frequency(freq / 2);
return (0);
}
Modified: stable/10/sys/kern/kern_clocksource.c
==============================================================================
--- stable/10/sys/kern/kern_clocksource.c Sat May 17 19:59:46 2014 (r266346)
+++ stable/10/sys/kern/kern_clocksource.c Sat May 17 20:10:12 2014 (r266347)
@@ -800,6 +800,25 @@ cpu_activeclock(void)
spinlock_exit();
}
+/*
+ * Change the frequency of the given timer. This changes et->et_frequency and
+ * if et is the active timer it reconfigures the timer on all CPUs. This is
+ * intended to be a private interface for the use of et_change_frequency() only.
+ */
+void
+cpu_et_frequency(struct eventtimer *et, uint64_t newfreq)
+{
+
+ ET_LOCK();
+ if (et == timer) {
+ configtimer(0);
+ et->et_frequency = newfreq;
+ configtimer(1);
+ } else
+ et->et_frequency = newfreq;
+ ET_UNLOCK();
+}
+
#ifdef KDTRACE_HOOKS
void
clocksource_cyc_set(const struct bintime *bt)
Modified: stable/10/sys/kern/kern_et.c
==============================================================================
--- stable/10/sys/kern/kern_et.c Sat May 17 19:59:46 2014 (r266346)
+++ stable/10/sys/kern/kern_et.c Sat May 17 20:10:12 2014 (r266347)
@@ -34,6 +34,8 @@ __FBSDID("$FreeBSD$");
#include <sys/queue.h>
#include <sys/timeet.h>
+#include "opt_timer.h"
+
SLIST_HEAD(et_eventtimers_list, eventtimer);
static struct et_eventtimers_list eventtimers = SLIST_HEAD_INITIALIZER(et_eventtimers);
@@ -113,6 +115,20 @@ et_deregister(struct eventtimer *et)
}
/*
+ * Change the frequency of the given timer. If it is the active timer,
+ * reconfigure it on all CPUs (reschedules all current events based on the new
+ * timer frequency).
+ */
+void
+et_change_frequency(struct eventtimer *et, uint64_t newfreq)
+{
+
+#ifndef NO_EVENTTIMERS
+ cpu_et_frequency(et, newfreq);
+#endif
+}
+
+/*
* Find free event timer hardware with specified parameters.
*/
struct eventtimer *
Modified: stable/10/sys/sys/systm.h
==============================================================================
--- stable/10/sys/sys/systm.h Sat May 17 19:59:46 2014 (r266346)
+++ stable/10/sys/sys/systm.h Sat May 17 20:10:12 2014 (r266347)
@@ -168,6 +168,7 @@ struct ucred;
struct uio;
struct _jmp_buf;
struct trapframe;
+struct eventtimer;
int setjmp(struct _jmp_buf *) __returns_twice;
void longjmp(struct _jmp_buf *, int) __dead2;
@@ -286,6 +287,7 @@ void cpu_stopprofclock(void);
sbintime_t cpu_idleclock(void);
void cpu_activeclock(void);
void cpu_new_callout(int cpu, sbintime_t bt, sbintime_t bt_opt);
+void cpu_et_frequency(struct eventtimer *et, uint64_t newfreq);
extern int cpu_can_deep_sleep;
extern int cpu_disable_deep_sleep;
Modified: stable/10/sys/sys/timeet.h
==============================================================================
--- stable/10/sys/sys/timeet.h Sat May 17 19:59:46 2014 (r266346)
+++ stable/10/sys/sys/timeet.h Sat May 17 20:10:12 2014 (r266347)
@@ -89,6 +89,7 @@ extern struct mtx et_eventtimers_mtx;
/* Driver API */
int et_register(struct eventtimer *et);
int et_deregister(struct eventtimer *et);
+void et_change_frequency(struct eventtimer *et, uint64_t newfreq);
/* Consumer API */
struct eventtimer *et_find(const char *name, int check, int want);
int et_init(struct eventtimer *et, et_event_cb_t *event,
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