svn commit: r287521 - in projects/clang370-import: contrib/llvm/include/llvm-c contrib/llvm/include/llvm/ADT contrib/llvm/include/llvm/CodeGen contrib/llvm/include/llvm/Target contrib/llvm/lib/Anal...
Dimitry Andric
dim at FreeBSD.org
Sun Sep 6 19:59:00 UTC 2015
Author: dim
Date: Sun Sep 6 19:58:48 2015
New Revision: 287521
URL: https://svnweb.freebsd.org/changeset/base/287521
Log:
Update llvm, clang and lldb to 3.7.0 release.
Added:
projects/clang370-import/contrib/llvm/tools/clang/lib/Headers/vecintrin.h
- copied unchanged from r287519, vendor/clang/dist/lib/Headers/vecintrin.h
projects/clang370-import/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContext_mips.h
- copied unchanged from r287519, vendor/lldb/dist/source/Plugins/Process/Utility/RegisterContext_mips.h
projects/clang370-import/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/lldb-mips-freebsd-register-enums.h
- copied unchanged from r287519, vendor/lldb/dist/source/Plugins/Process/Utility/lldb-mips-freebsd-register-enums.h
projects/clang370-import/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/lldb-mips-linux-register-enums.h
- copied unchanged from r287519, vendor/lldb/dist/source/Plugins/Process/Utility/lldb-mips-linux-register-enums.h
Deleted:
projects/clang370-import/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContext_mips64.h
projects/clang370-import/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/lldb-mips64-register-enums.h
Modified:
projects/clang370-import/contrib/llvm/include/llvm-c/TargetMachine.h
projects/clang370-import/contrib/llvm/include/llvm/ADT/SmallVector.h
projects/clang370-import/contrib/llvm/include/llvm/ADT/StringMap.h
projects/clang370-import/contrib/llvm/include/llvm/CodeGen/LiveRegMatrix.h
projects/clang370-import/contrib/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
projects/clang370-import/contrib/llvm/include/llvm/Target/TargetMachine.h
projects/clang370-import/contrib/llvm/lib/Analysis/BasicAliasAnalysis.cpp
projects/clang370-import/contrib/llvm/lib/Analysis/IPA/GlobalsModRef.cpp
projects/clang370-import/contrib/llvm/lib/Analysis/InstructionSimplify.cpp
projects/clang370-import/contrib/llvm/lib/Analysis/PHITransAddr.cpp
projects/clang370-import/contrib/llvm/lib/Analysis/VectorUtils.cpp
projects/clang370-import/contrib/llvm/lib/CodeGen/ExecutionDepsFix.cpp
projects/clang370-import/contrib/llvm/lib/CodeGen/LiveRegMatrix.cpp
projects/clang370-import/contrib/llvm/lib/CodeGen/MachineRegisterInfo.cpp
projects/clang370-import/contrib/llvm/lib/CodeGen/MachineTraceMetrics.cpp
projects/clang370-import/contrib/llvm/lib/CodeGen/PrologEpilogInserter.cpp
projects/clang370-import/contrib/llvm/lib/CodeGen/RegAllocFast.cpp
projects/clang370-import/contrib/llvm/lib/CodeGen/RegisterCoalescer.cpp
projects/clang370-import/contrib/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
projects/clang370-import/contrib/llvm/lib/CodeGen/VirtRegMap.cpp
projects/clang370-import/contrib/llvm/lib/ExecutionEngine/ExecutionEngine.cpp
projects/clang370-import/contrib/llvm/lib/ExecutionEngine/MCJIT/MCJIT.cpp
projects/clang370-import/contrib/llvm/lib/ExecutionEngine/RuntimeDyld/RTDyldMemoryManager.cpp
projects/clang370-import/contrib/llvm/lib/IR/Type.cpp
projects/clang370-import/contrib/llvm/lib/Support/MemoryBuffer.cpp
projects/clang370-import/contrib/llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
projects/clang370-import/contrib/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/AMDGPU.td
projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp
projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/Processors.td
projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/SIISelLowering.h
projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.td
projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/SIInstructions.td
projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/SIPrepareScratchRegs.cpp
projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/VIInstructions.td
projects/clang370-import/contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp
projects/clang370-import/contrib/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
projects/clang370-import/contrib/llvm/lib/Target/ARM/Thumb1InstrInfo.cpp
projects/clang370-import/contrib/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
projects/clang370-import/contrib/llvm/lib/Target/Mips/Mips64InstrInfo.td
projects/clang370-import/contrib/llvm/lib/Target/Mips/MipsFastISel.cpp
projects/clang370-import/contrib/llvm/lib/Target/Mips/MipsISelLowering.cpp
projects/clang370-import/contrib/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
projects/clang370-import/contrib/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
projects/clang370-import/contrib/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
projects/clang370-import/contrib/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
projects/clang370-import/contrib/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
projects/clang370-import/contrib/llvm/lib/Target/Sparc/SparcFrameLowering.cpp
projects/clang370-import/contrib/llvm/lib/Target/SystemZ/SystemZCallingConv.td
projects/clang370-import/contrib/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
projects/clang370-import/contrib/llvm/lib/Target/SystemZ/SystemZISelLowering.h
projects/clang370-import/contrib/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
projects/clang370-import/contrib/llvm/lib/Target/X86/X86FloatingPoint.cpp
projects/clang370-import/contrib/llvm/lib/Target/X86/X86FrameLowering.cpp
projects/clang370-import/contrib/llvm/lib/Target/X86/X86ISelLowering.cpp
projects/clang370-import/contrib/llvm/lib/Target/X86/X86InstrInfo.cpp
projects/clang370-import/contrib/llvm/lib/Target/X86/X86InstrSSE.td
projects/clang370-import/contrib/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
projects/clang370-import/contrib/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
projects/clang370-import/contrib/llvm/lib/Transforms/Scalar/EarlyCSE.cpp
projects/clang370-import/contrib/llvm/lib/Transforms/Scalar/SROA.cpp
projects/clang370-import/contrib/llvm/lib/Transforms/Scalar/Scalarizer.cpp
projects/clang370-import/contrib/llvm/tools/clang/include/clang/AST/ASTVector.h
projects/clang370-import/contrib/llvm/tools/clang/include/clang/AST/NSAPI.h
projects/clang370-import/contrib/llvm/tools/clang/include/clang/AST/StmtOpenMP.h
projects/clang370-import/contrib/llvm/tools/clang/include/clang/Analysis/Support/BumpVector.h
projects/clang370-import/contrib/llvm/tools/clang/include/clang/Basic/Attr.td
projects/clang370-import/contrib/llvm/tools/clang/include/clang/Basic/AttrDocs.td
projects/clang370-import/contrib/llvm/tools/clang/include/clang/Basic/DiagnosticCommonKinds.td
projects/clang370-import/contrib/llvm/tools/clang/include/clang/Basic/DiagnosticParseKinds.td
projects/clang370-import/contrib/llvm/tools/clang/include/clang/Basic/DiagnosticSemaKinds.td
projects/clang370-import/contrib/llvm/tools/clang/include/clang/Basic/LangOptions.def
projects/clang370-import/contrib/llvm/tools/clang/include/clang/Basic/TokenKinds.def
projects/clang370-import/contrib/llvm/tools/clang/include/clang/CodeGen/ObjectFilePCHContainerOperations.h
projects/clang370-import/contrib/llvm/tools/clang/include/clang/Driver/CC1Options.td
projects/clang370-import/contrib/llvm/tools/clang/include/clang/Driver/Options.td
projects/clang370-import/contrib/llvm/tools/clang/include/clang/Frontend/ASTUnit.h
projects/clang370-import/contrib/llvm/tools/clang/include/clang/Frontend/CompilerInstance.h
projects/clang370-import/contrib/llvm/tools/clang/include/clang/Frontend/PCHContainerOperations.h
projects/clang370-import/contrib/llvm/tools/clang/include/clang/Frontend/Utils.h
projects/clang370-import/contrib/llvm/tools/clang/include/clang/Lex/HeaderSearchOptions.h
projects/clang370-import/contrib/llvm/tools/clang/include/clang/Parse/Parser.h
projects/clang370-import/contrib/llvm/tools/clang/include/clang/Sema/Sema.h
projects/clang370-import/contrib/llvm/tools/clang/include/clang/Serialization/ASTReader.h
projects/clang370-import/contrib/llvm/tools/clang/include/clang/Serialization/GlobalModuleIndex.h
projects/clang370-import/contrib/llvm/tools/clang/include/clang/Serialization/ModuleManager.h
projects/clang370-import/contrib/llvm/tools/clang/include/clang/Tooling/Refactoring.h
projects/clang370-import/contrib/llvm/tools/clang/include/clang/Tooling/Tooling.h
projects/clang370-import/contrib/llvm/tools/clang/lib/ARCMigrate/ARCMT.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/AST/NSAPI.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/AST/NestedNameSpecifier.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/AST/RecordLayoutBuilder.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/AST/Stmt.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/Basic/FileManager.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/Basic/IdentifierTable.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/Basic/Module.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/Basic/Targets.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/Basic/Version.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/CodeGen/CGBuiltin.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/CodeGen/CGDebugInfo.h
projects/clang370-import/contrib/llvm/tools/clang/lib/CodeGen/CGExprScalar.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/CodeGen/CGStmtOpenMP.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/CodeGen/CGVTables.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/CodeGen/ItaniumCXXABI.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/CodeGen/ObjectFilePCHContainerOperations.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/CodeGen/TargetInfo.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/Driver/MinGWToolChain.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/Driver/ToolChain.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/Driver/ToolChains.h
projects/clang370-import/contrib/llvm/tools/clang/lib/Driver/Tools.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/Driver/Tools.h
projects/clang370-import/contrib/llvm/tools/clang/lib/Frontend/ASTMerge.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/Frontend/ASTUnit.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/Frontend/ChainedIncludesSource.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/Frontend/CompilerInstance.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/Frontend/CompilerInvocation.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/Frontend/FrontendAction.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/Frontend/FrontendActions.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/Frontend/InitPreprocessor.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/Frontend/PCHContainerOperations.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/Headers/altivec.h
projects/clang370-import/contrib/llvm/tools/clang/lib/Headers/module.modulemap
projects/clang370-import/contrib/llvm/tools/clang/lib/Headers/s390intrin.h
projects/clang370-import/contrib/llvm/tools/clang/lib/Lex/HeaderSearch.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/Parse/ParseDecl.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/Parse/Parser.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/Sema/DeclSpec.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/Sema/SemaChecking.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/Sema/SemaDecl.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/Sema/SemaExceptionSpec.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/Sema/SemaExpr.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/Sema/SemaExprCXX.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/Sema/SemaInit.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/Sema/SemaLookup.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/Sema/SemaOpenMP.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/Serialization/ASTReader.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/Serialization/ASTReaderStmt.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/Serialization/ASTWriterStmt.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/Serialization/GlobalModuleIndex.cpp
projects/clang370-import/contrib/llvm/tools/clang/lib/Serialization/ModuleManager.cpp
projects/clang370-import/contrib/llvm/tools/clang/tools/driver/cc1_main.cpp
projects/clang370-import/contrib/llvm/tools/clang/tools/driver/cc1as_main.cpp
projects/clang370-import/contrib/llvm/tools/clang/utils/TableGen/ClangAttrEmitter.cpp
projects/clang370-import/contrib/llvm/tools/lldb/include/lldb/Core/ArchSpec.h
projects/clang370-import/contrib/llvm/tools/lldb/include/lldb/Host/common/NativeRegisterContext.h
projects/clang370-import/contrib/llvm/tools/lldb/include/lldb/Target/StopInfo.h
projects/clang370-import/contrib/llvm/tools/lldb/source/Core/ArchSpec.cpp
projects/clang370-import/contrib/llvm/tools/lldb/source/Host/common/NativeRegisterContext.cpp
projects/clang370-import/contrib/llvm/tools/lldb/source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp
projects/clang370-import/contrib/llvm/tools/lldb/source/Plugins/Disassembler/llvm/DisassemblerLLVMC.h
projects/clang370-import/contrib/llvm/tools/lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp
projects/clang370-import/contrib/llvm/tools/lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp
projects/clang370-import/contrib/llvm/tools/lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.h
projects/clang370-import/contrib/llvm/tools/lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
projects/clang370-import/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.cpp
projects/clang370-import/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips.cpp
projects/clang370-import/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips.h
projects/clang370-import/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips64.cpp
projects/clang370-import/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips64.h
projects/clang370-import/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.h
projects/clang370-import/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_mips.h
projects/clang370-import/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfos_mips64.h
projects/clang370-import/contrib/llvm/tools/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
projects/clang370-import/contrib/llvm/tools/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.h
projects/clang370-import/contrib/llvm/tools/lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
projects/clang370-import/contrib/llvm/tools/lldb/source/Target/StopInfo.cpp
projects/clang370-import/contrib/llvm/tools/lldb/tools/lldb-mi/MICmdCmdData.cpp
projects/clang370-import/lib/clang/include/Makefile
projects/clang370-import/lib/clang/include/clang/Basic/Version.inc
projects/clang370-import/lib/clang/include/clang/Config/config.h
projects/clang370-import/lib/clang/include/llvm/Config/config.h
projects/clang370-import/lib/clang/include/llvm/Config/llvm-config.h
projects/clang370-import/tools/build/mk/OptionalObsoleteFiles.inc
Directory Properties:
projects/clang370-import/contrib/llvm/ (props changed)
projects/clang370-import/contrib/llvm/tools/clang/ (props changed)
projects/clang370-import/contrib/llvm/tools/lldb/ (props changed)
Modified: projects/clang370-import/contrib/llvm/include/llvm-c/TargetMachine.h
==============================================================================
--- projects/clang370-import/contrib/llvm/include/llvm-c/TargetMachine.h Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/include/llvm-c/TargetMachine.h Sun Sep 6 19:58:48 2015 (r287521)
@@ -115,7 +115,7 @@ char *LLVMGetTargetMachineCPU(LLVMTarget
LLVMDisposeMessage. */
char *LLVMGetTargetMachineFeatureString(LLVMTargetMachineRef T);
-/** Returns the llvm::DataLayout used for this llvm:TargetMachine. */
+/** Deprecated: use LLVMGetDataLayout(LLVMModuleRef M) instead. */
LLVMTargetDataRef LLVMGetTargetMachineData(LLVMTargetMachineRef T);
/** Set the target machine's ASM verbosity. */
Modified: projects/clang370-import/contrib/llvm/include/llvm/ADT/SmallVector.h
==============================================================================
--- projects/clang370-import/contrib/llvm/include/llvm/ADT/SmallVector.h Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/include/llvm/ADT/SmallVector.h Sun Sep 6 19:58:48 2015 (r287521)
@@ -315,8 +315,10 @@ protected:
T2>::value>::type * = nullptr) {
// Use memcpy for PODs iterated by pointers (which includes SmallVector
// iterators): std::uninitialized_copy optimizes to memmove, but we can
- // use memcpy here.
- memcpy(Dest, I, (E-I)*sizeof(T));
+ // use memcpy here. Note that I and E are iterators and thus might be
+ // invalid for memcpy if they are equal.
+ if (I != E)
+ memcpy(Dest, I, (E - I) * sizeof(T));
}
/// Double the size of the allocated memory, guaranteeing space for at
Modified: projects/clang370-import/contrib/llvm/include/llvm/ADT/StringMap.h
==============================================================================
--- projects/clang370-import/contrib/llvm/include/llvm/ADT/StringMap.h Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/include/llvm/ADT/StringMap.h Sun Sep 6 19:58:48 2015 (r287521)
@@ -158,7 +158,8 @@ public:
// Copy the string information.
char *StrBuffer = const_cast<char*>(NewItem->getKeyData());
- memcpy(StrBuffer, Key.data(), KeyLength);
+ if (KeyLength > 0)
+ memcpy(StrBuffer, Key.data(), KeyLength);
StrBuffer[KeyLength] = 0; // Null terminate for convenience of clients.
return NewItem;
}
Modified: projects/clang370-import/contrib/llvm/include/llvm/CodeGen/LiveRegMatrix.h
==============================================================================
--- projects/clang370-import/contrib/llvm/include/llvm/CodeGen/LiveRegMatrix.h Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/include/llvm/CodeGen/LiveRegMatrix.h Sun Sep 6 19:58:48 2015 (r287521)
@@ -32,11 +32,13 @@ namespace llvm {
class LiveInterval;
class LiveIntervalAnalysis;
+class MachineRegisterInfo;
class TargetRegisterInfo;
class VirtRegMap;
class LiveRegMatrix : public MachineFunctionPass {
const TargetRegisterInfo *TRI;
+ MachineRegisterInfo *MRI;
LiveIntervals *LIS;
VirtRegMap *VRM;
Modified: projects/clang370-import/contrib/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
==============================================================================
--- projects/clang370-import/contrib/llvm/include/llvm/CodeGen/MachineRegisterInfo.h Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/include/llvm/CodeGen/MachineRegisterInfo.h Sun Sep 6 19:58:48 2015 (r287521)
@@ -95,8 +95,20 @@ private:
return MO->Contents.Reg.Next;
}
+ /// UsedRegUnits - This is a bit vector that is computed and set by the
+ /// register allocator, and must be kept up to date by passes that run after
+ /// register allocation (though most don't modify this). This is used
+ /// so that the code generator knows which callee save registers to save and
+ /// for other target specific uses.
+ /// This vector has bits set for register units that are modified in the
+ /// current function. It doesn't include registers clobbered by function
+ /// calls with register mask operands.
+ BitVector UsedRegUnits;
+
/// UsedPhysRegMask - Additional used physregs including aliases.
/// This bit vector represents all the registers clobbered by function calls.
+ /// It can model things that UsedRegUnits can't, such as function calls that
+ /// clobber ymm7 but preserve the low half in xmm7.
BitVector UsedPhysRegMask;
/// ReservedRegs - This is a bit vector of reserved registers. The target
@@ -641,12 +653,55 @@ public:
/// ignored.
bool isPhysRegModified(unsigned PhysReg) const;
+ //===--------------------------------------------------------------------===//
+ // Physical Register Use Info
+ //===--------------------------------------------------------------------===//
+
+ /// isPhysRegUsed - Return true if the specified register is used in this
+ /// function. Also check for clobbered aliases and registers clobbered by
+ /// function calls with register mask operands.
+ ///
+ /// This only works after register allocation.
+ bool isPhysRegUsed(unsigned Reg) const {
+ if (UsedPhysRegMask.test(Reg))
+ return true;
+ for (MCRegUnitIterator Units(Reg, getTargetRegisterInfo());
+ Units.isValid(); ++Units)
+ if (UsedRegUnits.test(*Units))
+ return true;
+ return false;
+ }
+
+ /// Mark the specified register unit as used in this function.
+ /// This should only be called during and after register allocation.
+ void setRegUnitUsed(unsigned RegUnit) {
+ UsedRegUnits.set(RegUnit);
+ }
+
+ /// setPhysRegUsed - Mark the specified register used in this function.
+ /// This should only be called during and after register allocation.
+ void setPhysRegUsed(unsigned Reg) {
+ for (MCRegUnitIterator Units(Reg, getTargetRegisterInfo());
+ Units.isValid(); ++Units)
+ UsedRegUnits.set(*Units);
+ }
+
/// addPhysRegsUsedFromRegMask - Mark any registers not in RegMask as used.
/// This corresponds to the bit mask attached to register mask operands.
void addPhysRegsUsedFromRegMask(const uint32_t *RegMask) {
UsedPhysRegMask.setBitsNotInMask(RegMask);
}
+ /// setPhysRegUnused - Mark the specified register unused in this function.
+ /// This should only be called during and after register allocation.
+ void setPhysRegUnused(unsigned Reg) {
+ UsedPhysRegMask.reset(Reg);
+ for (MCRegUnitIterator Units(Reg, getTargetRegisterInfo());
+ Units.isValid(); ++Units)
+ UsedRegUnits.reset(*Units);
+ }
+
+
//===--------------------------------------------------------------------===//
// Reserved Register Info
//===--------------------------------------------------------------------===//
Modified: projects/clang370-import/contrib/llvm/include/llvm/Target/TargetMachine.h
==============================================================================
--- projects/clang370-import/contrib/llvm/include/llvm/Target/TargetMachine.h Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/include/llvm/Target/TargetMachine.h Sun Sep 6 19:58:48 2015 (r287521)
@@ -125,10 +125,15 @@ public:
return *static_cast<const STC*>(getSubtargetImpl(F));
}
+ /// Deprecated in 3.7, will be removed in 3.8. Use createDataLayout() instead.
+ ///
/// This method returns a pointer to the DataLayout for the target. It should
/// be unchanging for every subtarget.
const DataLayout *getDataLayout() const { return &DL; }
+ /// Create a DataLayout.
+ const DataLayout createDataLayout() const { return DL; }
+
/// \brief Reset the target options based on the function's attributes.
// FIXME: Remove TargetOptions that affect per-function code generation
// from TargetMachine.
Modified: projects/clang370-import/contrib/llvm/lib/Analysis/BasicAliasAnalysis.cpp
==============================================================================
--- projects/clang370-import/contrib/llvm/lib/Analysis/BasicAliasAnalysis.cpp Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/lib/Analysis/BasicAliasAnalysis.cpp Sun Sep 6 19:58:48 2015 (r287521)
@@ -206,14 +206,6 @@ static Value *GetLinearExpression(Value
return V;
}
- if (ConstantInt *Const = dyn_cast<ConstantInt>(V)) {
- // if it's a constant, just convert it to an offset
- // and remove the variable.
- Offset += Const->getValue();
- assert(Scale == 0 && "Constant values don't have a scale");
- return V;
- }
-
if (BinaryOperator *BOp = dyn_cast<BinaryOperator>(V)) {
if (ConstantInt *RHSC = dyn_cast<ConstantInt>(BOp->getOperand(1))) {
switch (BOp->getOpcode()) {
@@ -261,10 +253,7 @@ static Value *GetLinearExpression(Value
Value *Result = GetLinearExpression(CastOp, Scale, Offset, Extension, DL,
Depth + 1, AC, DT);
Scale = Scale.zext(OldWidth);
-
- // We have to sign-extend even if Extension == EK_ZeroExt as we can't
- // decompose a sign extension (i.e. zext(x - 1) != zext(x) - zext(-1)).
- Offset = Offset.sext(OldWidth);
+ Offset = Offset.zext(OldWidth);
return Result;
}
@@ -1135,43 +1124,12 @@ AliasResult BasicAliasAnalysis::aliasGEP
}
}
+ // Try to distinguish something like &A[i][1] against &A[42][0].
+ // Grab the least significant bit set in any of the scales.
if (!GEP1VariableIndices.empty()) {
uint64_t Modulo = 0;
- bool AllPositive = true;
- for (unsigned i = 0, e = GEP1VariableIndices.size(); i != e; ++i) {
-
- // Try to distinguish something like &A[i][1] against &A[42][0].
- // Grab the least significant bit set in any of the scales. We
- // don't need std::abs here (even if the scale's negative) as we'll
- // be ^'ing Modulo with itself later.
+ for (unsigned i = 0, e = GEP1VariableIndices.size(); i != e; ++i)
Modulo |= (uint64_t) GEP1VariableIndices[i].Scale;
-
- if (AllPositive) {
- // If the Value could change between cycles, then any reasoning about
- // the Value this cycle may not hold in the next cycle. We'll just
- // give up if we can't determine conditions that hold for every cycle:
- const Value *V = GEP1VariableIndices[i].V;
-
- bool SignKnownZero, SignKnownOne;
- ComputeSignBit(const_cast<Value *>(V), SignKnownZero, SignKnownOne, *DL,
- 0, AC1, nullptr, DT);
-
- // Zero-extension widens the variable, and so forces the sign
- // bit to zero.
- bool IsZExt = GEP1VariableIndices[i].Extension == EK_ZeroExt;
- SignKnownZero |= IsZExt;
- SignKnownOne &= !IsZExt;
-
- // If the variable begins with a zero then we know it's
- // positive, regardless of whether the value is signed or
- // unsigned.
- int64_t Scale = GEP1VariableIndices[i].Scale;
- AllPositive =
- (SignKnownZero && Scale >= 0) ||
- (SignKnownOne && Scale < 0);
- }
- }
-
Modulo = Modulo ^ (Modulo & (Modulo - 1));
// We can compute the difference between the two addresses
@@ -1182,12 +1140,6 @@ AliasResult BasicAliasAnalysis::aliasGEP
V2Size != MemoryLocation::UnknownSize && ModOffset >= V2Size &&
V1Size <= Modulo - ModOffset)
return NoAlias;
-
- // If we know all the variables are positive, then GEP1 >= GEP1BasePtr.
- // If GEP1BasePtr > V2 (GEP1BaseOffset > 0) then we know the pointers
- // don't alias if V2Size can fit in the gap between V2 and GEP1BasePtr.
- if (AllPositive && GEP1BaseOffset > 0 && V2Size <= (uint64_t) GEP1BaseOffset)
- return NoAlias;
}
// Statically, we can see that the base objects are the same, but the
Modified: projects/clang370-import/contrib/llvm/lib/Analysis/IPA/GlobalsModRef.cpp
==============================================================================
--- projects/clang370-import/contrib/llvm/lib/Analysis/IPA/GlobalsModRef.cpp Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/lib/Analysis/IPA/GlobalsModRef.cpp Sun Sep 6 19:58:48 2015 (r287521)
@@ -440,30 +440,39 @@ void GlobalsModRef::AnalyzeCallGraph(Cal
}
// Scan the function bodies for explicit loads or stores.
- for (unsigned i = 0, e = SCC.size(); i != e && FunctionEffect != ModRef;
- ++i)
- for (inst_iterator II = inst_begin(SCC[i]->getFunction()),
- E = inst_end(SCC[i]->getFunction());
- II != E && FunctionEffect != ModRef; ++II)
- if (LoadInst *LI = dyn_cast<LoadInst>(&*II)) {
+ for (auto *Node : SCC) {
+ if (FunctionEffect == ModRef)
+ break; // The mod/ref lattice saturates here.
+ for (Instruction &I : inst_range(Node->getFunction())) {
+ if (FunctionEffect == ModRef)
+ break; // The mod/ref lattice saturates here.
+
+ // We handle calls specially because the graph-relevant aspects are
+ // handled above.
+ if (auto CS = CallSite(&I)) {
+ if (isAllocationFn(&I, TLI) || isFreeCall(&I, TLI)) {
+ // FIXME: It is completely unclear why this is necessary and not
+ // handled by the above graph code.
+ FunctionEffect |= ModRef;
+ } else if (Function *Callee = CS.getCalledFunction()) {
+ // The callgraph doesn't include intrinsic calls.
+ if (Callee->isIntrinsic()) {
+ ModRefBehavior Behaviour =
+ AliasAnalysis::getModRefBehavior(Callee);
+ FunctionEffect |= (Behaviour & ModRef);
+ }
+ }
+ continue;
+ }
+
+ // All non-call instructions we use the primary predicates for whether
+ // thay read or write memory.
+ if (I.mayReadFromMemory())
FunctionEffect |= Ref;
- if (LI->isVolatile())
- // Volatile loads may have side-effects, so mark them as writing
- // memory (for example, a flag inside the processor).
- FunctionEffect |= Mod;
- } else if (StoreInst *SI = dyn_cast<StoreInst>(&*II)) {
+ if (I.mayWriteToMemory())
FunctionEffect |= Mod;
- if (SI->isVolatile())
- // Treat volatile stores as reading memory somewhere.
- FunctionEffect |= Ref;
- } else if (isAllocationFn(&*II, TLI) || isFreeCall(&*II, TLI)) {
- FunctionEffect |= ModRef;
- } else if (IntrinsicInst *Intrinsic = dyn_cast<IntrinsicInst>(&*II)) {
- // The callgraph doesn't include intrinsic calls.
- Function *Callee = Intrinsic->getCalledFunction();
- ModRefBehavior Behaviour = AliasAnalysis::getModRefBehavior(Callee);
- FunctionEffect |= (Behaviour & ModRef);
- }
+ }
+ }
if ((FunctionEffect & Mod) == 0)
++NumReadMemFunctions;
Modified: projects/clang370-import/contrib/llvm/lib/Analysis/InstructionSimplify.cpp
==============================================================================
--- projects/clang370-import/contrib/llvm/lib/Analysis/InstructionSimplify.cpp Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/lib/Analysis/InstructionSimplify.cpp Sun Sep 6 19:58:48 2015 (r287521)
@@ -3574,18 +3574,9 @@ static Value *SimplifyExtractElementInst
// If extracting a specified index from the vector, see if we can recursively
// find a previously computed scalar that was inserted into the vector.
- if (auto *IdxC = dyn_cast<ConstantInt>(Idx)) {
- unsigned IndexVal = IdxC->getZExtValue();
- unsigned VectorWidth = Vec->getType()->getVectorNumElements();
-
- // If this is extracting an invalid index, turn this into undef, to avoid
- // crashing the code below.
- if (IndexVal >= VectorWidth)
- return UndefValue::get(Vec->getType()->getVectorElementType());
-
- if (Value *Elt = findScalarElement(Vec, IndexVal))
+ if (auto *IdxC = dyn_cast<ConstantInt>(Idx))
+ if (Value *Elt = findScalarElement(Vec, IdxC->getZExtValue()))
return Elt;
- }
return nullptr;
}
Modified: projects/clang370-import/contrib/llvm/lib/Analysis/PHITransAddr.cpp
==============================================================================
--- projects/clang370-import/contrib/llvm/lib/Analysis/PHITransAddr.cpp Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/lib/Analysis/PHITransAddr.cpp Sun Sep 6 19:58:48 2015 (r287521)
@@ -374,9 +374,10 @@ InsertPHITranslatedSubExpr(Value *InVal,
if (!Tmp.PHITranslateValue(CurBB, PredBB, &DT, /*MustDominate=*/true))
return Tmp.getAddr();
- // If we don't have an available version of this value, it must be an
- // instruction.
- Instruction *Inst = cast<Instruction>(InVal);
+ // We don't need to PHI translate values which aren't instructions.
+ auto *Inst = dyn_cast<Instruction>(InVal);
+ if (!Inst)
+ return nullptr;
// Handle cast of PHI translatable value.
if (CastInst *Cast = dyn_cast<CastInst>(Inst)) {
Modified: projects/clang370-import/contrib/llvm/lib/Analysis/VectorUtils.cpp
==============================================================================
--- projects/clang370-import/contrib/llvm/lib/Analysis/VectorUtils.cpp Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/lib/Analysis/VectorUtils.cpp Sun Sep 6 19:58:48 2015 (r287521)
@@ -402,8 +402,9 @@ llvm::Value *llvm::findScalarElement(llv
if (match(V,
llvm::PatternMatch::m_Add(llvm::PatternMatch::m_Value(Val),
llvm::PatternMatch::m_Constant(Con)))) {
- if (Con->getAggregateElement(EltNo)->isNullValue())
- return findScalarElement(Val, EltNo);
+ if (Constant *Elt = Con->getAggregateElement(EltNo))
+ if (Elt->isNullValue())
+ return findScalarElement(Val, EltNo);
}
// Otherwise, we don't know.
Modified: projects/clang370-import/contrib/llvm/lib/CodeGen/ExecutionDepsFix.cpp
==============================================================================
--- projects/clang370-import/contrib/llvm/lib/CodeGen/ExecutionDepsFix.cpp Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/lib/CodeGen/ExecutionDepsFix.cpp Sun Sep 6 19:58:48 2015 (r287521)
@@ -733,14 +733,12 @@ bool ExeDepsFix::runOnMachineFunction(Ma
// If no relevant registers are used in the function, we can skip it
// completely.
bool anyregs = false;
- const MachineRegisterInfo &MRI = mf.getRegInfo();
for (TargetRegisterClass::const_iterator I = RC->begin(), E = RC->end();
- I != E && !anyregs; ++I)
- for (MCRegAliasIterator AI(*I, TRI, true); AI.isValid(); ++AI)
- if (!MRI.reg_nodbg_empty(*AI)) {
- anyregs = true;
- break;
- }
+ I != E; ++I)
+ if (MF->getRegInfo().isPhysRegUsed(*I)) {
+ anyregs = true;
+ break;
+ }
if (!anyregs) return false;
// Initialize the AliasMap on the first use.
Modified: projects/clang370-import/contrib/llvm/lib/CodeGen/LiveRegMatrix.cpp
==============================================================================
--- projects/clang370-import/contrib/llvm/lib/CodeGen/LiveRegMatrix.cpp Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/lib/CodeGen/LiveRegMatrix.cpp Sun Sep 6 19:58:48 2015 (r287521)
@@ -15,12 +15,12 @@
#include "RegisterCoalescer.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/CodeGen/LiveIntervalAnalysis.h"
+#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/VirtRegMap.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/Format.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetRegisterInfo.h"
-#include "llvm/Target/TargetSubtargetInfo.h"
using namespace llvm;
@@ -49,6 +49,7 @@ void LiveRegMatrix::getAnalysisUsage(Ana
bool LiveRegMatrix::runOnMachineFunction(MachineFunction &MF) {
TRI = MF.getSubtarget().getRegisterInfo();
+ MRI = &MF.getRegInfo();
LIS = &getAnalysis<LiveIntervals>();
VRM = &getAnalysis<VirtRegMap>();
@@ -100,6 +101,7 @@ void LiveRegMatrix::assign(LiveInterval
<< " to " << PrintReg(PhysReg, TRI) << ':');
assert(!VRM->hasPhys(VirtReg.reg) && "Duplicate VirtReg assignment");
VRM->assignVirt2Phys(VirtReg.reg, PhysReg);
+ MRI->setPhysRegUsed(PhysReg);
foreachUnit(TRI, VirtReg, PhysReg, [&](unsigned Unit,
const LiveRange &Range) {
Modified: projects/clang370-import/contrib/llvm/lib/CodeGen/MachineRegisterInfo.cpp
==============================================================================
--- projects/clang370-import/contrib/llvm/lib/CodeGen/MachineRegisterInfo.cpp Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/lib/CodeGen/MachineRegisterInfo.cpp Sun Sep 6 19:58:48 2015 (r287521)
@@ -29,6 +29,7 @@ MachineRegisterInfo::MachineRegisterInfo
TracksSubRegLiveness(false) {
VRegInfo.reserve(256);
RegAllocHints.reserve(256);
+ UsedRegUnits.resize(getTargetRegisterInfo()->getNumRegUnits());
UsedPhysRegMask.resize(getTargetRegisterInfo()->getNumRegs());
// Create the physreg use/def lists.
Modified: projects/clang370-import/contrib/llvm/lib/CodeGen/MachineTraceMetrics.cpp
==============================================================================
--- projects/clang370-import/contrib/llvm/lib/CodeGen/MachineTraceMetrics.cpp Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/lib/CodeGen/MachineTraceMetrics.cpp Sun Sep 6 19:58:48 2015 (r287521)
@@ -624,6 +624,10 @@ struct DataDep {
static bool getDataDeps(const MachineInstr *UseMI,
SmallVectorImpl<DataDep> &Deps,
const MachineRegisterInfo *MRI) {
+ // Debug values should not be included in any calculations.
+ if (UseMI->isDebugValue())
+ return false;
+
bool HasPhysRegs = false;
for (MachineInstr::const_mop_iterator I = UseMI->operands_begin(),
E = UseMI->operands_end(); I != E; ++I) {
Modified: projects/clang370-import/contrib/llvm/lib/CodeGen/PrologEpilogInserter.cpp
==============================================================================
--- projects/clang370-import/contrib/llvm/lib/CodeGen/PrologEpilogInserter.cpp Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/lib/CodeGen/PrologEpilogInserter.cpp Sun Sep 6 19:58:48 2015 (r287521)
@@ -1026,8 +1026,12 @@ PEI::scavengeFrameVirtualRegs(MachineFun
// Replace this reference to the virtual register with the
// scratch register.
assert (ScratchReg && "Missing scratch register!");
+ MachineRegisterInfo &MRI = Fn.getRegInfo();
Fn.getRegInfo().replaceRegWith(Reg, ScratchReg);
+ // Make sure MRI now accounts this register as used.
+ MRI.setPhysRegUsed(ScratchReg);
+
// Because this instruction was processed by the RS before this
// register was allocated, make sure that the RS now records the
// register as being used.
Modified: projects/clang370-import/contrib/llvm/lib/CodeGen/RegAllocFast.cpp
==============================================================================
--- projects/clang370-import/contrib/llvm/lib/CodeGen/RegAllocFast.cpp Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/lib/CodeGen/RegAllocFast.cpp Sun Sep 6 19:58:48 2015 (r287521)
@@ -986,6 +986,10 @@ void RAFast::AllocateBasicBlock() {
}
}
+ for (UsedInInstrSet::iterator
+ I = UsedInInstr.begin(), E = UsedInInstr.end(); I != E; ++I)
+ MRI->setRegUnitUsed(*I);
+
// Track registers defined by instruction - early clobbers and tied uses at
// this point.
UsedInInstr.clear();
@@ -1046,6 +1050,10 @@ void RAFast::AllocateBasicBlock() {
killVirtReg(VirtDead[i]);
VirtDead.clear();
+ for (UsedInInstrSet::iterator
+ I = UsedInInstr.begin(), E = UsedInInstr.end(); I != E; ++I)
+ MRI->setRegUnitUsed(*I);
+
if (CopyDst && CopyDst == CopySrc && CopyDstSub == CopySrcSub) {
DEBUG(dbgs() << "-- coalescing: " << *MI);
Coalesced.push_back(MI);
@@ -1095,6 +1103,12 @@ bool RAFast::runOnMachineFunction(Machin
AllocateBasicBlock();
}
+ // Add the clobber lists for all the instructions we skipped earlier.
+ for (const MCInstrDesc *Desc : SkippedInstrs)
+ if (const uint16_t *Defs = Desc->getImplicitDefs())
+ while (*Defs)
+ MRI->setPhysRegUsed(*Defs++);
+
// All machine operands and other references to virtual registers have been
// replaced. Remove the virtual registers.
MRI->clearVirtRegs();
Modified: projects/clang370-import/contrib/llvm/lib/CodeGen/RegisterCoalescer.cpp
==============================================================================
--- projects/clang370-import/contrib/llvm/lib/CodeGen/RegisterCoalescer.cpp Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/lib/CodeGen/RegisterCoalescer.cpp Sun Sep 6 19:58:48 2015 (r287521)
@@ -1531,6 +1531,14 @@ bool RegisterCoalescer::joinReservedPhys
DEBUG(dbgs() << "\t\tInterference (read): " << *MI);
return false;
}
+
+ // We must also check for clobbers caused by regmasks.
+ for (const auto &MO : MI->operands()) {
+ if (MO.isRegMask() && MO.clobbersPhysReg(DstReg)) {
+ DEBUG(dbgs() << "\t\tInterference (regmask clobber): " << *MI);
+ return false;
+ }
+ }
}
// We're going to remove the copy which defines a physical reserved
Modified: projects/clang370-import/contrib/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
==============================================================================
--- projects/clang370-import/contrib/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Sun Sep 6 19:58:48 2015 (r287521)
@@ -8365,12 +8365,12 @@ SDValue DAGCombiner::visitFDIV(SDNode *N
if (N0CFP && N0CFP->isExactlyValue(1.0))
return SDValue();
- SmallVector<SDNode *, 4> Users;
// Find all FDIV users of the same divisor.
- for (auto *U : N1->uses()) {
+ // Use a set because duplicates may be present in the user list.
+ SetVector<SDNode *> Users;
+ for (auto *U : N1->uses())
if (U->getOpcode() == ISD::FDIV && U->getOperand(1) == N1)
- Users.push_back(U);
- }
+ Users.insert(U);
if (TLI.combineRepeatedFPDivisors(Users.size())) {
SDValue FPOne = DAG.getConstantFP(1.0, DL, VT);
Modified: projects/clang370-import/contrib/llvm/lib/CodeGen/VirtRegMap.cpp
==============================================================================
--- projects/clang370-import/contrib/llvm/lib/CodeGen/VirtRegMap.cpp Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/lib/CodeGen/VirtRegMap.cpp Sun Sep 6 19:58:48 2015 (r287521)
@@ -163,6 +163,7 @@ class VirtRegRewriter : public MachineFu
SlotIndexes *Indexes;
LiveIntervals *LIS;
VirtRegMap *VRM;
+ SparseSet<unsigned> PhysRegs;
void rewrite();
void addMBBLiveIns();
@@ -318,15 +319,54 @@ void VirtRegRewriter::rewrite() {
SmallVector<unsigned, 8> SuperDeads;
SmallVector<unsigned, 8> SuperDefs;
SmallVector<unsigned, 8> SuperKills;
+ SmallPtrSet<const MachineInstr *, 4> NoReturnInsts;
+
+ // Here we have a SparseSet to hold which PhysRegs are actually encountered
+ // in the MF we are about to iterate over so that later when we call
+ // setPhysRegUsed, we are only doing it for physRegs that were actually found
+ // in the program and not for all of the possible physRegs for the given
+ // target architecture. If the target has a lot of physRegs, then for a small
+ // program there will be a significant compile time reduction here.
+ PhysRegs.clear();
+ PhysRegs.setUniverse(TRI->getNumRegs());
+
+ // The function with uwtable should guarantee that the stack unwinder
+ // can unwind the stack to the previous frame. Thus, we can't apply the
+ // noreturn optimization if the caller function has uwtable attribute.
+ bool HasUWTable = MF->getFunction()->hasFnAttribute(Attribute::UWTable);
for (MachineFunction::iterator MBBI = MF->begin(), MBBE = MF->end();
MBBI != MBBE; ++MBBI) {
DEBUG(MBBI->print(dbgs(), Indexes));
+ bool IsExitBB = MBBI->succ_empty();
for (MachineBasicBlock::instr_iterator
MII = MBBI->instr_begin(), MIE = MBBI->instr_end(); MII != MIE;) {
MachineInstr *MI = MII;
++MII;
+ // Check if this instruction is a call to a noreturn function. If this
+ // is a call to noreturn function and we don't need the stack unwinding
+ // functionality (i.e. this function does not have uwtable attribute and
+ // the callee function has the nounwind attribute), then we can ignore
+ // the definitions set by this instruction.
+ if (!HasUWTable && IsExitBB && MI->isCall()) {
+ for (MachineInstr::mop_iterator MOI = MI->operands_begin(),
+ MOE = MI->operands_end(); MOI != MOE; ++MOI) {
+ MachineOperand &MO = *MOI;
+ if (!MO.isGlobal())
+ continue;
+ const Function *Func = dyn_cast<Function>(MO.getGlobal());
+ if (!Func || !Func->hasFnAttribute(Attribute::NoReturn) ||
+ // We need to keep correct unwind information
+ // even if the function will not return, since the
+ // runtime may need it.
+ !Func->hasFnAttribute(Attribute::NoUnwind))
+ continue;
+ NoReturnInsts.insert(MI);
+ break;
+ }
+ }
+
for (MachineInstr::mop_iterator MOI = MI->operands_begin(),
MOE = MI->operands_end(); MOI != MOE; ++MOI) {
MachineOperand &MO = *MOI;
@@ -335,6 +375,15 @@ void VirtRegRewriter::rewrite() {
if (MO.isRegMask())
MRI->addPhysRegsUsedFromRegMask(MO.getRegMask());
+ // If we encounter a VirtReg or PhysReg then get at the PhysReg and add
+ // it to the physreg bitset. Later we use only the PhysRegs that were
+ // actually encountered in the MF to populate the MRI's used physregs.
+ if (MO.isReg() && MO.getReg())
+ PhysRegs.insert(
+ TargetRegisterInfo::isVirtualRegister(MO.getReg()) ?
+ VRM->getPhys(MO.getReg()) :
+ MO.getReg());
+
if (!MO.isReg() || !TargetRegisterInfo::isVirtualRegister(MO.getReg()))
continue;
unsigned VirtReg = MO.getReg();
@@ -421,5 +470,29 @@ void VirtRegRewriter::rewrite() {
}
}
}
+
+ // Tell MRI about physical registers in use.
+ if (NoReturnInsts.empty()) {
+ for (SparseSet<unsigned>::iterator
+ RegI = PhysRegs.begin(), E = PhysRegs.end(); RegI != E; ++RegI)
+ if (!MRI->reg_nodbg_empty(*RegI))
+ MRI->setPhysRegUsed(*RegI);
+ } else {
+ for (SparseSet<unsigned>::iterator
+ I = PhysRegs.begin(), E = PhysRegs.end(); I != E; ++I) {
+ unsigned Reg = *I;
+ if (MRI->reg_nodbg_empty(Reg))
+ continue;
+ // Check if this register has a use that will impact the rest of the
+ // code. Uses in debug and noreturn instructions do not impact the
+ // generated code.
+ for (MachineInstr &It : MRI->reg_nodbg_instructions(Reg)) {
+ if (!NoReturnInsts.count(&It)) {
+ MRI->setPhysRegUsed(Reg);
+ break;
+ }
+ }
+ }
+ }
}
Modified: projects/clang370-import/contrib/llvm/lib/ExecutionEngine/ExecutionEngine.cpp
==============================================================================
--- projects/clang370-import/contrib/llvm/lib/ExecutionEngine/ExecutionEngine.cpp Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/lib/ExecutionEngine/ExecutionEngine.cpp Sun Sep 6 19:58:48 2015 (r287521)
@@ -180,10 +180,17 @@ uint64_t ExecutionEngineState::RemoveMap
}
std::string ExecutionEngine::getMangledName(const GlobalValue *GV) {
+ assert(GV->hasName() && "Global must have name.");
+
MutexGuard locked(lock);
- Mangler Mang;
SmallString<128> FullName;
- Mang.getNameWithPrefix(FullName, GV, false);
+
+ const DataLayout &DL =
+ GV->getParent()->getDataLayout().isDefault()
+ ? *getDataLayout()
+ : GV->getParent()->getDataLayout();
+
+ Mangler::getNameWithPrefix(FullName, GV->getName(), DL);
return FullName.str();
}
Modified: projects/clang370-import/contrib/llvm/lib/ExecutionEngine/MCJIT/MCJIT.cpp
==============================================================================
--- projects/clang370-import/contrib/llvm/lib/ExecutionEngine/MCJIT/MCJIT.cpp Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/lib/ExecutionEngine/MCJIT/MCJIT.cpp Sun Sep 6 19:58:48 2015 (r287521)
@@ -266,6 +266,12 @@ void MCJIT::finalizeModule(Module *M) {
RuntimeDyld::SymbolInfo MCJIT::findExistingSymbol(const std::string &Name) {
SmallString<128> FullName;
Mangler::getNameWithPrefix(FullName, Name, *TM->getDataLayout());
+
+ if (void *Addr = getPointerToGlobalIfAvailable(FullName))
+ return RuntimeDyld::SymbolInfo(static_cast<uint64_t>(
+ reinterpret_cast<uintptr_t>(Addr)),
+ JITSymbolFlags::Exported);
+
return Dyld.getSymbol(FullName);
}
Modified: projects/clang370-import/contrib/llvm/lib/ExecutionEngine/RuntimeDyld/RTDyldMemoryManager.cpp
==============================================================================
--- projects/clang370-import/contrib/llvm/lib/ExecutionEngine/RuntimeDyld/RTDyldMemoryManager.cpp Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/lib/ExecutionEngine/RuntimeDyld/RTDyldMemoryManager.cpp Sun Sep 6 19:58:48 2015 (r287521)
@@ -98,7 +98,7 @@ void RTDyldMemoryManager::registerEHFram
uint64_t LoadAddr,
size_t Size) {
// On OS X OS X __register_frame takes a single FDE as an argument.
- // See http://lists.cs.uiuc.edu/pipermail/llvmdev/2013-April/061768.html
+ // See http://lists.llvm.org/pipermail/llvm-dev/2013-April/061768.html
const char *P = (const char *)Addr;
const char *End = P + Size;
do {
Modified: projects/clang370-import/contrib/llvm/lib/IR/Type.cpp
==============================================================================
--- projects/clang370-import/contrib/llvm/lib/IR/Type.cpp Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/lib/IR/Type.cpp Sun Sep 6 19:58:48 2015 (r287521)
@@ -613,6 +613,9 @@ bool StructType::isLayoutIdentical(Struc
if (isPacked() != Other->isPacked() ||
getNumElements() != Other->getNumElements())
return false;
+
+ if (!getNumElements())
+ return true;
return std::equal(element_begin(), element_end(), Other->element_begin());
}
Modified: projects/clang370-import/contrib/llvm/lib/Support/MemoryBuffer.cpp
==============================================================================
--- projects/clang370-import/contrib/llvm/lib/Support/MemoryBuffer.cpp Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/lib/Support/MemoryBuffer.cpp Sun Sep 6 19:58:48 2015 (r287521)
@@ -57,7 +57,8 @@ void MemoryBuffer::init(const char *BufS
/// CopyStringRef - Copies contents of a StringRef into a block of memory and
/// null-terminates it.
static void CopyStringRef(char *Memory, StringRef Data) {
- memcpy(Memory, Data.data(), Data.size());
+ if (!Data.empty())
+ memcpy(Memory, Data.data(), Data.size());
Memory[Data.size()] = 0; // Null terminate string.
}
Modified: projects/clang370-import/contrib/llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
==============================================================================
--- projects/clang370-import/contrib/llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp Sun Sep 6 19:58:48 2015 (r287521)
@@ -593,6 +593,7 @@ bool AArch64A57FPLoadBalancing::colorCha
if (Change) {
Substs[MO.getReg()] = Reg;
MO.setReg(Reg);
+ MRI->setPhysRegUsed(Reg);
Changed = true;
}
Modified: projects/clang370-import/contrib/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
==============================================================================
--- projects/clang370-import/contrib/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp Sun Sep 6 19:58:48 2015 (r287521)
@@ -354,6 +354,7 @@ void AArch64FrameLowering::emitPrologue(
if (NumBytes && NeedsRealignment) {
// Use the first callee-saved register as a scratch register.
scratchSPReg = AArch64::X9;
+ MF.getRegInfo().setPhysRegUsed(scratchSPReg);
}
// If we're a leaf function, try using the red zone.
Modified: projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/AMDGPU.td
==============================================================================
--- projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/AMDGPU.td Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/AMDGPU.td Sun Sep 6 19:58:48 2015 (r287521)
@@ -123,6 +123,11 @@ def FeatureSGPRInitBug : SubtargetFeatur
"true",
"VI SGPR initilization bug requiring a fixed SGPR allocation size">;
+def FeatureEnableHugeScratchBuffer : SubtargetFeature<"huge-scratch-buffer",
+ "EnableHugeScratchBuffer",
+ "true",
+ "Enable scratch buffer sizes greater than 128 GB">;
+
class SubtargetFeatureFetchLimit <string Value> :
SubtargetFeature <"fetch"#Value,
"TexVTXClauseSize",
Modified: projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
==============================================================================
--- projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp Sun Sep 6 19:58:48 2015 (r287521)
@@ -1029,6 +1029,10 @@ bool AMDGPUDAGToDAGISel::SelectMUBUFAddr
SDValue &SLC, SDValue &TFE) const {
SDValue Ptr, Offen, Idxen, Addr64;
+ // addr64 bit was removed for volcanic islands.
+ if (Subtarget->getGeneration() >= AMDGPUSubtarget::VOLCANIC_ISLANDS)
+ return false;
+
SelectMUBUF(Addr, Ptr, VAddr, SOffset, Offset, Offen, Idxen, Addr64,
GLC, SLC, TFE);
@@ -1095,13 +1099,16 @@ bool AMDGPUDAGToDAGISel::SelectMUBUFScra
// (add n0, c1)
if (CurDAG->isBaseWithConstantOffset(Addr)) {
+ SDValue N0 = Addr.getOperand(0);
SDValue N1 = Addr.getOperand(1);
- ConstantSDNode *C1 = cast<ConstantSDNode>(N1);
-
- if (isLegalMUBUFImmOffset(C1)) {
- VAddr = Addr.getOperand(0);
- ImmOffset = CurDAG->getTargetConstant(C1->getZExtValue(), DL, MVT::i16);
- return true;
+ // Offsets in vaddr must be positive.
+ if (CurDAG->SignBitIsZero(N0)) {
+ ConstantSDNode *C1 = cast<ConstantSDNode>(N1);
+ if (isLegalMUBUFImmOffset(C1)) {
+ VAddr = N0;
+ ImmOffset = CurDAG->getTargetConstant(C1->getZExtValue(), DL, MVT::i16);
+ return true;
+ }
}
}
Modified: projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
==============================================================================
--- projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp Sun Sep 6 19:58:48 2015 (r287521)
@@ -73,7 +73,7 @@ AMDGPUSubtarget::AMDGPUSubtarget(const T
WavefrontSize(0), CFALUBug(false), LocalMemorySize(0),
EnableVGPRSpilling(false), SGPRInitBug(false), IsGCN(false),
GCN1Encoding(false), GCN3Encoding(false), CIInsts(false), LDSBankCount(0),
- IsaVersion(ISAVersion0_0_0),
+ IsaVersion(ISAVersion0_0_0), EnableHugeScratchBuffer(false),
FrameLowering(TargetFrameLowering::StackGrowsUp,
64 * 16, // Maximum stack alignment (long16)
0),
Modified: projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
==============================================================================
--- projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h Sun Sep 6 19:58:48 2015 (r287521)
@@ -89,6 +89,7 @@ private:
bool FeatureDisable;
int LDSBankCount;
unsigned IsaVersion;
+ bool EnableHugeScratchBuffer;
AMDGPUFrameLowering FrameLowering;
std::unique_ptr<AMDGPUTargetLowering> TLInfo;
@@ -271,6 +272,10 @@ public:
return DevName;
}
+ bool enableHugeScratchBuffer() const {
+ return EnableHugeScratchBuffer;
+ }
+
bool dumpCode() const {
return DumpCode;
}
Modified: projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp
==============================================================================
--- projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp Sun Sep 6 19:58:48 2015 (r287521)
@@ -1719,7 +1719,6 @@ MachineBasicBlock *
AMDGPUCFGStructurizer::normalizeInfiniteLoopExit(MachineLoop* LoopRep) {
MachineBasicBlock *LoopHeader = LoopRep->getHeader();
MachineBasicBlock *LoopLatch = LoopRep->getLoopLatch();
- const TargetRegisterClass * I32RC = TRI->getCFGStructurizerRegClass(MVT::i32);
if (!LoopHeader || !LoopLatch)
return nullptr;
@@ -1732,18 +1731,9 @@ AMDGPUCFGStructurizer::normalizeInfinite
FuncRep->push_back(DummyExitBlk); //insert to function
SHOWNEWBLK(DummyExitBlk, "DummyExitBlock to normalize infiniteLoop: ");
DEBUG(dbgs() << "Old branch instr: " << *BranchMI << "\n";);
- MachineBasicBlock::iterator I = BranchMI;
- unsigned ImmReg = FuncRep->getRegInfo().createVirtualRegister(I32RC);
- llvm_unreachable("Extra register needed to handle CFG");
- MachineInstr *NewMI = insertInstrBefore(I, AMDGPU::BRANCH_COND_i32);
- MachineInstrBuilder MIB(*FuncRep, NewMI);
- MIB.addMBB(LoopHeader);
- MIB.addReg(ImmReg, false);
- SHOWNEWINSTR(NewMI);
- BranchMI->eraseFromParent();
- LoopLatch->addSuccessor(DummyExitBlk);
-
- return DummyExitBlk;
+ LLVMContext &Ctx = LoopHeader->getParent()->getFunction()->getContext();
+ Ctx.emitError("Extra register needed to handle CFG");
+ return nullptr;
}
void AMDGPUCFGStructurizer::removeUnconditionalBranch(MachineBasicBlock *MBB) {
Modified: projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/Processors.td
==============================================================================
--- projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/Processors.td Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/Processors.td Sun Sep 6 19:58:48 2015 (r287521)
@@ -138,3 +138,7 @@ def : ProcessorModel<"iceland", SIQuarte
def : ProcessorModel<"carrizo", SIQuarterSpeedModel,
[FeatureVolcanicIslands, FeatureISAVersion8_0_1]
>;
+
+def : ProcessorModel<"fiji", SIQuarterSpeedModel,
+ [FeatureVolcanicIslands, FeatureISAVersion8_0_1]
+>;
Modified: projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
==============================================================================
--- projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/SIISelLowering.cpp Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/SIISelLowering.cpp Sun Sep 6 19:58:48 2015 (r287521)
@@ -254,6 +254,12 @@ bool SITargetLowering::isShuffleMaskLega
return false;
}
+bool SITargetLowering::isLegalFlatAddressingMode(const AddrMode &AM) const {
+ // Flat instructions do not have offsets, and only have the register
+ // address.
+ return AM.BaseOffs == 0 && (AM.Scale == 0 || AM.Scale == 1);
+}
+
bool SITargetLowering::isLegalAddressingMode(const DataLayout &DL,
const AddrMode &AM, Type *Ty,
unsigned AS) const {
@@ -263,8 +269,21 @@ bool SITargetLowering::isLegalAddressing
switch (AS) {
case AMDGPUAS::GLOBAL_ADDRESS:
- case AMDGPUAS::CONSTANT_ADDRESS: // XXX - Should we assume SMRD instructions?
+ if (Subtarget->getGeneration() >= AMDGPUSubtarget::VOLCANIC_ISLANDS) {
+ // Assume the we will use FLAT for all global memory accesses
+ // on VI.
+ // FIXME: This assumption is currently wrong. On VI we still use
+ // MUBUF instructions for the r + i addressing mode. As currently
+ // implemented, the MUBUF instructions only work on buffer < 4GB.
+ // It may be possible to support > 4GB buffers with MUBUF instructions,
+ // by setting the stride value in the resource descriptor which would
+ // increase the size limit to (stride * 4GB). However, this is risky,
+ // because it has never been validated.
+ return isLegalFlatAddressingMode(AM);
+ }
+ // fall-through
case AMDGPUAS::PRIVATE_ADDRESS:
+ case AMDGPUAS::CONSTANT_ADDRESS: // XXX - Should we assume SMRD instructions?
case AMDGPUAS::UNKNOWN_ADDRESS_SPACE: {
// MUBUF / MTBUF instructions have a 12-bit unsigned byte offset, and
// additionally can do r + r + i with addr64. 32-bit has more addressing
@@ -324,11 +343,9 @@ bool SITargetLowering::isLegalAddressing
return false;
}
- case AMDGPUAS::FLAT_ADDRESS: {
- // Flat instructions do not have offsets, and only have the register
- // address.
- return AM.BaseOffs == 0 && (AM.Scale == 0 || AM.Scale == 1);
- }
+ case AMDGPUAS::FLAT_ADDRESS:
+ return isLegalFlatAddressingMode(AM);
+
default:
llvm_unreachable("unhandled address space");
}
@@ -812,10 +829,29 @@ static SDNode *findUser(SDValue Value, u
SDValue SITargetLowering::LowerFrameIndex(SDValue Op, SelectionDAG &DAG) const {
+ SDLoc SL(Op);
FrameIndexSDNode *FINode = cast<FrameIndexSDNode>(Op);
unsigned FrameIndex = FINode->getIndex();
- return DAG.getTargetFrameIndex(FrameIndex, MVT::i32);
+ // A FrameIndex node represents a 32-bit offset into scratch memory. If
+ // the high bit of a frame index offset were to be set, this would mean
+ // that it represented an offset of ~2GB * 64 = ~128GB from the start of the
+ // scratch buffer, with 64 being the number of threads per wave.
+ //
+ // If we know the machine uses less than 128GB of scratch, then we can
+ // amrk the high bit of the FrameIndex node as known zero,
+ // which is important, because it means in most situations we can
+ // prove that values derived from FrameIndex nodes are non-negative.
+ // This enables us to take advantage of more addressing modes when
+ // accessing scratch buffers, since for scratch reads/writes, the register
+ // offset must always be positive.
+
+ SDValue TFI = DAG.getTargetFrameIndex(FrameIndex, MVT::i32);
+ if (Subtarget->enableHugeScratchBuffer())
+ return TFI;
+
+ return DAG.getNode(ISD::AssertZext, SL, MVT::i32, TFI,
+ DAG.getValueType(EVT::getIntegerVT(*DAG.getContext(), 31)));
}
/// This transforms the control flow intrinsics to get the branch destination as
@@ -2034,6 +2070,13 @@ void SITargetLowering::adjustWritemask(M
}
}
+static bool isFrameIndexOp(SDValue Op) {
+ if (Op.getOpcode() == ISD::AssertZext)
+ Op = Op.getOperand(0);
+
+ return isa<FrameIndexSDNode>(Op);
+}
+
/// \brief Legalize target independent instructions (e.g. INSERT_SUBREG)
/// with frame index operands.
/// LLVM assumes that inputs are to these instructions are registers.
@@ -2042,7 +2085,7 @@ void SITargetLowering::legalizeTargetInd
SmallVector<SDValue, 8> Ops;
for (unsigned i = 0; i < Node->getNumOperands(); ++i) {
- if (!isa<FrameIndexSDNode>(Node->getOperand(i))) {
+ if (!isFrameIndexOp(Node->getOperand(i))) {
Ops.push_back(Node->getOperand(i));
continue;
}
Modified: projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/SIISelLowering.h
==============================================================================
--- projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/SIISelLowering.h Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/SIISelLowering.h Sun Sep 6 19:58:48 2015 (r287521)
@@ -56,6 +56,7 @@ class SITargetLowering : public AMDGPUTa
SDValue performMin3Max3Combine(SDNode *N, DAGCombinerInfo &DCI) const;
SDValue performSetCCCombine(SDNode *N, DAGCombinerInfo &DCI) const;
+ bool isLegalFlatAddressingMode(const AddrMode &AM) const;
public:
SITargetLowering(TargetMachine &tm, const AMDGPUSubtarget &STI);
Modified: projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.td
==============================================================================
--- projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.td Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.td Sun Sep 6 19:58:48 2015 (r287521)
@@ -1600,12 +1600,14 @@ multiclass VOPC_m <vopc op, dag outs, da
SIMCInstr <opName#"_e32", SISubtarget.SI> {
let Defs = !if(DefExec, [EXEC], []);
let hasSideEffects = DefExec;
+ let AssemblerPredicates = [isSICI];
}
def _vi : VOPC<op.VI, ins, asm, []>,
SIMCInstr <opName#"_e32", SISubtarget.VI> {
let Defs = !if(DefExec, [EXEC], []);
let hasSideEffects = DefExec;
+ let AssemblerPredicates = [isVI];
}
}
Modified: projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/SIInstructions.td
==============================================================================
--- projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/SIInstructions.td Sun Sep 6 18:58:33 2015 (r287520)
+++ projects/clang370-import/contrib/llvm/lib/Target/AMDGPU/SIInstructions.td Sun Sep 6 19:58:48 2015 (r287521)
@@ -2910,9 +2910,6 @@ defm : MUBUFLoad_Pattern <BUFFER_LOAD_SB
defm : MUBUFLoad_Pattern <BUFFER_LOAD_UBYTE_ADDR64, i32, az_extloadi8_constant>;
defm : MUBUFLoad_Pattern <BUFFER_LOAD_SSHORT_ADDR64, i32, sextloadi16_constant>;
defm : MUBUFLoad_Pattern <BUFFER_LOAD_USHORT_ADDR64, i32, az_extloadi16_constant>;
-defm : MUBUFLoad_Pattern <BUFFER_LOAD_DWORD_ADDR64, i32, constant_load>;
-defm : MUBUFLoad_Pattern <BUFFER_LOAD_DWORDX2_ADDR64, v2i32, constant_load>;
-defm : MUBUFLoad_Pattern <BUFFER_LOAD_DWORDX4_ADDR64, v4i32, constant_load>;
} // End Predicates = [isSICI]
class MUBUFScratchLoadPat <MUBUF Instr, ValueType vt, PatFrag ld> : Pat <
@@ -3273,13 +3270,13 @@ def : Pat <
(f64 (fadd (f64 (VOP3Mods f64:$x, i32:$mods)),
(f64 (fneg (f64 (ffloor (f64 (VOP3Mods f64:$x, i32:$mods)))))))),
(V_CNDMASK_B64_PSEUDO
- $x,
*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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