svn commit: r291675 - projects/intel_net_refactor/sys/contrib/dev/lem
Sean Bruno
sbruno at FreeBSD.org
Thu Dec 3 04:35:46 UTC 2015
Author: sbruno
Date: Thu Dec 3 04:35:44 2015
New Revision: 291675
URL: https://svnweb.freebsd.org/changeset/base/291675
Log:
Import version 7.2.4 of the Intel FreeBSD Driver, em(4) from
https://downloadcenter.intel.com into the contrib directory.
Added:
projects/intel_net_refactor/sys/contrib/dev/lem/
projects/intel_net_refactor/sys/contrib/dev/lem/Makefile (contents, props changed)
projects/intel_net_refactor/sys/contrib/dev/lem/README (contents, props changed)
projects/intel_net_refactor/sys/contrib/dev/lem/e1000_80003es2lan.c (contents, props changed)
projects/intel_net_refactor/sys/contrib/dev/lem/e1000_80003es2lan.h (contents, props changed)
projects/intel_net_refactor/sys/contrib/dev/lem/e1000_82540.c (contents, props changed)
projects/intel_net_refactor/sys/contrib/dev/lem/e1000_82541.c (contents, props changed)
projects/intel_net_refactor/sys/contrib/dev/lem/e1000_82541.h (contents, props changed)
projects/intel_net_refactor/sys/contrib/dev/lem/e1000_82542.c (contents, props changed)
projects/intel_net_refactor/sys/contrib/dev/lem/e1000_82543.c (contents, props changed)
projects/intel_net_refactor/sys/contrib/dev/lem/e1000_82543.h (contents, props changed)
projects/intel_net_refactor/sys/contrib/dev/lem/e1000_82571.c (contents, props changed)
projects/intel_net_refactor/sys/contrib/dev/lem/e1000_82571.h (contents, props changed)
projects/intel_net_refactor/sys/contrib/dev/lem/e1000_api.c (contents, props changed)
projects/intel_net_refactor/sys/contrib/dev/lem/e1000_api.h (contents, props changed)
projects/intel_net_refactor/sys/contrib/dev/lem/e1000_defines.h (contents, props changed)
projects/intel_net_refactor/sys/contrib/dev/lem/e1000_hw.h (contents, props changed)
projects/intel_net_refactor/sys/contrib/dev/lem/e1000_ich8lan.c (contents, props changed)
projects/intel_net_refactor/sys/contrib/dev/lem/e1000_ich8lan.h (contents, props changed)
projects/intel_net_refactor/sys/contrib/dev/lem/e1000_mac.c (contents, props changed)
projects/intel_net_refactor/sys/contrib/dev/lem/e1000_mac.h (contents, props changed)
projects/intel_net_refactor/sys/contrib/dev/lem/e1000_manage.c (contents, props changed)
projects/intel_net_refactor/sys/contrib/dev/lem/e1000_manage.h (contents, props changed)
projects/intel_net_refactor/sys/contrib/dev/lem/e1000_nvm.c (contents, props changed)
projects/intel_net_refactor/sys/contrib/dev/lem/e1000_nvm.h (contents, props changed)
projects/intel_net_refactor/sys/contrib/dev/lem/e1000_osdep.c (contents, props changed)
projects/intel_net_refactor/sys/contrib/dev/lem/e1000_osdep.h (contents, props changed)
projects/intel_net_refactor/sys/contrib/dev/lem/e1000_phy.c (contents, props changed)
projects/intel_net_refactor/sys/contrib/dev/lem/e1000_phy.h (contents, props changed)
projects/intel_net_refactor/sys/contrib/dev/lem/e1000_regs.h (contents, props changed)
projects/intel_net_refactor/sys/contrib/dev/lem/if_em.c (contents, props changed)
projects/intel_net_refactor/sys/contrib/dev/lem/if_em.h (contents, props changed)
projects/intel_net_refactor/sys/contrib/dev/lem/if_lem.c (contents, props changed)
projects/intel_net_refactor/sys/contrib/dev/lem/if_lem.h (contents, props changed)
Added: projects/intel_net_refactor/sys/contrib/dev/lem/Makefile
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ projects/intel_net_refactor/sys/contrib/dev/lem/Makefile Thu Dec 3 04:35:44 2015 (r291675)
@@ -0,0 +1,29 @@
+#$FreeBSD$
+.PATH: ${.CURDIR}
+KMOD = if_em
+SRCS = device_if.h bus_if.h pci_if.h opt_bdg.h
+SRCS += $(CORE_SRC) $(COMMON_SHARED) $(LEGACY_SHARED) $(PCIE_SHARED)
+CORE_SRC = if_em.c if_lem.c e1000_osdep.c
+COMMON_SHARED = e1000_api.c e1000_phy.c e1000_nvm.c e1000_mac.c e1000_manage.c
+PCIE_SHARED = e1000_80003es2lan.c e1000_ich8lan.c e1000_82571.c
+LEGACY_SHARED = e1000_82540.c e1000_82542.c e1000_82541.c e1000_82543.c
+
+# Uncomment this to disable Fast interrupt handling.
+#CFLAGS += -DEM_LEGACY_IRQ
+
+# Uncomment this to enable the stack multiqueue routines
+# with this driver you do not get multiple tx queues,
+# but it does provide input queuing. Testing has shown
+# some stability issues so its off by default.
+#CFLAGS += -DEM_MULTIQUEUE
+
+# DEVICE_POLLING for a non-interrupt-driven method
+#CFLAGS += -DDEVICE_POLLING
+
+clean:
+ rm -f opt_bdg.h device_if.h bus_if.h pci_if.h setdef*
+ rm -f *.o *.kld *.ko
+ rm -f @ machine
+ rm -f ${CLEANFILES}
+
+.include <bsd.kmod.mk>
Added: projects/intel_net_refactor/sys/contrib/dev/lem/README
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ projects/intel_net_refactor/sys/contrib/dev/lem/README Thu Dec 3 04:35:44 2015 (r291675)
@@ -0,0 +1,430 @@
+FreeBSD* Driver for Intel® Ethernet
+===================================
+
+April 11, 2011
+
+
+Contents
+========
+
+- Overview
+- Identifying Your Adapter
+- Building and Installation
+- Speed and Duplex Configuration
+- Additional Configurations
+- Known Limitations
+- Support
+- License
+
+
+Overview
+========
+
+This file describes the FreeBSD* driver for Intel® Ethernet. This driver has
+been developed for use with FreeBSD, Release 7.x.
+
+For questions related to hardware requirements, refer to the documentation
+supplied with your Gigabit adapter. All hardware requirements listed
+apply to use with FreeBSD.
+
+
+Identifying Your Adapter
+========================
+
+For information on how to identify your adapter, go to the Adapter &
+Driver ID Guide at:
+
+http://support.intel.com/support/go/network/adapter/proidguide.htm
+
+
+For the latest Intel network drivers for FreeBSD, see:
+
+http://support.intel.com/support/go/network/adapter/home.htm
+
+
+NOTE: Mobile adapters are not fully supported.
+NOTE: The Intel(R) 82562v 10/100 Network Connection only provides 10/100
+support.
+
+Building and Installation
+=========================
+
+NOTE: This driver is only supported as a loadable module at this time.
+
+In the instructions below, x.x.x is the driver version as indicated in the
+name of the driver tar file.
+
+1. Move the base driver tar file to the directory of your choice. For
+ example, use /home/username/em or /usr/local/src/em.
+
+2. Untar/unzip the archive:
+
+ tar xzvf em-x.x.x.tar.gz
+
+ This will create an em-x.x.x directory.
+
+3. To create a loadable module, perform the following steps.
+
+ a. To compile the module
+
+ cd em-x.x.x
+ make
+
+ b. To install the compiled module to the system directory:
+
+ make install
+
+ c. If you want the driver to load automatically when the system is booted:
+
+ 1. Edit /boot/loader.conf, and add the following line:
+
+ if_em_load="YES"
+
+4. To assign an IP address to the interface, enter the following:
+
+ ifconfig emX <IP_address>
+
+5. Verify that the interface works. Enter the following, where <IP_address>
+ is the IP address for another machine on the same subnet as the interface
+ that is being tested:
+
+ ping <IP_address>
+
+6. To configure the IP address to remain after reboot, edit /etc/rc.conf,
+ and create the appropriate ifconfig_em<interface_num> entry:
+
+ ifconfig_em<interface_num>="<ifconfig_settings>"
+
+ Example usage:
+
+ ifconfig_em0="inet 192.168.10.1 netmask 255.255.255.0"
+
+ NOTE: For assistance, see the ifconfig man page.
+
+
+Speed and Duplex Configuration
+==============================
+
+By default, the adapter auto-negotiates the speed and duplex of the
+connection. If there is a specific need, the ifconfig utility can be used to
+configure the speed and duplex settings on the adapter. Example usage:
+
+ ifconfig emX <IP_address> media 100baseTX mediaopt
+ full-duplex
+
+ NOTE: Only use mediaopt to set the driver to full-duplex. If mediaopt is
+ not specified and you are not running at gigabit speed, the driver
+ defaults to half-duplex.
+
+If the interface is currently forced to 100 full duplex, in order to change
+to half duplex you must use this command:
+
+ ifconfig emX <IP_address> media 100baseTX -mediaopt
+ full-duplex
+
+
+This driver supports the following media type options:
+
+ autoselect - Enables auto-negotiation for speed and duplex.
+
+ 10baseT/UTP - Sets speed to 10 Mbps. Use the ifconfig mediaopt
+ option to select full-duplex mode.
+
+ 100baseTX - Sets speed to 100 Mbps. Use the ifconfig mediaopt
+ option to select full-duplex mode.
+
+ 1000baseTX - Sets speed to 1000 Mbps. In this case, the driver
+ supports only full-duplex mode.
+
+ 1000baseSX - Sets speed to 1000 Mbps. In this case, the driver
+ supports only full-duplex mode.
+
+For more information on the ifconfig utility, see the ifconfig man page.
+
+
+Additional Configurations
+=========================
+
+The driver supports Transmit/Receive Checksum Offload and Jumbo Frames on
+all but the 82542-based adapters. For specific adapters, refer to the
+Identifying Your Adapter section.
+
+ Jumbo Frames
+ ------------
+ To enable Jumbo Frames, use the ifconfig utility to set the Maximum
+ Transport Unit (MTU) frame size above its default of 1500 bytes.
+
+ The Jumbo Frames MTU range for Intel Adapters is 1500 to 16110. To modify
+ the setting, enter the following:
+
+ ifconfig emX <hostname or IP address> mtu 9000
+
+ To confirm the MTU used between two specific devices, use:
+
+ route get <destination_IP_address>
+
+ Notes:
+
+ - Only enable Jumbo Frames if your network infrastructure supports them.
+
+ - To enable Jumbo Frames, increase the MTU size on the interface beyond
+ 1500.
+
+ - The Jumbo Frames setting on the switch must be set to at least 22 bytes
+ larger than that of the MTU.
+
+ - The maximum MTU setting for Jumbo Frames is 16110. This value coincides
+ with the maximum Jumbo Frames size of 16128.
+
+ - Some Intel gigabit adapters that support Jumbo Frames have a frame size
+ limit of 9238 bytes, with a corresponding MTU size limit of 9216 bytes.
+ The adapters with this limitation are based on the Intel(R) 82571EB,
+ 82572EI, 82573L, 82566, 82562, and 80003ES2LAN controller. These
+ correspond to the following product names:
+ Intel(R) PRO/1000 PT Server Adapter
+ Intel(R) PRO/1000 PT Desktop Adapter
+ Intel(R) PRO/1000 PT Network Connection
+ Intel(R) PRO/1000 PT Dual Port Server Adapter
+ Intel(R) PRO/1000 PT Dual Port Network Connection
+ Intel(R) PRO/1000 PT Quad Port Server Adapter
+ Intel(R) PRO/1000 PF Quad Port Server Adapter
+ Intel(R) PRO/1000 PF Server Adapter
+ Intel(R) PRO/1000 PF Network Connection
+ Intel(R) PRO/1000 PF Dual Port Server Adapter
+ Intel(R) PRO/1000 PB Server Connection
+ Intel(R) PRO/1000 PL Network Connection
+ Intel(R) PRO/1000 EB Network Connection with I/O Acceleration
+ Intel(R) PRO/1000 EB Backplane Connection with I/O Acceleration
+ Intel(R) 82566DM-2 Gigabit Network Connection
+ Intel(R) 82574L Gigabit Network Connection
+ Intel(R) Gigabit CT Desktop Adapter
+ Intel(R) 82567LM-4 Gigabit Network Connection
+ Intel(R) 82567LM-3 Gigabit Network Connection
+ Intel(R) 82567LF-3 Gigabit Network Connection
+
+ - Using Jumbo Frames at 10 or 100 Mbps may result in poor performance or
+ loss of link.
+
+ - The following adapters limit Jumbo Frames sized packets to a maximum of
+ 4088 bytes:
+ Intel(R) 82578DM Gigabit Network Connection
+
+ - The following adapters do not support Jumbo Frames:
+ Intel(R) PRO/1000 Gigabit Server Adapter
+ Intel(R) PRO/1000 PM Network Connection
+ Intel(R) 82562V 10/100 Network Connection
+ Intel(R) 82566DM Gigabit Network Connection
+ Intel(R) 82566DC Gigabit Network Connection
+ Intel(R) 82566MM Gigabit Network Connection
+ Intel(R) 82566MC Gigabit Network Connection
+ Intel(R) 82562GT 10/100 Network Connection
+ Intel(R) 82562G 10/100 Network Connection
+ Intel(R) 82566DC-2 Gigabit Network Connection
+ Intel(R) 82562V-2 10/100 Network Connection
+ Intel(R) 82562G-2 10/100 Network Connection
+ Intel(R) 82562GT-2 10/100 Network Connection
+ Intel(R) 82578DC Gigabit Network Connection
+ Intel(R) 82567V-3 Gigabit Network Connection
+
+ VLANs
+ -----
+ To create a new VLAN interface:
+
+ ifconfig <vlan_name> create
+
+ To associate the VLAN interface with a physical interface and
+ assign a VLAN ID, IP address, and netmask:
+
+ ifconfig <vlan_name> <ip_address> netmask <subnet_mask> vlan
+ <vlan_id> vlandev <physical_interface>
+
+ Example:
+
+ ifconfig vlan10 10.0.0.1 netmask 255.255.255.0 vlan 10 vlandev em0
+
+ In this example, all packets will be marked on egress with 802.1Q VLAN
+ tags, specifying a VLAN ID of 10.
+
+ To remove a VLAN interface:
+
+ Intel® Network Connection ifconfig <vlan_name> destroy
+
+
+ Polling
+ -------
+
+ To enable polling in the driver, add the following options to the kernel
+ configuration, and then recompile the kernel:
+
+ options DEVICE_POLLING
+ options HZ=1000
+
+ At runtime use:
+ ifconfig emX polling (to turn polling on)
+ and:
+ ifconfig emX -polling (to turn it off)
+
+
+ Checksum Offload
+ ----------------
+ Checksum offloading is not supported on 82542 Gigabit adapters.
+
+ Checksum offloading supports both TCP and UDP packets and is supported
+ for both transmit and receive.
+
+ Checksum offloading can be enabled or disabled using ifconfig. Both transmit
+ and receive offloading will be either enabled or disabled together. You
+ cannot enable/disable one without the other.
+
+ To enable checksum offloading:
+
+ ifconfig emX rxcsum
+
+ To disable checksum offloading:
+
+ ifconfig emX -rxcsum
+
+ To confirm the current setting:
+
+ ifconfig emX
+
+ Look for the presence or absence of the following line:
+
+ options=3 <RXCSUM,TXCSUM>
+
+ See the ifconfig man page for further information.
+
+
+ TSO
+ ---
+ The FreeBSD driver offers support for TSO (TCP Segmentation Offload).
+
+ You can enable/disable it in two ways/places:
+
+ - sysctl net.inet.tcp.tso=0 (or 1 to enable it)
+
+ Doing this disables TSO in the stack and will affect all adapters.
+
+ - ifconfig emX -tso
+
+ Doing this will disable TSO only for this adapter.
+
+ To enable:
+
+ - ifconfig emX tso
+
+ NOTES: By default only PCI-Express adapters are ENABLED to do TSO. Others
+ can be enabled by the user at their own risk
+ TSO is not supported on 82547 and 82544-based adapters, as well as older
+ adapters.
+
+ Timesync
+ --------
+ The FreeBSD driver offers support for Timesync with 82574L, 82567LM, and
+ 82567LF-based network connections. Timesync is used to keep applications
+ in sync by adding very precise timestamps to both outbound and inbound
+ packets.
+
+ Timesync is off by default. To enable, edit the makefile by uncommenting the
+ line:
+
+ #CFLAGS +=-DEM_TIMESYNC
+
+ This will compile support into the driver. When the driver loads on
+ supported hardware the feature will initialize.
+
+ MSI-X
+ -----
+ The FreeBSD driver offers MSIX support with 82574L-based network connections.
+ 82574L-based network connections will use MSI-X by default.
+
+ MSI or MSI-X can be turned off by an entry in /etc/sysctl.conf
+
+ hw.em.enable_msi=0
+
+ Unload and reload the driver.
+
+
+Known Limitations
+=================
+
+For known hardware and troubleshooting issues, refer to the following website.
+
+ http://support.intel.com/support/go/network/adapter/home.htm
+
+Either select the link for your adapter or perform a search for the adapter
+number. The adapter's page lists many issues. For a complete list of hardware
+issues download your adapter's user guide and read the Release Notes.
+
+ Detected Tx Unit Hang in Quad Port Adapters
+ -------------------------------------------
+
+ In some cases ports 3 and 4 wont pass traffic. Ports 1 and 2 don't show
+ any errors and will pass traffic.
+
+ This issue MAY be resolved by updating to the latest BIOS. You can
+ check your system's BIOS by downloading the Linux Firmware Developer Kit
+ that can be obtained at http://www.linuxfirmwarekit.org/
+
+
+ There are known performance issues with this driver when running UDP traffic
+ with Jumbo Frames.
+ ----------------------------------------------------------------------------
+
+ 82541/82547 can't link or is slow to link with some link partners
+ -----------------------------------------------------------------
+
+ There is a known compatibility issue where time to link is slow or link is not
+ established between 82541/82547 controllers and some switches. Known switches
+ include:
+ Planex FXG-08TE
+ I-O Data ETG-SH8
+
+ The driver can be compiled with the following changes:
+
+ Edit ./em.x.x.x/src/if_em.h to change the #define EM_MASTER_SLAVE
+ For example, change from:
+
+ #define EM_MASTER_SLAVE e1000_ms_hw_default
+ to:
+ #define EM_MASTER_SLAVE 2
+
+ Use one of the following options:
+ 1 = Master mode
+ 2 = Slave mode
+ 3 = Auto master/slave
+ Setting 2 is recommended.
+
+ Recompile the module:
+ a. To compile the module
+ cd em-x.x.x
+ make clean
+ make
+
+ b. To install the compiled module in system directory:
+ make install
+
+
+Support
+=======
+
+For general information and support, go to the Intel support website at:
+
+ www.intel.com/support/
+
+If an issue is identified, support is through email only at:
+freebsd at intel.com
+
+
+License
+=======
+
+This software program is released under the terms of a license agreement
+between you ('Licensee') and Intel. Do not use or load this software or any
+associated materials (collectively, the 'Software') until you have carefully
+read the full terms and conditions of the LICENSE located in this software
+package. By loading or using the Software, you agree to the terms of this
+Agreement. If you do not agree with the terms of this Agreement, do not
+install or use the Software.
+
+* Other names and brands may be claimed as the property of others.
Added: projects/intel_net_refactor/sys/contrib/dev/lem/e1000_80003es2lan.c
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ projects/intel_net_refactor/sys/contrib/dev/lem/e1000_80003es2lan.c Thu Dec 3 04:35:44 2015 (r291675)
@@ -0,0 +1,1560 @@
+/******************************************************************************
+
+ Copyright (c) 2001-2009, Intel Corporation
+ All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+
+ 3. Neither the name of the Intel Corporation nor the names of its
+ contributors may be used to endorse or promote products derived from
+ this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ POSSIBILITY OF SUCH DAMAGE.
+
+******************************************************************************/
+/*$FreeBSD$*/
+
+/*
+ * 80003ES2LAN Gigabit Ethernet Controller (Copper)
+ * 80003ES2LAN Gigabit Ethernet Controller (Serdes)
+ */
+
+#include "e1000_api.h"
+
+static s32 e1000_init_phy_params_80003es2lan(struct e1000_hw *hw);
+static s32 e1000_init_nvm_params_80003es2lan(struct e1000_hw *hw);
+static s32 e1000_init_mac_params_80003es2lan(struct e1000_hw *hw);
+static s32 e1000_acquire_phy_80003es2lan(struct e1000_hw *hw);
+static void e1000_release_phy_80003es2lan(struct e1000_hw *hw);
+static s32 e1000_acquire_nvm_80003es2lan(struct e1000_hw *hw);
+static void e1000_release_nvm_80003es2lan(struct e1000_hw *hw);
+static s32 e1000_read_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,
+ u32 offset,
+ u16 *data);
+static s32 e1000_write_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,
+ u32 offset,
+ u16 data);
+static s32 e1000_write_nvm_80003es2lan(struct e1000_hw *hw, u16 offset,
+ u16 words, u16 *data);
+static s32 e1000_get_cfg_done_80003es2lan(struct e1000_hw *hw);
+static s32 e1000_phy_force_speed_duplex_80003es2lan(struct e1000_hw *hw);
+static s32 e1000_get_cable_length_80003es2lan(struct e1000_hw *hw);
+static s32 e1000_get_link_up_info_80003es2lan(struct e1000_hw *hw, u16 *speed,
+ u16 *duplex);
+static s32 e1000_reset_hw_80003es2lan(struct e1000_hw *hw);
+static s32 e1000_init_hw_80003es2lan(struct e1000_hw *hw);
+static s32 e1000_setup_copper_link_80003es2lan(struct e1000_hw *hw);
+static void e1000_clear_hw_cntrs_80003es2lan(struct e1000_hw *hw);
+static s32 e1000_acquire_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask);
+static s32 e1000_cfg_kmrn_10_100_80003es2lan(struct e1000_hw *hw, u16 duplex);
+static s32 e1000_cfg_kmrn_1000_80003es2lan(struct e1000_hw *hw);
+static s32 e1000_cfg_on_link_up_80003es2lan(struct e1000_hw *hw);
+static s32 e1000_read_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,
+ u16 *data);
+static s32 e1000_write_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,
+ u16 data);
+static s32 e1000_copper_link_setup_gg82563_80003es2lan(struct e1000_hw *hw);
+static void e1000_initialize_hw_bits_80003es2lan(struct e1000_hw *hw);
+static void e1000_release_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask);
+static s32 e1000_read_mac_addr_80003es2lan(struct e1000_hw *hw);
+static void e1000_power_down_phy_copper_80003es2lan(struct e1000_hw *hw);
+
+/*
+ * A table for the GG82563 cable length where the range is defined
+ * with a lower bound at "index" and the upper bound at
+ * "index + 5".
+ */
+static const u16 e1000_gg82563_cable_length_table[] = {
+ 0, 60, 115, 150, 150, 60, 115, 150, 180, 180, 0xFF };
+#define GG82563_CABLE_LENGTH_TABLE_SIZE \
+ (sizeof(e1000_gg82563_cable_length_table) / \
+ sizeof(e1000_gg82563_cable_length_table[0]))
+
+/**
+ * e1000_init_phy_params_80003es2lan - Init ESB2 PHY func ptrs.
+ * @hw: pointer to the HW structure
+ **/
+static s32 e1000_init_phy_params_80003es2lan(struct e1000_hw *hw)
+{
+ struct e1000_phy_info *phy = &hw->phy;
+ s32 ret_val = E1000_SUCCESS;
+
+ DEBUGFUNC("e1000_init_phy_params_80003es2lan");
+
+ if (hw->phy.media_type != e1000_media_type_copper) {
+ phy->type = e1000_phy_none;
+ goto out;
+ } else {
+ phy->ops.power_up = e1000_power_up_phy_copper;
+ phy->ops.power_down = e1000_power_down_phy_copper_80003es2lan;
+ }
+
+ phy->addr = 1;
+ phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT;
+ phy->reset_delay_us = 100;
+ phy->type = e1000_phy_gg82563;
+
+ phy->ops.acquire = e1000_acquire_phy_80003es2lan;
+ phy->ops.check_polarity = e1000_check_polarity_m88;
+ phy->ops.check_reset_block = e1000_check_reset_block_generic;
+ phy->ops.commit = e1000_phy_sw_reset_generic;
+ phy->ops.get_cfg_done = e1000_get_cfg_done_80003es2lan;
+ phy->ops.get_info = e1000_get_phy_info_m88;
+ phy->ops.release = e1000_release_phy_80003es2lan;
+ phy->ops.reset = e1000_phy_hw_reset_generic;
+ phy->ops.set_d3_lplu_state = e1000_set_d3_lplu_state_generic;
+
+ phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_80003es2lan;
+ phy->ops.get_cable_length = e1000_get_cable_length_80003es2lan;
+ phy->ops.read_reg = e1000_read_phy_reg_gg82563_80003es2lan;
+ phy->ops.write_reg = e1000_write_phy_reg_gg82563_80003es2lan;
+
+ phy->ops.cfg_on_link_up = e1000_cfg_on_link_up_80003es2lan;
+
+ /* This can only be done after all function pointers are setup. */
+ ret_val = e1000_get_phy_id(hw);
+
+ /* Verify phy id */
+ if (phy->id != GG82563_E_PHY_ID) {
+ ret_val = -E1000_ERR_PHY;
+ goto out;
+ }
+
+out:
+ return ret_val;
+}
+
+/**
+ * e1000_init_nvm_params_80003es2lan - Init ESB2 NVM func ptrs.
+ * @hw: pointer to the HW structure
+ **/
+static s32 e1000_init_nvm_params_80003es2lan(struct e1000_hw *hw)
+{
+ struct e1000_nvm_info *nvm = &hw->nvm;
+ u32 eecd = E1000_READ_REG(hw, E1000_EECD);
+ u16 size;
+
+ DEBUGFUNC("e1000_init_nvm_params_80003es2lan");
+
+ nvm->opcode_bits = 8;
+ nvm->delay_usec = 1;
+ switch (nvm->override) {
+ case e1000_nvm_override_spi_large:
+ nvm->page_size = 32;
+ nvm->address_bits = 16;
+ break;
+ case e1000_nvm_override_spi_small:
+ nvm->page_size = 8;
+ nvm->address_bits = 8;
+ break;
+ default:
+ nvm->page_size = eecd & E1000_EECD_ADDR_BITS ? 32 : 8;
+ nvm->address_bits = eecd & E1000_EECD_ADDR_BITS ? 16 : 8;
+ break;
+ }
+
+ nvm->type = e1000_nvm_eeprom_spi;
+
+ size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >>
+ E1000_EECD_SIZE_EX_SHIFT);
+
+ /*
+ * Added to a constant, "size" becomes the left-shift value
+ * for setting word_size.
+ */
+ size += NVM_WORD_SIZE_BASE_SHIFT;
+
+ /* EEPROM access above 16k is unsupported */
+ if (size > 14)
+ size = 14;
+ nvm->word_size = 1 << size;
+
+ /* Function Pointers */
+ nvm->ops.acquire = e1000_acquire_nvm_80003es2lan;
+ nvm->ops.read = e1000_read_nvm_eerd;
+ nvm->ops.release = e1000_release_nvm_80003es2lan;
+ nvm->ops.update = e1000_update_nvm_checksum_generic;
+ nvm->ops.valid_led_default = e1000_valid_led_default_generic;
+ nvm->ops.validate = e1000_validate_nvm_checksum_generic;
+ nvm->ops.write = e1000_write_nvm_80003es2lan;
+
+ return E1000_SUCCESS;
+}
+
+/**
+ * e1000_init_mac_params_80003es2lan - Init ESB2 MAC func ptrs.
+ * @hw: pointer to the HW structure
+ **/
+static s32 e1000_init_mac_params_80003es2lan(struct e1000_hw *hw)
+{
+ struct e1000_mac_info *mac = &hw->mac;
+
+ DEBUGFUNC("e1000_init_mac_params_80003es2lan");
+
+ /* Set media type and media-dependent function pointers */
+ switch (hw->device_id) {
+ case E1000_DEV_ID_80003ES2LAN_SERDES_DPT:
+ hw->phy.media_type = e1000_media_type_internal_serdes;
+ mac->ops.check_for_link = e1000_check_for_serdes_link_generic;
+ mac->ops.setup_physical_interface =
+ e1000_setup_fiber_serdes_link_generic;
+ break;
+ default:
+ hw->phy.media_type = e1000_media_type_copper;
+ mac->ops.check_for_link = e1000_check_for_copper_link_generic;
+ mac->ops.setup_physical_interface =
+ e1000_setup_copper_link_80003es2lan;
+ break;
+ }
+
+ /* Set mta register count */
+ mac->mta_reg_count = 128;
+ /* Set rar entry count */
+ mac->rar_entry_count = E1000_RAR_ENTRIES;
+ /* Set if part includes ASF firmware */
+ mac->asf_firmware_present = TRUE;
+ /* FWSM register */
+ mac->has_fwsm = TRUE;
+ /* ARC supported; valid only if manageability features are enabled. */
+ mac->arc_subsystem_valid =
+ (E1000_READ_REG(hw, E1000_FWSM) & E1000_FWSM_MODE_MASK)
+ ? TRUE : FALSE;
+ /* Adaptive IFS not supported */
+ mac->adaptive_ifs = FALSE;
+
+ /* Function pointers */
+
+ /* bus type/speed/width */
+ mac->ops.get_bus_info = e1000_get_bus_info_pcie_generic;
+ /* reset */
+ mac->ops.reset_hw = e1000_reset_hw_80003es2lan;
+ /* hw initialization */
+ mac->ops.init_hw = e1000_init_hw_80003es2lan;
+ /* link setup */
+ mac->ops.setup_link = e1000_setup_link_generic;
+ /* check management mode */
+ mac->ops.check_mng_mode = e1000_check_mng_mode_generic;
+ /* multicast address update */
+ mac->ops.update_mc_addr_list = e1000_update_mc_addr_list_generic;
+ /* writing VFTA */
+ mac->ops.write_vfta = e1000_write_vfta_generic;
+ /* clearing VFTA */
+ mac->ops.clear_vfta = e1000_clear_vfta_generic;
+ /* read mac address */
+ mac->ops.read_mac_addr = e1000_read_mac_addr_80003es2lan;
+ /* ID LED init */
+ mac->ops.id_led_init = e1000_id_led_init_generic;
+ /* blink LED */
+ mac->ops.blink_led = e1000_blink_led_generic;
+ /* setup LED */
+ mac->ops.setup_led = e1000_setup_led_generic;
+ /* cleanup LED */
+ mac->ops.cleanup_led = e1000_cleanup_led_generic;
+ /* turn on/off LED */
+ mac->ops.led_on = e1000_led_on_generic;
+ mac->ops.led_off = e1000_led_off_generic;
+ /* clear hardware counters */
+ mac->ops.clear_hw_cntrs = e1000_clear_hw_cntrs_80003es2lan;
+ /* link info */
+ mac->ops.get_link_up_info = e1000_get_link_up_info_80003es2lan;
+
+ /* set lan id for port to determine which phy lock to use */
+ hw->mac.ops.set_lan_id(hw);
+
+ return E1000_SUCCESS;
+}
+
+/**
+ * e1000_init_function_pointers_80003es2lan - Init ESB2 func ptrs.
+ * @hw: pointer to the HW structure
+ *
+ * Called to initialize all function pointers and parameters.
+ **/
+void e1000_init_function_pointers_80003es2lan(struct e1000_hw *hw)
+{
+ DEBUGFUNC("e1000_init_function_pointers_80003es2lan");
+
+ hw->mac.ops.init_params = e1000_init_mac_params_80003es2lan;
+ hw->nvm.ops.init_params = e1000_init_nvm_params_80003es2lan;
+ hw->phy.ops.init_params = e1000_init_phy_params_80003es2lan;
+}
+
+/**
+ * e1000_acquire_phy_80003es2lan - Acquire rights to access PHY
+ * @hw: pointer to the HW structure
+ *
+ * A wrapper to acquire access rights to the correct PHY.
+ **/
+static s32 e1000_acquire_phy_80003es2lan(struct e1000_hw *hw)
+{
+ u16 mask;
+
+ DEBUGFUNC("e1000_acquire_phy_80003es2lan");
+
+ mask = hw->bus.func ? E1000_SWFW_PHY1_SM : E1000_SWFW_PHY0_SM;
+ return e1000_acquire_swfw_sync_80003es2lan(hw, mask);
+}
+
+/**
+ * e1000_release_phy_80003es2lan - Release rights to access PHY
+ * @hw: pointer to the HW structure
+ *
+ * A wrapper to release access rights to the correct PHY.
+ **/
+static void e1000_release_phy_80003es2lan(struct e1000_hw *hw)
+{
+ u16 mask;
+
+ DEBUGFUNC("e1000_release_phy_80003es2lan");
+
+ mask = hw->bus.func ? E1000_SWFW_PHY1_SM : E1000_SWFW_PHY0_SM;
+ e1000_release_swfw_sync_80003es2lan(hw, mask);
+}
+
+/**
+ * e1000_acquire_mac_csr_80003es2lan - Acquire rights to access Kumeran register
+ * @hw: pointer to the HW structure
+ *
+ * Acquire the semaphore to access the Kumeran interface.
+ *
+ **/
+static s32 e1000_acquire_mac_csr_80003es2lan(struct e1000_hw *hw)
+{
+ u16 mask;
+
+ DEBUGFUNC("e1000_acquire_mac_csr_80003es2lan");
+
+ mask = E1000_SWFW_CSR_SM;
+
+ return e1000_acquire_swfw_sync_80003es2lan(hw, mask);
+}
+
+/**
+ * e1000_release_mac_csr_80003es2lan - Release rights to access Kumeran Register
+ * @hw: pointer to the HW structure
+ *
+ * Release the semaphore used to access the Kumeran interface
+ **/
+static void e1000_release_mac_csr_80003es2lan(struct e1000_hw *hw)
+{
+ u16 mask;
+
+ DEBUGFUNC("e1000_release_mac_csr_80003es2lan");
+
+ mask = E1000_SWFW_CSR_SM;
+
+ e1000_release_swfw_sync_80003es2lan(hw, mask);
+}
+
+/**
+ * e1000_acquire_nvm_80003es2lan - Acquire rights to access NVM
+ * @hw: pointer to the HW structure
+ *
+ * Acquire the semaphore to access the EEPROM.
+ **/
+static s32 e1000_acquire_nvm_80003es2lan(struct e1000_hw *hw)
+{
+ s32 ret_val;
+
+ DEBUGFUNC("e1000_acquire_nvm_80003es2lan");
+
+ ret_val = e1000_acquire_swfw_sync_80003es2lan(hw, E1000_SWFW_EEP_SM);
+ if (ret_val)
+ goto out;
+
+ ret_val = e1000_acquire_nvm_generic(hw);
+
+ if (ret_val)
+ e1000_release_swfw_sync_80003es2lan(hw, E1000_SWFW_EEP_SM);
+
+out:
+ return ret_val;
+}
+
+/**
+ * e1000_release_nvm_80003es2lan - Relinquish rights to access NVM
+ * @hw: pointer to the HW structure
+ *
+ * Release the semaphore used to access the EEPROM.
+ **/
+static void e1000_release_nvm_80003es2lan(struct e1000_hw *hw)
+{
+ DEBUGFUNC("e1000_release_nvm_80003es2lan");
+
+ e1000_release_nvm_generic(hw);
+ e1000_release_swfw_sync_80003es2lan(hw, E1000_SWFW_EEP_SM);
+}
+
+/**
+ * e1000_acquire_swfw_sync_80003es2lan - Acquire SW/FW semaphore
+ * @hw: pointer to the HW structure
+ * @mask: specifies which semaphore to acquire
+ *
+ * Acquire the SW/FW semaphore to access the PHY or NVM. The mask
+ * will also specify which port we're acquiring the lock for.
+ **/
+static s32 e1000_acquire_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask)
+{
+ u32 swfw_sync;
+ u32 swmask = mask;
+ u32 fwmask = mask << 16;
+ s32 ret_val = E1000_SUCCESS;
+ s32 i = 0, timeout = 50;
+
+ DEBUGFUNC("e1000_acquire_swfw_sync_80003es2lan");
+
+ while (i < timeout) {
+ if (e1000_get_hw_semaphore_generic(hw)) {
+ ret_val = -E1000_ERR_SWFW_SYNC;
+ goto out;
+ }
+
+ swfw_sync = E1000_READ_REG(hw, E1000_SW_FW_SYNC);
+ if (!(swfw_sync & (fwmask | swmask)))
+ break;
+
+ /*
+ * Firmware currently using resource (fwmask)
+ * or other software thread using resource (swmask)
+ */
+ e1000_put_hw_semaphore_generic(hw);
+ msec_delay_irq(5);
+ i++;
+ }
+
+ if (i == timeout) {
+ DEBUGOUT("Driver can't access resource, SW_FW_SYNC timeout.\n");
+ ret_val = -E1000_ERR_SWFW_SYNC;
+ goto out;
+ }
+
+ swfw_sync |= swmask;
+ E1000_WRITE_REG(hw, E1000_SW_FW_SYNC, swfw_sync);
+
+ e1000_put_hw_semaphore_generic(hw);
+
+out:
+ return ret_val;
+}
+
+/**
+ * e1000_release_swfw_sync_80003es2lan - Release SW/FW semaphore
+ * @hw: pointer to the HW structure
+ * @mask: specifies which semaphore to acquire
+ *
+ * Release the SW/FW semaphore used to access the PHY or NVM. The mask
+ * will also specify which port we're releasing the lock for.
+ **/
+static void e1000_release_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask)
+{
+ u32 swfw_sync;
+
+ DEBUGFUNC("e1000_release_swfw_sync_80003es2lan");
+
+ while (e1000_get_hw_semaphore_generic(hw) != E1000_SUCCESS)
+ ; /* Empty */
+
+ swfw_sync = E1000_READ_REG(hw, E1000_SW_FW_SYNC);
+ swfw_sync &= ~mask;
+ E1000_WRITE_REG(hw, E1000_SW_FW_SYNC, swfw_sync);
+
+ e1000_put_hw_semaphore_generic(hw);
+}
+
+/**
+ * e1000_read_phy_reg_gg82563_80003es2lan - Read GG82563 PHY register
+ * @hw: pointer to the HW structure
+ * @offset: offset of the register to read
+ * @data: pointer to the data returned from the operation
+ *
+ * Read the GG82563 PHY register.
+ **/
+static s32 e1000_read_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,
+ u32 offset, u16 *data)
+{
+ s32 ret_val;
+ u32 page_select;
+ u16 temp;
+
+ DEBUGFUNC("e1000_read_phy_reg_gg82563_80003es2lan");
+
+ ret_val = e1000_acquire_phy_80003es2lan(hw);
+ if (ret_val)
+ goto out;
+
+ /* Select Configuration Page */
+ if ((offset & MAX_PHY_REG_ADDRESS) < GG82563_MIN_ALT_REG) {
+ page_select = GG82563_PHY_PAGE_SELECT;
+ } else {
+ /*
+ * Use Alternative Page Select register to access
+ * registers 30 and 31
+ */
+ page_select = GG82563_PHY_PAGE_SELECT_ALT;
+ }
+
+ temp = (u16)((u16)offset >> GG82563_PAGE_SHIFT);
+ ret_val = e1000_write_phy_reg_mdic(hw, page_select, temp);
+ if (ret_val) {
+ e1000_release_phy_80003es2lan(hw);
+ goto out;
+ }
+
+ if (hw->dev_spec._80003es2lan.mdic_wa_enable == TRUE) {
+ /*
+ * The "ready" bit in the MDIC register may be incorrectly set
+ * before the device has completed the "Page Select" MDI
+ * transaction. So we wait 200us after each MDI command...
+ */
+ usec_delay(200);
+
+ /* ...and verify the command was successful. */
+ ret_val = e1000_read_phy_reg_mdic(hw, page_select, &temp);
+
+ if (((u16)offset >> GG82563_PAGE_SHIFT) != temp) {
*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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