svn commit: r262473 - in projects/clang-sparc64: bin/sh lib/libc/iconv lib/libiconv_modules/BIG5 lib/libiconv_modules/HZ lib/libiconv_modules/VIQR share/man/man4 share/man/man7 sys/arm/arm sys/arm/...

Dimitry Andric dim at FreeBSD.org
Tue Feb 25 07:40:43 UTC 2014 

Author: dim
Date: Tue Feb 25 07:40:37 2014
New Revision: 262473
URL: http://svnweb.freebsd.org/changeset/base/262473

Log:
  Merge from head up to r262472.

Added:
  projects/clang-sparc64/sys/arm/conf/QUARTZ
     - copied unchanged from r262472, head/sys/arm/conf/QUARTZ
  projects/clang-sparc64/sys/arm/freescale/imx/imx6_mp.c
     - copied unchanged from r262472, head/sys/arm/freescale/imx/imx6_mp.c
  projects/clang-sparc64/sys/boot/fdt/dts/vybrid-quartz.dts
     - copied unchanged from r262472, head/sys/boot/fdt/dts/vybrid-quartz.dts
  projects/clang-sparc64/sys/dev/etherswitch/arswitch/arswitch_8327.c
     - copied unchanged from r262472, head/sys/dev/etherswitch/arswitch/arswitch_8327.c
  projects/clang-sparc64/sys/dev/etherswitch/arswitch/arswitch_8327.h
     - copied unchanged from r262472, head/sys/dev/etherswitch/arswitch/arswitch_8327.h
  projects/clang-sparc64/sys/dev/iwn/if_iwn_ioctl.h
     - copied unchanged from r262472, head/sys/dev/iwn/if_iwn_ioctl.h
  projects/clang-sparc64/tools/tools/iwn/
     - copied from r262472, head/tools/tools/iwn/
  projects/clang-sparc64/usr.sbin/pmcstat/pmcpl_annotate_cg.c
     - copied unchanged from r262472, head/usr.sbin/pmcstat/pmcpl_annotate_cg.c
  projects/clang-sparc64/usr.sbin/pmcstat/pmcpl_annotate_cg.h
     - copied unchanged from r262472, head/usr.sbin/pmcstat/pmcpl_annotate_cg.h
Modified:
  projects/clang-sparc64/bin/sh/sh.1
  projects/clang-sparc64/lib/libc/iconv/citrus_prop.c
  projects/clang-sparc64/lib/libc/iconv/citrus_prop.h
  projects/clang-sparc64/lib/libiconv_modules/BIG5/citrus_big5.c
  projects/clang-sparc64/lib/libiconv_modules/HZ/citrus_hz.c
  projects/clang-sparc64/lib/libiconv_modules/VIQR/citrus_viqr.c
  projects/clang-sparc64/share/man/man4/atp.4
  projects/clang-sparc64/share/man/man7/hier.7
  projects/clang-sparc64/sys/arm/arm/cpufunc.c
  projects/clang-sparc64/sys/arm/arm/cpufunc_asm_armv4.S
  projects/clang-sparc64/sys/arm/arm/cpufunc_asm_armv6.S
  projects/clang-sparc64/sys/arm/arm/cpufunc_asm_armv7.S
  projects/clang-sparc64/sys/arm/arm/mp_machdep.c
  projects/clang-sparc64/sys/arm/conf/IMX6
  projects/clang-sparc64/sys/arm/freescale/imx/files.imx6
  projects/clang-sparc64/sys/arm/freescale/imx/std.imx6
  projects/clang-sparc64/sys/arm/include/cpufunc.h
  projects/clang-sparc64/sys/boot/common/Makefile.inc
  projects/clang-sparc64/sys/boot/fdt/dts/am335x.dtsi
  projects/clang-sparc64/sys/boot/fdt/dts/beaglebone-black.dts
  projects/clang-sparc64/sys/boot/ficl/Makefile
  projects/clang-sparc64/sys/cddl/dev/systrace/systrace.c
  projects/clang-sparc64/sys/conf/files
  projects/clang-sparc64/sys/dev/etherswitch/arswitch/arswitch.c
  projects/clang-sparc64/sys/dev/etherswitch/arswitch/arswitch_vlans.c
  projects/clang-sparc64/sys/dev/etherswitch/arswitch/arswitch_vlans.h
  projects/clang-sparc64/sys/dev/etherswitch/arswitch/arswitchvar.h
  projects/clang-sparc64/sys/dev/iwn/if_iwn.c
  projects/clang-sparc64/sys/dev/iwn/if_iwn_debug.h
  projects/clang-sparc64/sys/dev/iwn/if_iwnvar.h
  projects/clang-sparc64/sys/dev/usb/input/atp.c
  projects/clang-sparc64/sys/dev/usb/wlan/if_run.c
  projects/clang-sparc64/sys/dev/usb/wlan/if_runvar.h
  projects/clang-sparc64/sys/mips/conf/DB120.hints
  projects/clang-sparc64/sys/sparc64/pci/fire.c
  projects/clang-sparc64/sys/sparc64/sparc64/spitfire.c
  projects/clang-sparc64/usr.sbin/pkg/pkg.c
  projects/clang-sparc64/usr.sbin/pmcstat/Makefile
  projects/clang-sparc64/usr.sbin/pmcstat/pmcstat.c
  projects/clang-sparc64/usr.sbin/pmcstat/pmcstat.h
  projects/clang-sparc64/usr.sbin/pmcstat/pmcstat_log.c
Directory Properties:
  projects/clang-sparc64/   (props changed)
  projects/clang-sparc64/lib/libc/   (props changed)
  projects/clang-sparc64/share/man/man4/   (props changed)
  projects/clang-sparc64/sys/   (props changed)
  projects/clang-sparc64/sys/boot/   (props changed)
  projects/clang-sparc64/sys/conf/   (props changed)

Modified: projects/clang-sparc64/bin/sh/sh.1
==============================================================================
--- projects/clang-sparc64/bin/sh/sh.1	Tue Feb 25 07:33:28 2014	(r262472)
+++ projects/clang-sparc64/bin/sh/sh.1	Tue Feb 25 07:40:37 2014	(r262473)
@@ -40,14 +40,14 @@
 .Nd command interpreter (shell)
 .Sh SYNOPSIS
 .Nm
-.Op Fl /+abCEefIimnPpTuVvx
+.Op Fl /+abCEefhIimnPpTuVvx
 .Op Fl /+o Ar longname
 .Oo
 .Ar script
 .Op Ar arg ...
 .Oc
 .Nm
-.Op Fl /+abCEefIimnPpTuVvx
+.Op Fl /+abCEefhIimnPpTuVvx
 .Op Fl /+o Ar longname
 .Fl c Ar string
 .Oo
@@ -55,7 +55,7 @@
 .Op Ar arg ...
 .Oc
 .Nm
-.Op Fl /+abCEefIimnPpTuVvx
+.Op Fl /+abCEefhIimnPpTuVvx
 .Op Fl /+o Ar longname
 .Fl s
 .Op Ar arg ...

Modified: projects/clang-sparc64/lib/libc/iconv/citrus_prop.c
==============================================================================
--- projects/clang-sparc64/lib/libc/iconv/citrus_prop.c	Tue Feb 25 07:33:28 2014	(r262472)
+++ projects/clang-sparc64/lib/libc/iconv/citrus_prop.c	Tue Feb 25 07:40:37 2014	(r262473)
@@ -339,7 +339,7 @@ name_found:
 
 static int
 _citrus_prop_parse_element(struct _memstream * __restrict ms,
-    const _citrus_prop_hint_t * __restrict hints, void ** __restrict context)
+    const _citrus_prop_hint_t * __restrict hints, void * __restrict context)
 {
 	int ch, errnum;
 #define _CITRUS_PROP_HINT_NAME_LEN_MAX	255
@@ -435,8 +435,7 @@ _citrus_prop_parse_variable(const _citru
 		if (ch == EOF || ch == '\0')
 			break;
 		_memstream_ungetc(&ms, ch);
-		errnum = _citrus_prop_parse_element(
-		    &ms, hints, (void ** __restrict)context);
+		errnum = _citrus_prop_parse_element(&ms, hints, context);
 		if (errnum != 0)
 			return (errnum);
 	}

Modified: projects/clang-sparc64/lib/libc/iconv/citrus_prop.h
==============================================================================
--- projects/clang-sparc64/lib/libc/iconv/citrus_prop.h	Tue Feb 25 07:33:28 2014	(r262472)
+++ projects/clang-sparc64/lib/libc/iconv/citrus_prop.h	Tue Feb 25 07:40:37 2014	(r262473)
@@ -42,7 +42,7 @@ typedef struct _citrus_prop_hint_t _citr
 
 #define _CITRUS_PROP_CB0_T(_func_, _type_) \
 typedef int (*_citrus_prop_##_func_##_cb_func_t) \
-    (void ** __restrict, const char *, _type_); \
+    (void * __restrict, const char *, _type_); \
 typedef struct { \
 	_citrus_prop_##_func_##_cb_func_t func; \
 } _citrus_prop_##_func_##_cb_t;
@@ -52,7 +52,7 @@ _CITRUS_PROP_CB0_T(str, const char *)
 
 #define _CITRUS_PROP_CB1_T(_func_, _type_) \
 typedef int (*_citrus_prop_##_func_##_cb_func_t) \
-    (void ** __restrict, const char *, _type_, _type_); \
+    (void * __restrict, const char *, _type_, _type_); \
 typedef struct { \
 	_citrus_prop_##_func_##_cb_func_t func; \
 } _citrus_prop_##_func_##_cb_t;

Modified: projects/clang-sparc64/lib/libiconv_modules/BIG5/citrus_big5.c
==============================================================================
--- projects/clang-sparc64/lib/libiconv_modules/BIG5/citrus_big5.c	Tue Feb 25 07:33:28 2014	(r262472)
+++ projects/clang-sparc64/lib/libiconv_modules/BIG5/citrus_big5.c	Tue Feb 25 07:40:37 2014	(r262473)
@@ -172,7 +172,7 @@ _citrus_BIG5_check_excludes(_BIG5Encodin
 }
 
 static int
-_citrus_BIG5_fill_rowcol(void ** __restrict ctx, const char * __restrict s,
+_citrus_BIG5_fill_rowcol(void * __restrict ctx, const char * __restrict s,
     uint64_t start, uint64_t end)
 {
 	_BIG5EncodingInfo *ei;
@@ -191,7 +191,7 @@ _citrus_BIG5_fill_rowcol(void ** __restr
 
 static int
 /*ARGSUSED*/
-_citrus_BIG5_fill_excludes(void ** __restrict ctx,
+_citrus_BIG5_fill_excludes(void * __restrict ctx,
     const char * __restrict s __unused, uint64_t start, uint64_t end)
 {
 	_BIG5EncodingInfo *ei;
@@ -237,7 +237,6 @@ static int
 _citrus_BIG5_encoding_module_init(_BIG5EncodingInfo * __restrict ei,
     const void * __restrict var, size_t lenvar)
 {
-	void *ctx = (void *)ei;
 	const char *s;
 	int err;
 
@@ -259,9 +258,9 @@ _citrus_BIG5_encoding_module_init(_BIG5E
 	}
 
 	/* fallback Big5-1984, for backward compatibility. */
-	_citrus_BIG5_fill_rowcol((void **)&ctx, "row", 0xA1, 0xFE);
-	_citrus_BIG5_fill_rowcol((void **)&ctx, "col", 0x40, 0x7E);
-	_citrus_BIG5_fill_rowcol((void **)&ctx, "col", 0xA1, 0xFE);
+	_citrus_BIG5_fill_rowcol(ei, "row", 0xA1, 0xFE);
+	_citrus_BIG5_fill_rowcol(ei, "col", 0x40, 0x7E);
+	_citrus_BIG5_fill_rowcol(ei, "col", 0xA1, 0xFE);
 
 	return (0);
 }

Modified: projects/clang-sparc64/lib/libiconv_modules/HZ/citrus_hz.c
==============================================================================
--- projects/clang-sparc64/lib/libiconv_modules/HZ/citrus_hz.c	Tue Feb 25 07:33:28 2014	(r262472)
+++ projects/clang-sparc64/lib/libiconv_modules/HZ/citrus_hz.c	Tue Feb 25 07:40:37 2014	(r262473)
@@ -65,8 +65,8 @@ typedef enum {
 } charset_t;
 
 typedef struct {
-	int	 end;
 	int	 start;
+	int	 end;
 	int	 width;
 } range_t;
 
@@ -505,12 +505,12 @@ _citrus_HZ_encoding_module_uninit(_HZEnc
 }
 
 static int
-_citrus_HZ_parse_char(void **context, const char *name __unused, const char *s)
+_citrus_HZ_parse_char(void *context, const char *name __unused, const char *s)
 {
 	escape_t *escape;
 	void **p;
 
-	p = (void **)*context;
+	p = (void **)context;
 	escape = (escape_t *)p[0];
 	if (escape->ch != '\0')
 		return (EINVAL);
@@ -522,14 +522,14 @@ _citrus_HZ_parse_char(void **context, co
 }
 
 static int
-_citrus_HZ_parse_graphic(void **context, const char *name, const char *s)
+_citrus_HZ_parse_graphic(void *context, const char *name, const char *s)
 {
 	_HZEncodingInfo *ei;
 	escape_t *escape;
 	graphic_t *graphic;
 	void **p;
 
-	p = (void **)*context;
+	p = (void **)context;
 	escape = (escape_t *)p[0];
 	ei = (_HZEncodingInfo *)p[1];
 	graphic = malloc(sizeof(*graphic));
@@ -591,13 +591,13 @@ _CITRUS_PROP_HINT_END
 };
 
 static int
-_citrus_HZ_parse_escape(void **context, const char *name, const char *s)
+_citrus_HZ_parse_escape(void *context, const char *name, const char *s)
 {
 	_HZEncodingInfo *ei;
 	escape_t *escape;
 	void *p[2];
 
-	ei = (_HZEncodingInfo *)*context;
+	ei = (_HZEncodingInfo *)context;
 	escape = malloc(sizeof(*escape));
 	if (escape == NULL)
 		return (EINVAL);

Modified: projects/clang-sparc64/lib/libiconv_modules/VIQR/citrus_viqr.c
==============================================================================
--- projects/clang-sparc64/lib/libiconv_modules/VIQR/citrus_viqr.c	Tue Feb 25 07:33:28 2014	(r262472)
+++ projects/clang-sparc64/lib/libiconv_modules/VIQR/citrus_viqr.c	Tue Feb 25 07:40:37 2014	(r262473)
@@ -433,7 +433,6 @@ static int
 _citrus_VIQR_encoding_module_init(_VIQREncodingInfo * __restrict ei,
     const void * __restrict var __unused, size_t lenvar __unused)
 {
-	const mnemonic_def_t *p;
 	const char *s;
 	size_t i, n;
 	int errnum;
@@ -457,7 +456,10 @@ _citrus_VIQR_encoding_module_init(_VIQRE
 			return (errnum);
 		}
 	}
-	for (i = 0;; ++i) {
+#if mnemonic_ext_size > 0
+	for (i = 0; i < mnemonic_ext_size; ++i) {
+		const mnemonic_def_t *p;
+
 		p = &mnemonic_ext[i];
 		n = strlen(p->name);
 		if (ei->mb_cur_max < n)
@@ -469,6 +471,7 @@ _citrus_VIQR_encoding_module_init(_VIQRE
 			return (errnum);
 		}
 	}
+#endif
 
 	return (0);
 }

Modified: projects/clang-sparc64/share/man/man4/atp.4
==============================================================================
--- projects/clang-sparc64/share/man/man4/atp.4	Tue Feb 25 07:33:28 2014	(r262472)
+++ projects/clang-sparc64/share/man/man4/atp.4	Tue Feb 25 07:40:37 2014	(r262473)
@@ -1,4 +1,4 @@
-.\" Copyright (c) 2009 Rohit Grover <rgrover1 at gmail dot com>.
+.\" Copyright (c) 2014 Rohit Grover <rgrover1 at gmail dot com>.
 .\" All rights reserved.
 .\"
 .\" Redistribution and use in source and binary forms, with or without
@@ -27,7 +27,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd February 7, 2014
+.Dd February 24, 2014
 .Dt ATP 4
 .Os
 .Sh NAME
@@ -41,8 +41,7 @@ your kernel configuration file:
 .Cd "device usb"
 .Ed
 .Pp
-Alternatively, to load the driver as a
-module at boot time, place the following line in
+Alternatively, to load the driver as a module at boot time, place the following line in
 .Xr loader.conf 5 :
 .Bd -literal -offset indent
 atp_load="YES"
@@ -50,24 +49,21 @@ atp_load="YES"
 .Sh DESCRIPTION
 The
 .Nm
-driver provides support for the Apple Internal Trackpad
-device found in many Apple laptops.
+driver provides support for the Apple Internal Trackpad device found in many
+Apple laptops. Older (Fountain/Geyser) and the newer (Wellspring) trackpad
+families are all supported through a unified driver.
+.Pp
+The driver simulates a three\-button mouse using multi\-finger tap detection.
+Single finger tap generates a left\-button click; two\-finger tap maps to the
+middle button; whereas a three\-finger tap gets treated as a right button
+click.
+.Pp
+There is support for 2\-finger horizontal scrolling, which translates to
+page\-back/forward events; vertical multi\-finger scrolling emulates the mouse
+wheel.
 .Pp
-The driver simulates a three\-button mouse using multi\-finger tap
-detection.
-.
-A single\-finger tap generates a left button click;
-two\-finger tap maps to the middle button; whereas a three\-finger tap
-gets treated as a right button click.
-.
 A double\-tap followed by a drag is treated as a selection gesture; a
 virtual left\-button click is assumed for the lifespan of the drag.
-.
-.Nm
-attempts to filter away activity at the horizontal edges of the
-trackpad\-\-this is to keep unintentional palm movement from being
-considered as user input.
-.
 .Pp
 .Nm
 supports dynamic reconfiguration using
@@ -76,6 +72,28 @@ through nodes under
 .Nm hw.usb.atp .
 Pointer sensitivity can be controlled using the sysctl tunable
 .Nm hw.usb.atp.scale_factor .
+Smaller values of
+.Fa scale_factor
+result in faster movement.
+.
+A simple high-pass filter is used to reduce contributions
+from small movements; the threshold for this filter may be controlled by
+.Nm hw.usb.atp.small_movement .
+.
+The maximum tolerable duration of a touch gesture is controlled by
+.Nm hw.usb.atp.touch_timeout
+(in microseconds); beyond this period, touches are considered to be slides.
+(This conversion also happens when a finger stroke accumulates at least
+.Nm hw.usb.atp.slide_min_movement
+movement (in mickeys).
+.
+The maximum time (in microseconds) to allow an association between a double-
+tap and drag gesture may be controlled by
+.Nm hw.usb.atp.double_tap_threshold .
+.
+Should one want to disable tap detection and rely only upon physical button
+presses, set the following sysctl to a value of 2
+.Nm hw.usb.atp.tap_minimum .
 .
 .Sh HARDWARE
 The
@@ -84,6 +102,8 @@ driver provides support for the followin
 .Pp
 .Bl -bullet -compact
 .It
+PowerBooks, iBooks (IDs: 0x020e, 0x020f, 0x0210, 0x0214, 0x0215, 0x0216)
+.It
 Core Duo MacBook & MacBook Pro (IDs: 0x0217, 0x0218, 0x0219)
 .It
 Core2 Duo MacBook & MacBook Pro (IDs: 0x021a, 0x021b, 0x021c)
@@ -95,6 +115,14 @@ Core2 Duo MacBook3,1 (IDs: 0x0229, 0x022
 15 inch PowerBook (IDs: 0x020e, 0x020f, 0x0215)
 .It
 17 inch PowerBook (ID: 0x020d)
+.It
+Almost all recent Macbook-Pros and Airs (IDs: 0x0223, 0x0223, 0x0224, 0x0224,
+0x0225, 0x0225, 0x0230, 0x0230, 0x0231, 0x0231, 0x0232, 0x0232, 0x0236,
+0x0236, 0x0237, 0x0237, 0x0238, 0x0238, 0x023f, 0x023f, 0x0240, 0x0241,
+0x0242, 0x0243, 0x0244, 0x0245, 0x0246, 0x0247, 0x0249, 0x024a, 0x024b,
+0x024c, 0x024d, 0x024e, 0x0252, 0x0252, 0x0253, 0x0253, 0x0254, 0x0254,
+0x0259, 0x025a, 0x025b, 0x0262, 0x0262, 0x0263, 0x0264, 0x0290, 0x0291,
+0x0292)
 .El
 .Pp
 To discover the product\-id of a touchpad, search for 'Trackpad' in the

Modified: projects/clang-sparc64/share/man/man7/hier.7
==============================================================================
--- projects/clang-sparc64/share/man/man7/hier.7	Tue Feb 25 07:33:28 2014	(r262472)
+++ projects/clang-sparc64/share/man/man7/hier.7	Tue Feb 25 07:40:37 2014	(r262473)
@@ -383,6 +383,9 @@ a.out backward compatibility libraries
 DTrace library scripts
 .It Pa engines/
 OpenSSL (Cryptography/SSL toolkit) dynamically loadable engines
+.It Pa private/
+Private system libraries not for use by third-party programs.
+ABI and API stability are not guaranteed.
 .El
 .Pp
 .It Pa libdata/

Modified: projects/clang-sparc64/sys/arm/arm/cpufunc.c
==============================================================================
--- projects/clang-sparc64/sys/arm/arm/cpufunc.c	Tue Feb 25 07:33:28 2014	(r262472)
+++ projects/clang-sparc64/sys/arm/arm/cpufunc.c	Tue Feb 25 07:40:37 2014	(r262473)
@@ -146,6 +146,7 @@ struct cpu_functions arm7tdmi_cpufuncs =
 	(void *)arm7tdmi_cache_flushID,	/* dcache_inv_range	*/
 	(void *)cpufunc_nullop,		/* dcache_wb_range	*/
 
+	cpufunc_nullop,			/* idcache_inv_all	*/
 	arm7tdmi_cache_flushID,		/* idcache_wbinv_all	*/
 	(void *)arm7tdmi_cache_flushID,	/* idcache_wbinv_range	*/
 	cpufunc_nullop,			/* l2cache_wbinv_all	*/
@@ -208,6 +209,7 @@ struct cpu_functions arm8_cpufuncs = {
 /*XXX*/	(void *)arm8_cache_purgeID,	/* dcache_inv_range	*/
 	(void *)arm8_cache_cleanID,	/* dcache_wb_range	*/
 
+	cpufunc_nullop,			/* idcache_inv_all	*/
 	arm8_cache_purgeID,		/* idcache_wbinv_all	*/
 	(void *)arm8_cache_purgeID,	/* idcache_wbinv_range	*/
 	cpufunc_nullop,			/* l2cache_wbinv_all	*/
@@ -269,6 +271,7 @@ struct cpu_functions arm9_cpufuncs = {
 	arm9_dcache_inv_range,		/* dcache_inv_range	*/
 	arm9_dcache_wb_range,		/* dcache_wb_range	*/
 
+	armv4_idcache_inv_all,		/* idcache_inv_all	*/
 	arm9_idcache_wbinv_all,		/* idcache_wbinv_all	*/
 	arm9_idcache_wbinv_range,	/* idcache_wbinv_range	*/
 	cpufunc_nullop,			/* l2cache_wbinv_all	*/
@@ -331,6 +334,7 @@ struct cpu_functions armv5_ec_cpufuncs =
 	armv5_ec_dcache_inv_range,	/* dcache_inv_range	*/
 	armv5_ec_dcache_wb_range,	/* dcache_wb_range	*/
 
+	armv4_idcache_inv_all,		/* idcache_inv_all	*/
 	armv5_ec_idcache_wbinv_all,	/* idcache_wbinv_all	*/
 	armv5_ec_idcache_wbinv_range,	/* idcache_wbinv_range	*/
 
@@ -392,6 +396,7 @@ struct cpu_functions sheeva_cpufuncs = {
 	sheeva_dcache_inv_range,	/* dcache_inv_range	*/
 	sheeva_dcache_wb_range,		/* dcache_wb_range	*/
 
+	armv4_idcache_inv_all,		/* idcache_inv_all	*/
 	armv5_ec_idcache_wbinv_all,	/* idcache_wbinv_all	*/
 	sheeva_idcache_wbinv_range,	/* idcache_wbinv_all	*/
 
@@ -454,6 +459,7 @@ struct cpu_functions arm10_cpufuncs = {
 	arm10_dcache_inv_range,		/* dcache_inv_range	*/
 	arm10_dcache_wb_range,		/* dcache_wb_range	*/
 
+	armv4_idcache_inv_all,		/* idcache_inv_all	*/
 	arm10_idcache_wbinv_all,	/* idcache_wbinv_all	*/
 	arm10_idcache_wbinv_range,	/* idcache_wbinv_range	*/
 	cpufunc_nullop,			/* l2cache_wbinv_all	*/
@@ -515,6 +521,7 @@ struct cpu_functions pj4bv7_cpufuncs = {
 	armv7_dcache_inv_range,		/* dcache_inv_range	*/
 	armv7_dcache_wb_range,		/* dcache_wb_range	*/
 
+	armv7_idcache_inv_all,		/* idcache_inv_all	*/
 	armv7_idcache_wbinv_all,	/* idcache_wbinv_all	*/
 	armv7_idcache_wbinv_range,	/* idcache_wbinv_all	*/
 
@@ -577,6 +584,7 @@ struct cpu_functions sa110_cpufuncs = {
 /*XXX*/	sa1_cache_purgeD_rng,		/* dcache_inv_range	*/
 	sa1_cache_cleanD_rng,		/* dcache_wb_range	*/
 
+	sa1_cache_flushID,		/* idcache_inv_all	*/
 	sa1_cache_purgeID,		/* idcache_wbinv_all	*/
 	sa1_cache_purgeID_rng,		/* idcache_wbinv_range	*/
 	cpufunc_nullop,			/* l2cache_wbinv_all	*/
@@ -638,6 +646,7 @@ struct cpu_functions sa11x0_cpufuncs = {
 /*XXX*/	sa1_cache_purgeD_rng,		/* dcache_inv_range	*/
 	sa1_cache_cleanD_rng,		/* dcache_wb_range	*/
 
+	sa1_cache_flushID,		/* idcache_inv_all	*/
 	sa1_cache_purgeID,		/* idcache_wbinv_all	*/
 	sa1_cache_purgeID_rng,		/* idcache_wbinv_range	*/
 	cpufunc_nullop,			/* l2cache_wbinv_all	*/
@@ -699,6 +708,7 @@ struct cpu_functions ixp12x0_cpufuncs = 
 /*XXX*/	sa1_cache_purgeD_rng,		/* dcache_inv_range	*/
 	sa1_cache_cleanD_rng,		/* dcache_wb_range	*/
 
+	sa1_cache_flushID,		/* idcache_inv_all	*/
 	sa1_cache_purgeID,		/* idcache_wbinv_all	*/
 	sa1_cache_purgeID_rng,		/* idcache_wbinv_range	*/
 	cpufunc_nullop,			/* l2cache_wbinv_all	*/
@@ -763,6 +773,7 @@ struct cpu_functions xscale_cpufuncs = {
 	xscale_cache_flushD_rng,	/* dcache_inv_range	*/
 	xscale_cache_cleanD_rng,	/* dcache_wb_range	*/
 
+	xscale_cache_flushID,		/* idcache_inv_all	*/
 	xscale_cache_purgeID,		/* idcache_wbinv_all	*/
 	xscale_cache_purgeID_rng,	/* idcache_wbinv_range	*/
 	cpufunc_nullop,			/* l2cache_wbinv_all 	*/
@@ -826,6 +837,7 @@ struct cpu_functions xscalec3_cpufuncs =
 	xscale_cache_flushD_rng,	/* dcache_inv_range	*/
 	xscalec3_cache_cleanD_rng,	/* dcache_wb_range	*/
 
+	xscale_cache_flushID,		/* idcache_inv_all	*/
 	xscalec3_cache_purgeID,		/* idcache_wbinv_all	*/
 	xscalec3_cache_purgeID_rng,	/* idcache_wbinv_range	*/
 	xscalec3_l2cache_purge,		/* l2cache_wbinv_all	*/
@@ -888,6 +900,7 @@ struct cpu_functions fa526_cpufuncs = {
 	fa526_dcache_inv_range,		/* dcache_inv_range	*/
 	fa526_dcache_wb_range,		/* dcache_wb_range	*/
 
+	armv4_idcache_inv_all,		/* idcache_inv_all	*/
 	fa526_idcache_wbinv_all,	/* idcache_wbinv_all	*/
 	fa526_idcache_wbinv_range,	/* idcache_wbinv_range	*/
 	cpufunc_nullop,			/* l2cache_wbinv_all	*/
@@ -949,6 +962,7 @@ struct cpu_functions arm1136_cpufuncs = 
 	armv6_dcache_inv_range,         /* dcache_inv_range     */
 	armv6_dcache_wb_range,          /* dcache_wb_range      */
 	
+	armv6_idcache_inv_all,		/* idcache_inv_all	*/
 	arm11x6_idcache_wbinv_all,      /* idcache_wbinv_all    */
 	arm11x6_idcache_wbinv_range,    /* idcache_wbinv_range  */
 	
@@ -1010,6 +1024,7 @@ struct cpu_functions arm1176_cpufuncs = 
 	armv6_dcache_inv_range,         /* dcache_inv_range     */
 	armv6_dcache_wb_range,          /* dcache_wb_range      */
 	
+	armv6_idcache_inv_all,		/* idcache_inv_all	*/
 	arm11x6_idcache_wbinv_all,      /* idcache_wbinv_all    */
 	arm11x6_idcache_wbinv_range,    /* idcache_wbinv_range  */
 	
@@ -1072,6 +1087,7 @@ struct cpu_functions cortexa_cpufuncs = 
 	armv7_dcache_inv_range,         /* dcache_inv_range     */
 	armv7_dcache_wb_range,          /* dcache_wb_range      */
 	
+	armv7_idcache_inv_all,		/* idcache_inv_all	*/
 	armv7_idcache_wbinv_all,        /* idcache_wbinv_all    */
 	armv7_idcache_wbinv_range,      /* idcache_wbinv_range  */
 	

Modified: projects/clang-sparc64/sys/arm/arm/cpufunc_asm_armv4.S
==============================================================================
--- projects/clang-sparc64/sys/arm/arm/cpufunc_asm_armv4.S	Tue Feb 25 07:33:28 2014	(r262472)
+++ projects/clang-sparc64/sys/arm/arm/cpufunc_asm_armv4.S	Tue Feb 25 07:40:37 2014	(r262473)
@@ -71,3 +71,9 @@ ENTRY(armv4_drain_writebuf)
 	RET
 END(armv4_drain_writebuf)
 
+ENTRY(armv4_idcache_inv_all)
+	mov	r0, #0
+	mcr	p15, 0, r0, c7, c7, 0	/* invalidate all I+D cache */
+	RET
+END(armv4_drain_writebuf)
+

Modified: projects/clang-sparc64/sys/arm/arm/cpufunc_asm_armv6.S
==============================================================================
--- projects/clang-sparc64/sys/arm/arm/cpufunc_asm_armv6.S	Tue Feb 25 07:33:28 2014	(r262472)
+++ projects/clang-sparc64/sys/arm/arm/cpufunc_asm_armv6.S	Tue Feb 25 07:40:37 2014	(r262473)
@@ -148,3 +148,9 @@ ENTRY(armv6_dcache_wbinv_all)
 END(armv6_idcache_wbinv_all)
 END(armv6_dcache_wbinv_all)
 
+ENTRY(armv6_idcache_inv_all)
+	mov	r0, #0
+	mcr	p15, 0, r0, c7, c7, 0	/* invalidate all I+D cache */
+	RET
+END(armv6_idcache_inv_all)
+

Modified: projects/clang-sparc64/sys/arm/arm/cpufunc_asm_armv7.S
==============================================================================
--- projects/clang-sparc64/sys/arm/arm/cpufunc_asm_armv7.S	Tue Feb 25 07:33:28 2014	(r262472)
+++ projects/clang-sparc64/sys/arm/arm/cpufunc_asm_armv7.S	Tue Feb 25 07:40:37 2014	(r262473)
@@ -1,4 +1,5 @@
 /*-
+ * Copyright (c) 2010 Per Odlund <per.odlund at armagedon.se>
  * Copyright (C) 2011 MARVELL INTERNATIONAL LTD.
  * All rights reserved.
  *
@@ -305,3 +306,40 @@ ENTRY(armv7_auxctrl)
 	RET
 END(armv7_auxctrl)
 
+ENTRY(armv7_idcache_inv_all)
+	mov     r0, #0
+	mcr     p15, 2, r0, c0, c0, 0   @ set cache level to L1
+	mrc     p15, 1, r0, c0, c0, 0   @ read CCSIDR
+
+	ubfx    r2, r0, #13, #15        @ get num sets - 1 from CCSIDR
+	ubfx    r3, r0, #3, #10         @ get numways - 1 from CCSIDR
+	clz     r1, r3                  @ number of bits to MSB of way
+	lsl     r3, r3, r1              @ shift into position
+	mov     ip, #1                  @
+	lsl     ip, ip, r1              @ ip now contains the way decr
+
+	ubfx    r0, r0, #0, #3          @ get linesize from CCSIDR
+	add     r0, r0, #4              @ apply bias
+	lsl     r2, r2, r0              @ shift sets by log2(linesize)
+	add     r3, r3, r2              @ merge numsets - 1 with numways - 1
+	sub     ip, ip, r2              @ subtract numsets - 1 from way decr
+	mov     r1, #1
+	lsl     r1, r1, r0              @ r1 now contains the set decr
+	mov     r2, ip                  @ r2 now contains set way decr
+
+	/* r3 = ways/sets, r2 = way decr, r1 = set decr, r0 and ip are free */
+1:      mcr     p15, 0, r3, c7, c6, 2   @ invalidate line
+	movs    r0, r3                  @ get current way/set
+	beq     2f                      @ at 0 means we are done.
+	movs    r0, r0, lsl #10         @ clear way bits leaving only set bits
+	subne   r3, r3, r1              @ non-zero?, decrement set #
+	subeq   r3, r3, r2              @ zero?, decrement way # and restore set count
+	b       1b
+
+2:	dsb                             @ wait for stores to finish
+	mov     r0, #0                  @ and ...
+	mcr     p15, 0, r0, c7, c5, 0   @ invalidate instruction+branch cache
+	isb                             @ instruction sync barrier
+	bx      lr                      @ return
+END(armv7_l1cache_inv_all)
+

Modified: projects/clang-sparc64/sys/arm/arm/mp_machdep.c
==============================================================================
--- projects/clang-sparc64/sys/arm/arm/mp_machdep.c	Tue Feb 25 07:33:28 2014	(r262472)
+++ projects/clang-sparc64/sys/arm/arm/mp_machdep.c	Tue Feb 25 07:40:37 2014	(r262473)
@@ -128,10 +128,10 @@ cpu_mp_start(void)
 	bzero((void *)temp_pagetable_va,  L1_TABLE_SIZE);
 	for (addr = arm_physmem_kernaddr; addr <= addr_end; addr += L1_S_SIZE) { 
 		((int *)(temp_pagetable_va))[addr >> L1_S_SHIFT] =
-		    L1_TYPE_S|L1_SHARED|L1_S_C|L1_S_AP(AP_KRW)|L1_S_DOM(PMAP_DOMAIN_KERNEL)|addr;
+		    L1_TYPE_S|L1_SHARED|L1_S_C|L1_S_B|L1_S_AP(AP_KRW)|L1_S_DOM(PMAP_DOMAIN_KERNEL)|addr;
 		((int *)(temp_pagetable_va))[(addr -
 			arm_physmem_kernaddr + KERNVIRTADDR) >> L1_S_SHIFT] = 
-		    L1_TYPE_S|L1_SHARED|L1_S_C|L1_S_AP(AP_KRW)|L1_S_DOM(PMAP_DOMAIN_KERNEL)|addr;
+		    L1_TYPE_S|L1_SHARED|L1_S_C|L1_S_B|L1_S_AP(AP_KRW)|L1_S_DOM(PMAP_DOMAIN_KERNEL)|addr;
 	}
 
 #if defined(CPU_MV_PJ4B)
@@ -173,6 +173,8 @@ init_secondary(int cpu)
 	uint32_t loop_counter;
 	int start = 0, end = 0;
 
+	cpu_idcache_inv_all();
+
 	cpu_setup(NULL);
 	setttb(pmap_pa);
 	cpu_tlb_flushID();

Modified: projects/clang-sparc64/sys/arm/conf/IMX6
==============================================================================
--- projects/clang-sparc64/sys/arm/conf/IMX6	Tue Feb 25 07:33:28 2014	(r262472)
+++ projects/clang-sparc64/sys/arm/conf/IMX6	Tue Feb 25 07:40:37 2014	(r262473)
@@ -17,6 +17,7 @@
 #
 # $FreeBSD$
 
+ident		IMX6
 include 	"../freescale/imx/std.imx6"
 
 options  	HZ=250			# Scheduling quantum is 4 milliseconds.

Copied: projects/clang-sparc64/sys/arm/conf/QUARTZ (from r262472, head/sys/arm/conf/QUARTZ)
==============================================================================
--- /dev/null	00:00:00 1970	(empty, because file is newly added)
+++ projects/clang-sparc64/sys/arm/conf/QUARTZ	Tue Feb 25 07:40:37 2014	(r262473, copy of r262472, head/sys/arm/conf/QUARTZ)
@@ -0,0 +1,26 @@
+# Kernel configuration for Device Solutions Quartz Module.
+#
+# For more information on this file, please read the config(5) manual page,
+# and/or the handbook section on Kernel Configuration Files:
+#
+#    http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html
+#
+# The handbook is also available locally in /usr/share/doc/handbook
+# if you've installed the doc distribution, otherwise always see the
+# FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the
+# latest information.
+#
+# An exhaustive list of options and more detailed explanations of the
+# device lines is also present in the ../../conf/NOTES and NOTES files.
+# If you are in doubt as to the purpose or necessity of a line, check first
+# in NOTES.
+#
+# $FreeBSD$
+
+include		"VYBRID.common"
+ident		QUARTZ
+
+#FDT
+options		FDT
+options		FDT_DTB_STATIC
+makeoptions	FDT_DTS_FILE=vybrid-quartz.dts

Modified: projects/clang-sparc64/sys/arm/freescale/imx/files.imx6
==============================================================================
--- projects/clang-sparc64/sys/arm/freescale/imx/files.imx6	Tue Feb 25 07:33:28 2014	(r262472)
+++ projects/clang-sparc64/sys/arm/freescale/imx/files.imx6	Tue Feb 25 07:40:37 2014	(r262473)
@@ -22,6 +22,7 @@ arm/freescale/imx/common.c		standard
 arm/freescale/imx/imx6_anatop.c		standard
 arm/freescale/imx/imx6_ccm.c		standard
 arm/freescale/imx/imx6_machdep.c	standard
+arm/freescale/imx/imx6_mp.c		optional smp
 arm/freescale/imx/imx6_pl310.c		standard
 arm/freescale/imx/imx_machdep.c		standard
 arm/freescale/imx/imx_gpt.c		standard

Copied: projects/clang-sparc64/sys/arm/freescale/imx/imx6_mp.c (from r262472, head/sys/arm/freescale/imx/imx6_mp.c)
==============================================================================
--- /dev/null	00:00:00 1970	(empty, because file is newly added)
+++ projects/clang-sparc64/sys/arm/freescale/imx/imx6_mp.c	Tue Feb 25 07:40:37 2014	(r262473, copy of r262472, head/sys/arm/freescale/imx/imx6_mp.c)
@@ -0,0 +1,166 @@
+/*-
+ * Copyright (c) 2014 Juergen Weiss <weiss at uni-mainz.de>
+ * Copyright (c) 2014 Ian Lepore <ian at freebsd.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/bus.h>
+#include <sys/lock.h>
+#include <sys/mutex.h>
+#include <sys/smp.h>
+
+#include <machine/smp.h>
+#include <machine/fdt.h>
+#include <machine/intr.h>
+
+#define	SCU_PHYSBASE			0x00a00000
+#define	SCU_SIZE			0x00001000
+
+#define	SCU_CONTROL_REG			0x00
+#define	  SCU_CONTROL_ENABLE		  (1 << 0)
+#define	SCU_CONFIG_REG			0x04
+#define	  SCU_CONFIG_REG_NCPU_MASK	  0x03
+#define	SCU_CPUPOWER_REG		0x08
+#define	SCU_INV_TAGS_REG		0x0c
+#define	SCU_DIAG_CONTROL		0x30
+#define	  SCU_DIAG_DISABLE_MIGBIT	  (1 << 0)
+#define	SCU_FILTER_START_REG		0x40
+#define	SCU_FILTER_END_REG		0x44
+#define	SCU_SECURE_ACCESS_REG		0x50
+#define	SCU_NONSECURE_ACCESS_REG	0x54
+
+#define	SRC_PHYSBASE			0x020d8000
+#define SRC_SIZE			0x4000
+#define	SRC_CONTROL_REG			0x00
+#define	SRC_CONTROL_C1ENA_SHIFT		  22	/* Bit for Core 1 enable */
+#define	SRC_CONTROL_C1RST_SHIFT		  14	/* Bit for Core 1 reset */
+#define	SRC_GPR0_C1FUNC			0x20	/* Register for Core 1 entry func */
+#define	SRC_GPR1_C1ARG			0x24	/* Register for Core 1 entry arg */
+
+void
+platform_mp_init_secondary(void)
+{
+
+	gic_init_secondary();
+}
+
+void
+platform_mp_setmaxid(void)
+{
+	bus_space_handle_t scu;
+	uint32_t val;
+
+	/* If we've already set the global vars don't bother to do it again. */
+	if (mp_ncpus != 0)
+		return;
+
+	if (bus_space_map(fdtbus_bs_tag, SCU_PHYSBASE, SCU_SIZE, 0, &scu) != 0)
+		panic("Couldn't map the SCU\n");
+	val = bus_space_read_4(fdtbus_bs_tag, scu, SCU_CONFIG_REG);
+	bus_space_unmap(fdtbus_bs_tag, scu, SCU_SIZE);
+
+	mp_maxid = (val & SCU_CONFIG_REG_NCPU_MASK);
+	mp_ncpus = mp_maxid + 1;
+}
+
+int
+platform_mp_probe(void)
+{
+
+	/* I think platform_mp_setmaxid must get called first, but be safe. */
+	if (mp_ncpus == 0)
+		platform_mp_setmaxid();
+
+	return (mp_ncpus > 1);
+}
+
+void    
+platform_mp_start_ap(void)
+{
+	bus_space_handle_t scu;
+	bus_space_handle_t src;
+
+	uint32_t val;
+	int i;
+
+	if (bus_space_map(fdtbus_bs_tag, SCU_PHYSBASE, SCU_SIZE, 0, &scu) != 0)
+		panic("Couldn't map the SCU\n");
+	if (bus_space_map(fdtbus_bs_tag, SRC_PHYSBASE, SRC_SIZE, 0, &src) != 0)
+		panic("Couldn't map the system reset controller (SRC)\n");
+
+	/*
+	 * Invalidate SCU cache tags.  The 0x0000fff0 constant invalidates all
+	 * ways on all cores 1-3 (leaving core 0 alone).  Per the ARM docs, it's
+	 * harmless to write to the bits for cores that are not present.
+	 */
+	bus_space_write_4(fdtbus_bs_tag, scu, SCU_INV_TAGS_REG, 0x0000fff0);
+
+	/*
+	 * Erratum ARM/MP: 764369 (problems with cache maintenance).
+	 * Setting the "disable-migratory bit" in the undocumented SCU
+	 * Diagnostic Control Register helps work around the problem.
+	 */
+	val = bus_space_read_4(fdtbus_bs_tag, scu, SCU_DIAG_CONTROL);
+	bus_space_write_4(fdtbus_bs_tag, scu, SCU_DIAG_CONTROL, 
+	    val | SCU_DIAG_DISABLE_MIGBIT);
+
+	/* Enable the SCU. */
+	val = bus_space_read_4(fdtbus_bs_tag, scu, SCU_CONTROL_REG);
+	bus_space_write_4(fdtbus_bs_tag, scu, SCU_CONTROL_REG, 
+	    val | SCU_CONTROL_ENABLE);
+
+	cpu_idcache_wbinv_all();
+	cpu_l2cache_wbinv_all();
+
+	/*
+	 * For each AP core, set the entry point address and argument registers,
+	 * and set the core-enable and core-reset bits in the control register.
+	 */
+	val = bus_space_read_4(fdtbus_bs_tag, src, SRC_CONTROL_REG);
+	for (i=1; i < mp_ncpus; i++) {
+		bus_space_write_4(fdtbus_bs_tag, src, SRC_GPR0_C1FUNC + 8*i,
+		    pmap_kextract((vm_offset_t)mpentry));
+		bus_space_write_4(fdtbus_bs_tag, src, SRC_GPR1_C1ARG  + 8*i, 0);
+
+		val |= ((1 << (SRC_CONTROL_C1ENA_SHIFT - 1 + i )) |
+		    ( 1 << (SRC_CONTROL_C1RST_SHIFT - 1 + i)));
+
+	}
+	bus_space_write_4(fdtbus_bs_tag, src, 0, val);
+
+	armv7_sev();
+
+	bus_space_unmap(fdtbus_bs_tag, scu, SCU_SIZE);
+	bus_space_unmap(fdtbus_bs_tag, src, SRC_SIZE);
+}
+
+void
+platform_ipi_send(cpuset_t cpus, u_int ipi)
+{
+
+	pic_ipi_send(cpus, ipi);
+}

Modified: projects/clang-sparc64/sys/arm/freescale/imx/std.imx6
==============================================================================
--- projects/clang-sparc64/sys/arm/freescale/imx/std.imx6	Tue Feb 25 07:33:28 2014	(r262472)
+++ projects/clang-sparc64/sys/arm/freescale/imx/std.imx6	Tue Feb 25 07:40:37 2014	(r262473)
@@ -10,5 +10,8 @@ options		KERNPHYSADDR		= 0x12000000
 makeoptions	KERNPHYSADDR		= 0x12000000
 options		PHYSADDR		= 0x10000000
 
+options		IPI_IRQ_START=0
+options		IPI_IRQ_END=15
+
 files "../freescale/imx/files.imx6"
 

Modified: projects/clang-sparc64/sys/arm/include/cpufunc.h
==============================================================================
--- projects/clang-sparc64/sys/arm/include/cpufunc.h	Tue Feb 25 07:33:28 2014	(r262472)
+++ projects/clang-sparc64/sys/arm/include/cpufunc.h	Tue Feb 25 07:40:37 2014	(r262473)
@@ -104,6 +104,12 @@ struct cpu_functions {
 	 *
 	 * There are some rules that must be followed:
 	 *
+	 *	ID-cache Invalidate All:
+	 *		Unlike other functions, this one must never write back.
+	 *		It is used to intialize the MMU when it is in an unknown
+	 *		state (such as when it may have lines tagged as valid
+	 *		that belong to a previous set of mappings).
+	 *                                          
 	 *	I-cache Synch (all or range):
 	 *		The goal is to synchronize the instruction stream,
 	 *		so you may beed to write-back dirty D-cache blocks
@@ -138,6 +144,7 @@ struct cpu_functions {
 	void	(*cf_dcache_inv_range)	(vm_offset_t, vm_size_t);
 	void	(*cf_dcache_wb_range)	(vm_offset_t, vm_size_t);
 
+	void	(*cf_idcache_inv_all)	(void);
 	void	(*cf_idcache_wbinv_all)	(void);
 	void	(*cf_idcache_wbinv_range) (vm_offset_t, vm_size_t);
 	void	(*cf_l2cache_wbinv_all) (void);
@@ -238,6 +245,7 @@ void tlb_broadcast(int);
 #define	cpu_dcache_inv_range(a, s) cpufuncs.cf_dcache_inv_range((a), (s))
 #define	cpu_dcache_wb_range(a, s) cpufuncs.cf_dcache_wb_range((a), (s))
 
+#define	cpu_idcache_inv_all()	cpufuncs.cf_idcache_inv_all()
 #define	cpu_idcache_wbinv_all()	cpufuncs.cf_idcache_wbinv_all()
 #define	cpu_idcache_wbinv_range(a, s) cpufuncs.cf_idcache_wbinv_range((a), (s))
 #define cpu_l2cache_wbinv_all()	cpufuncs.cf_l2cache_wbinv_all()
@@ -495,6 +503,7 @@ void	armv6_dcache_wbinv_range	(vm_offset
 void	armv6_dcache_inv_range		(vm_offset_t, vm_size_t);
 void	armv6_dcache_wb_range		(vm_offset_t, vm_size_t);
 
+void	armv6_idcache_inv_all		(void);
 void	armv6_idcache_wbinv_all		(void);
 void	armv6_idcache_wbinv_range	(vm_offset_t, vm_size_t);
 
@@ -503,6 +512,7 @@ void	armv7_tlb_flushID		(void);
 void	armv7_tlb_flushID_SE		(u_int);
 void	armv7_icache_sync_range		(vm_offset_t, vm_size_t);
 void	armv7_idcache_wbinv_range	(vm_offset_t, vm_size_t);
+void	armv7_idcache_inv_all		(void);
 void	armv7_dcache_wbinv_all		(void);
 void	armv7_idcache_wbinv_all		(void);
 void	armv7_dcache_wbinv_range	(vm_offset_t, vm_size_t);
@@ -587,6 +597,7 @@ void	armv4_tlb_flushD	(void);
 void	armv4_tlb_flushD_SE	(u_int va);
 
 void	armv4_drain_writebuf	(void);
+void	armv4_idcache_inv_all	(void);
 #endif
 
 #if defined(CPU_IXP12X0)

Modified: projects/clang-sparc64/sys/boot/common/Makefile.inc
==============================================================================
--- projects/clang-sparc64/sys/boot/common/Makefile.inc	Tue Feb 25 07:33:28 2014	(r262472)
+++ projects/clang-sparc64/sys/boot/common/Makefile.inc	Tue Feb 25 07:40:37 2014	(r262473)
@@ -18,7 +18,7 @@ SRCS+=	load_elf32.c reloc_elf32.c
 SRCS+=	load_elf64.c reloc_elf64.c
 .elif ${MACHINE_CPUARCH} == "sparc64"
 SRCS+=	load_elf64.c reloc_elf64.c
-.elif ${MACHINE_ARCH} == "mips64"
+.elif ${MACHINE_ARCH} == "mips64" || ${MACHINE_ARCH} == "mips64el"
 SRCS+= load_elf64.c reloc_elf64.c
 .endif
 

Modified: projects/clang-sparc64/sys/boot/fdt/dts/am335x.dtsi
==============================================================================
--- projects/clang-sparc64/sys/boot/fdt/dts/am335x.dtsi	Tue Feb 25 07:33:28 2014	(r262472)
+++ projects/clang-sparc64/sys/boot/fdt/dts/am335x.dtsi	Tue Feb 25 07:40:37 2014	(r262473)
@@ -210,6 +210,26 @@
 			i2c-device-id = <0>;
 		};
 
+		i2c1: i2c at 4802a000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "ti,i2c";
+			reg =<  0x4802a000 0x1000 >;
+			interrupts = <71>;
+			interrupt-parent = <&AINTC>;
+			i2c-device-id = <1>;
+		};
+
+		i2c2: i2c at 4819c000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "ti,i2c";
+			reg =<  0x4819c000 0x1000 >;
+			interrupts = <30>;
+			interrupt-parent = <&AINTC>;
+			i2c-device-id = <2>;
+		};
+
 		pwm at 48300000 {
 			compatible = "ti,am335x-pwm";
 			#address-cells = <1>;

Modified: projects/clang-sparc64/sys/boot/fdt/dts/beaglebone-black.dts
==============================================================================
--- projects/clang-sparc64/sys/boot/fdt/dts/beaglebone-black.dts	Tue Feb 25 07:33:28 2014	(r262472)
+++ projects/clang-sparc64/sys/boot/fdt/dts/beaglebone-black.dts	Tue Feb 25 07:40:37 2014	(r262473)
@@ -52,6 +52,12 @@
 				/* I2C0 */
 				"I2C0_SDA", "I2C0_SDA","i2c",
 				"I2C0_SCL", "I2C0_SCL","i2c",
+				/* I2C1 */
+				"SPI0_D1", "I2C1_SDA", "i2c",
+				"SPI0_CS0", "I2C1_SCL", "i2c",
+				/* I2C2 */
+				"UART1_CTSn", "I2C2_SDA", "i2c",
+				"UART1_RTSn", "I2C2_SCL", "i2c",
 				/* Ethernet */
 				"MII1_RX_ER", "gmii1_rxerr", "input_pulldown",
 				"MII1_TX_EN", "gmii1_txen", "output",

Copied: projects/clang-sparc64/sys/boot/fdt/dts/vybrid-quartz.dts (from r262472, head/sys/boot/fdt/dts/vybrid-quartz.dts)
==============================================================================
--- /dev/null	00:00:00 1970	(empty, because file is newly added)
+++ projects/clang-sparc64/sys/boot/fdt/dts/vybrid-quartz.dts	Tue Feb 25 07:40:37 2014	(r262473, copy of r262472, head/sys/boot/fdt/dts/vybrid-quartz.dts)
@@ -0,0 +1,65 @@
+/*-
+ * Copyright (c) 2014 Ruslan Bukin <br at bsdpad.com>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+/dts-v1/;
+
+/include/ "vybrid.dtsi"
+
+/ {
+	model = "Device Solutions Quartz Module";
+
+	memory {
+		device_type = "memory";
+		reg = < 0x80000000 0x10000000 >;	/* 256MB RAM */
+	};
+
+	SOC: vybrid {
+		serial0: serial at 40027000 {
+			status = "okay";
+		};
+
+		fec1: ethernet at 400D1000 {
+			status = "okay";
+			iomux_config = < 54 0x1 55 0x1
+					 56 0x1 57 0x1
+					 58 0x1 59 0x1
+					 60 0x1 61 0x1
+					 62 0x1  0 0x2 >;
+		};
+
+		edma1: edma at 40098000 {
+			status = "okay";
+		};
+	};
+
+	chosen {
+		bootargs = "-v";
+		stdin = "serial0";
+		stdout = "serial0";
+	};
+};

Modified: projects/clang-sparc64/sys/boot/ficl/Makefile
==============================================================================
--- projects/clang-sparc64/sys/boot/ficl/Makefile	Tue Feb 25 07:33:28 2014	(r262472)
+++ projects/clang-sparc64/sys/boot/ficl/Makefile	Tue Feb 25 07:40:37 2014	(r262473)
@@ -5,7 +5,7 @@ FICLDIR?=	${.CURDIR}
 
 .if !defined(FICL64)
 .PATH: ${FICLDIR}/${MACHINE_CPUARCH:S/amd64/i386/}
-.elif ${MACHINE_ARCH} == "mips64"
+.elif ${MACHINE_ARCH} == "mips64" || ${MACHINE_ARCH} == "mips64el"
 .PATH: ${FICLDIR}/${MACHINE_ARCH}
 .else
 .PATH: ${FICLDIR}/${MACHINE_CPUARCH}

Modified: projects/clang-sparc64/sys/cddl/dev/systrace/systrace.c
==============================================================================
--- projects/clang-sparc64/sys/cddl/dev/systrace/systrace.c	Tue Feb 25 07:33:28 2014	(r262472)
+++ projects/clang-sparc64/sys/cddl/dev/systrace/systrace.c	Tue Feb 25 07:40:37 2014	(r262473)
@@ -168,6 +168,9 @@ static dtrace_pops_t systrace_pops = {
 static struct cdev		*systrace_cdev;
 static dtrace_provider_id_t	systrace_id;
 
+typedef void (*systrace_dtrace_probe)(dtrace_id_t, uintptr_t, uintptr_t,
+    uintptr_t, uintptr_t, uintptr_t, uintptr_t, uintptr_t, uintptr_t);
+
 #if !defined(LINUX_SYSTRACE)
 /*
  * Probe callback function.
@@ -211,7 +214,8 @@ systrace_probe(u_int32_t id, int sysnum,
 	}
 
 	/* Process the probe using the converted argments. */
-	dtrace_probe(id, uargs[0], uargs[1], uargs[2], uargs[3], uargs[4]);
+	((systrace_dtrace_probe)(dtrace_probe))(id, uargs[0], uargs[1],
+	    uargs[2], uargs[3], uargs[4], uargs[5], uargs[6], uargs[7]);
 }
 
 #endif

Modified: projects/clang-sparc64/sys/conf/files
==============================================================================
--- projects/clang-sparc64/sys/conf/files	Tue Feb 25 07:33:28 2014	(r262472)
+++ projects/clang-sparc64/sys/conf/files	Tue Feb 25 07:40:37 2014	(r262473)
@@ -1343,6 +1343,7 @@ dev/etherswitch/arswitch/arswitch_phy.c	
 dev/etherswitch/arswitch/arswitch_8216.c	optional arswitch

*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***

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