svn commit: r276025 - in projects/arm_intrng/sys: arm/arm dev/ahci

[Andrew Turner]

Author: andrew
Date: Sun Dec 21 17:09:01 2014
New Revision: 276025
URL: https://svnweb.freebsd.org/changeset/base/276025

Log:
  Merge to 276024

Modified:
  projects/arm_intrng/sys/arm/arm/gic.c
  projects/arm_intrng/sys/dev/ahci/ahci.c
  projects/arm_intrng/sys/dev/ahci/ahci.h
Directory Properties:
  projects/arm_intrng/   (props changed)
  projects/arm_intrng/sys/   (props changed)

Modified: projects/arm_intrng/sys/arm/arm/gic.c
==============================================================================
--- projects/arm_intrng/sys/arm/arm/gic.c	Sun Dec 21 17:00:33 2014	(r276024)
+++ projects/arm_intrng/sys/arm/arm/gic.c	Sun Dec 21 17:09:01 2014	(r276025)
@@ -306,7 +306,8 @@ arm_gic_attach(device_t dev)
 
 	for (i = 0; i < sc->nirqs; i += 4) {
 		gic_d_write_4(sc, GICD_IPRIORITYR(i >> 2), 0);
-		gic_d_write_4(sc, GICD_ITARGETSR(i >> 2), 1 << 0 | 1 << 8 | 1 << 16 | 1 << 24);
+		gic_d_write_4(sc, GICD_ITARGETSR(i >> 2),
+		    1 << 0 | 1 << 8 | 1 << 16 | 1 << 24);
 	}
 
 	/* Set all the interrupts to be in Group 0 (secure) */

Modified: projects/arm_intrng/sys/dev/ahci/ahci.c
==============================================================================
--- projects/arm_intrng/sys/dev/ahci/ahci.c	Sun Dec 21 17:00:33 2014	(r276024)
+++ projects/arm_intrng/sys/dev/ahci/ahci.c	Sun Dec 21 17:09:01 2014	(r276025)
@@ -142,7 +142,7 @@ ahci_ctlr_reset(device_t dev)
 	}
 	if (timeout == 0) {
 		device_printf(dev, "AHCI controller reset failure\n");
-		return ENXIO;
+		return (ENXIO);
 	}
 	/* Reenable AHCI mode */
 	ATA_OUTL(ctlr->r_mem, AHCI_GHC, AHCI_GHC_AE);
@@ -225,18 +225,18 @@ ahci_attach(device_t dev)
 		bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid,
 		    ctlr->r_mem);
 		rman_fini(&ctlr->sc_iomem);
-		return ENXIO;
+		return (ENXIO);
 	}
 
 	ahci_ctlr_setup(dev);
 
 	/* Setup interrupts. */
-	if (ahci_setup_interrupt(dev)) {
+	if ((error = ahci_setup_interrupt(dev)) != 0) {
 		bus_dma_tag_destroy(ctlr->dma_tag);
 		bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid,
 		    ctlr->r_mem);
 		rman_fini(&ctlr->sc_iomem);
-		return ENXIO;
+		return (error);
 	}
 
 	i = 0;
@@ -315,7 +315,7 @@ ahci_attach(device_t dev)
 			device_set_ivars(child, (void *)(intptr_t)-1);
 	}
 	bus_generic_attach(dev);
-	return 0;
+	return (0);
 }
 
 int
@@ -356,6 +356,14 @@ ahci_setup_interrupt(device_t dev)
 		device_printf(dev, "Falling back to one MSI\n");
 		ctlr->numirqs = 1;
 	}
+
+	/* Ensure we don't overrun irqs. */
+	if (ctlr->numirqs > AHCI_MAX_IRQS) {
+		device_printf(dev, "Too many irqs %d > %d (clamping)\n",
+		    ctlr->numirqs, AHCI_MAX_IRQS);
+		ctlr->numirqs = AHCI_MAX_IRQS;
+	}
+
 	/* Allocate all IRQs. */
 	for (i = 0; i < ctlr->numirqs; i++) {
 		ctlr->irqs[i].ctlr = ctlr;
@@ -372,7 +380,7 @@ ahci_setup_interrupt(device_t dev)
 		if (!(ctlr->irqs[i].r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ,
 		    &ctlr->irqs[i].r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) {
 			device_printf(dev, "unable to map interrupt\n");
-			return ENXIO;
+			return (ENXIO);
 		}
 		if ((bus_setup_intr(dev, ctlr->irqs[i].r_irq, ATA_INTR_FLAGS, NULL,
 		    (ctlr->irqs[i].mode != AHCI_IRQ_MODE_ONE) ? ahci_intr :
@@ -381,7 +389,7 @@ ahci_setup_interrupt(device_t dev)
 		    &ctlr->irqs[i], &ctlr->irqs[i].handle))) {
 			/* SOS XXX release r_irq */
 			device_printf(dev, "unable to setup interrupt\n");
-			return ENXIO;
+			return (ENXIO);
 		}
 		if (ctlr->numirqs > 1) {
 			bus_describe_intr(dev, ctlr->irqs[i].r_irq,
@@ -529,7 +537,7 @@ ahci_release_resource(device_t dev, devi
 		return (0);
 	case SYS_RES_IRQ:
 		if (rid != ATA_IRQ_RID)
-			return ENOENT;
+			return (ENOENT);
 		return (0);
 	}
 	return (EINVAL);

Modified: projects/arm_intrng/sys/dev/ahci/ahci.h
==============================================================================
--- projects/arm_intrng/sys/dev/ahci/ahci.h	Sun Dec 21 17:00:33 2014	(r276024)
+++ projects/arm_intrng/sys/dev/ahci/ahci.h	Sun Dec 21 17:09:01 2014	(r276025)
@@ -143,6 +143,7 @@
 
 #define AHCI_MAX_PORTS			32
 #define AHCI_MAX_SLOTS			32
+#define AHCI_MAX_IRQS			16
 
 /* SATA AHCI v1.0 register defines */
 #define AHCI_CAP                    0x00
@@ -494,7 +495,7 @@ struct ahci_controller {
 #define	AHCI_IRQ_MODE_ALL	0
 #define	AHCI_IRQ_MODE_AFTER	1
 #define	AHCI_IRQ_MODE_ONE	2
-	} irqs[16];
+	} irqs[AHCI_MAX_IRQS];
 	uint32_t		caps;		/* Controller capabilities */
 	uint32_t		caps2;		/* Controller capabilities */
 	uint32_t		capsem;		/* Controller capabilities */