svn commit: r248929 - in projects/camlock: sys/arm/at91 sys/arm/include sys/cam sys/cam/ata sys/cam/scsi sys/dev/cxgbe sys/dev/cxgbe/common sys/dev/cxgbe/tom sys/dev/e1000 sys/dev/ixgbe sys/dev/nvm...
Alexander Motin
mav at FreeBSD.org
Sat Mar 30 07:13:04 UTC 2013
Author: mav
Date: Sat Mar 30 07:13:01 2013
New Revision: 248929
URL: http://svnweb.freebsd.org/changeset/base/248929
Log:
MFC
Added:
projects/camlock/sys/arm/include/at91_gpio.h
- copied unchanged from r248928, head/sys/arm/include/at91_gpio.h
projects/camlock/sys/modules/cxgbe/t4_firmware/
- copied from r248928, head/sys/modules/cxgbe/t4_firmware/
projects/camlock/tools/tools/cxgbetool/reg_defs_t5.c
- copied unchanged from r248928, head/tools/tools/cxgbetool/reg_defs_t5.c
Deleted:
projects/camlock/sys/modules/cxgbe/firmware/
Modified:
projects/camlock/sys/arm/at91/at91_machdep.c
projects/camlock/sys/arm/at91/at91_mci.c
projects/camlock/sys/arm/at91/at91_pio.c
projects/camlock/sys/arm/at91/at91_piovar.h
projects/camlock/sys/arm/at91/at91_pmc.c
projects/camlock/sys/arm/at91/at91rm9200_devices.c
projects/camlock/sys/arm/include/machdep.h
projects/camlock/sys/cam/ata/ata_da.c
projects/camlock/sys/cam/cam.c
projects/camlock/sys/cam/cam.h
projects/camlock/sys/cam/scsi/scsi_da.c
projects/camlock/sys/dev/cxgbe/adapter.h
projects/camlock/sys/dev/cxgbe/common/common.h
projects/camlock/sys/dev/cxgbe/common/t4_hw.c
projects/camlock/sys/dev/cxgbe/common/t4_hw.h
projects/camlock/sys/dev/cxgbe/common/t4_msg.h
projects/camlock/sys/dev/cxgbe/common/t4_regs.h
projects/camlock/sys/dev/cxgbe/osdep.h
projects/camlock/sys/dev/cxgbe/t4_ioctl.h
projects/camlock/sys/dev/cxgbe/t4_main.c
projects/camlock/sys/dev/cxgbe/t4_sge.c
projects/camlock/sys/dev/cxgbe/tom/t4_connect.c
projects/camlock/sys/dev/cxgbe/tom/t4_cpl_io.c
projects/camlock/sys/dev/cxgbe/tom/t4_ddp.c
projects/camlock/sys/dev/cxgbe/tom/t4_listen.c
projects/camlock/sys/dev/cxgbe/tom/t4_tom.c
projects/camlock/sys/dev/cxgbe/tom/t4_tom.h
projects/camlock/sys/dev/e1000/if_igb.c
projects/camlock/sys/dev/e1000/if_igb.h
projects/camlock/sys/dev/ixgbe/ixgbe.c
projects/camlock/sys/dev/nvme/nvme_ctrlr.c
projects/camlock/sys/dev/nvme/nvme_ctrlr_cmd.c
projects/camlock/sys/dev/nvme/nvme_ns_cmd.c
projects/camlock/sys/dev/nvme/nvme_private.h
projects/camlock/sys/dev/nvme/nvme_qpair.c
projects/camlock/sys/kern/subr_bus_dma.c
projects/camlock/sys/kern/uipc_mbuf.c
projects/camlock/sys/kern/uipc_sockbuf.c
projects/camlock/sys/kern/uipc_socket.c
projects/camlock/sys/mips/atheros/uart_dev_ar933x.c
projects/camlock/sys/mips/conf/AR933X_BASE
projects/camlock/sys/modules/cxgbe/Makefile
projects/camlock/sys/modules/igb/Makefile
projects/camlock/sys/netgraph/ng_ksocket.c
projects/camlock/sys/netinet/tcp_input.c
projects/camlock/sys/sys/bus_dma.h
projects/camlock/tools/tools/cxgbetool/cxgbetool.c
Directory Properties:
projects/camlock/ (props changed)
projects/camlock/sys/ (props changed)
Modified: projects/camlock/sys/arm/at91/at91_machdep.c
==============================================================================
--- projects/camlock/sys/arm/at91/at91_machdep.c Sat Mar 30 07:07:52 2013 (r248928)
+++ projects/camlock/sys/arm/at91/at91_machdep.c Sat Mar 30 07:13:01 2013 (r248929)
@@ -574,8 +574,17 @@ initarm(struct arm_boot_params *abp)
at91_soc_id();
- /* Initialize all the clocks, so that the console can work */
- at91_pmc_init_clock();
+ /*
+ * Initialize all the clocks, so that the console can work. We can only
+ * do this if at91_soc_id() was able to fill in the support data. Even
+ * if we can't init the clocks, still try to do a console init so we can
+ * try to print the error message about missing soc support. There's a
+ * chance the printf will work if the bootloader set up the DBGU.
+ */
+ if (soc_info.soc_data != NULL) {
+ soc_info.soc_data->soc_clock_init();
+ at91_pmc_init_clock();
+ }
cninit();
Modified: projects/camlock/sys/arm/at91/at91_mci.c
==============================================================================
--- projects/camlock/sys/arm/at91/at91_mci.c Sat Mar 30 07:07:52 2013 (r248928)
+++ projects/camlock/sys/arm/at91/at91_mci.c Sat Mar 30 07:13:01 2013 (r248929)
@@ -1069,8 +1069,6 @@ at91_mci_stop_done(struct at91_mci_softc
}
} while (sr & MCI_SR_RXRDY);
at91_mci_reset(sc);
- if (count != 0)
- printf("Had to soak up %d words after read\n", count);
}
cmd->error = MMC_ERR_NONE;
Modified: projects/camlock/sys/arm/at91/at91_pio.c
==============================================================================
--- projects/camlock/sys/arm/at91/at91_pio.c Sat Mar 30 07:07:52 2013 (r248928)
+++ projects/camlock/sys/arm/at91/at91_pio.c Sat Mar 30 07:13:01 2013 (r248929)
@@ -1,5 +1,6 @@
/*-
* Copyright (c) 2006 M. Warner Losh. All rights reserved.
+ * Copyright (C) 2012 Ian Lepore. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -35,22 +36,31 @@ __FBSDID("$FreeBSD$");
#include <sys/mbuf.h>
#include <sys/malloc.h>
#include <sys/module.h>
-#include <sys/mutex.h>
+#include <sys/poll.h>
#include <sys/rman.h>
+#include <sys/selinfo.h>
+#include <sys/sx.h>
+#include <sys/uio.h>
+#include <machine/at91_gpio.h>
#include <machine/bus.h>
#include <arm/at91/at91reg.h>
#include <arm/at91/at91_pioreg.h>
#include <arm/at91/at91_piovar.h>
+#define MAX_CHANGE 64
+
struct at91_pio_softc
{
device_t dev; /* Myself */
void *intrhand; /* Interrupt handle */
struct resource *irq_res; /* IRQ resource */
struct resource *mem_res; /* Memory resource */
- struct mtx sc_mtx; /* basically a perimeter lock */
+ struct sx sc_mtx; /* basically a perimeter lock */
struct cdev *cdev;
+ struct selinfo selp;
+ int buflen;
+ uint8_t buf[MAX_CHANGE];
int flags;
#define OPENED 1
};
@@ -69,14 +79,13 @@ WR4(struct at91_pio_softc *sc, bus_size_
bus_write_4(sc->mem_res, off, val);
}
-#define AT91_PIO_LOCK(_sc) mtx_lock_spin(&(_sc)->sc_mtx)
-#define AT91_PIO_UNLOCK(_sc) mtx_unlock_spin(&(_sc)->sc_mtx)
+#define AT91_PIO_LOCK(_sc) sx_xlock(&(_sc)->sc_mtx)
+#define AT91_PIO_UNLOCK(_sc) sx_xunlock(&(_sc)->sc_mtx)
#define AT91_PIO_LOCK_INIT(_sc) \
- mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->dev), \
- "pio", MTX_SPIN)
-#define AT91_PIO_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx);
-#define AT91_PIO_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED);
-#define AT91_PIO_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED);
+ sx_init(&_sc->sc_mtx, device_get_nameunit(_sc->dev))
+#define AT91_PIO_LOCK_DESTROY(_sc) sx_destroy(&_sc->sc_mtx);
+#define AT91_PIO_ASSERT_LOCKED(_sc) sx_assert(&_sc->sc_mtx, SA_XLOCKED);
+#define AT91_PIO_ASSERT_UNLOCKED(_sc) sx_assert(&_sc->sc_mtx, SA_UNLOCKED);
#define CDEV2SOFTC(dev) ((dev)->si_drv1)
static devclass_t at91_pio_devclass;
@@ -86,7 +95,7 @@ static devclass_t at91_pio_devclass;
static int at91_pio_probe(device_t dev);
static int at91_pio_attach(device_t dev);
static int at91_pio_detach(device_t dev);
-static int at91_pio_intr(void *);
+static void at91_pio_intr(void *);
/* helper routines */
static int at91_pio_activate(device_t dev);
@@ -95,6 +104,8 @@ static void at91_pio_deactivate(device_t
/* cdev routines */
static d_open_t at91_pio_open;
static d_close_t at91_pio_close;
+static d_read_t at91_pio_read;
+static d_poll_t at91_pio_poll;
static d_ioctl_t at91_pio_ioctl;
static struct cdevsw at91_pio_cdevsw =
@@ -102,6 +113,8 @@ static struct cdevsw at91_pio_cdevsw =
.d_version = D_VERSION,
.d_open = at91_pio_open,
.d_close = at91_pio_close,
+ .d_read = at91_pio_read,
+ .d_poll = at91_pio_poll,
.d_ioctl = at91_pio_ioctl
};
@@ -154,7 +167,7 @@ at91_pio_attach(device_t dev)
*/
WR4(sc, PIO_IDR, 0xffffffff);
err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC,
- at91_pio_intr, NULL, sc, &sc->intrhand);
+ NULL, at91_pio_intr, sc, &sc->intrhand);
if (err) {
AT91_PIO_LOCK_DESTROY(sc);
goto out;
@@ -213,7 +226,7 @@ at91_pio_deactivate(device_t dev)
sc->intrhand = 0;
bus_generic_detach(sc->dev);
if (sc->mem_res)
- bus_release_resource(dev, SYS_RES_IOPORT,
+ bus_release_resource(dev, SYS_RES_MEMORY,
rman_get_rid(sc->mem_res), sc->mem_res);
sc->mem_res = 0;
if (sc->irq_res)
@@ -222,22 +235,26 @@ at91_pio_deactivate(device_t dev)
sc->irq_res = 0;
}
-static int
+static void
at91_pio_intr(void *xsc)
{
struct at91_pio_softc *sc = xsc;
-#if 0
uint32_t status;
+ int i;
/* Reading the status also clears the interrupt. */
- status = RD4(sc, PIO_SR);
- if (status == 0)
- return;
- AT91_PIO_LOCK(sc);
- AT91_PIO_UNLOCK(sc);
-#endif
- wakeup(sc);
- return (FILTER_HANDLED);
+ status = RD4(sc, PIO_ISR) & RD4(sc, PIO_IMR);
+ if (status != 0) {
+ AT91_PIO_LOCK(sc);
+ for (i = 0; status != 0 && sc->buflen < MAX_CHANGE; ++i) {
+ if (status & 1)
+ sc->buf[sc->buflen++] = (uint8_t)i;
+ status >>= 1;
+ }
+ AT91_PIO_UNLOCK(sc);
+ wakeup(sc);
+ selwakeup(&sc->selp);
+ }
}
static int
@@ -249,9 +266,6 @@ at91_pio_open(struct cdev *dev, int ofla
AT91_PIO_LOCK(sc);
if (!(sc->flags & OPENED)) {
sc->flags |= OPENED;
-#if 0
- /* Enable interrupts. */
-#endif
}
AT91_PIO_UNLOCK(sc);
return (0);
@@ -265,19 +279,192 @@ at91_pio_close(struct cdev *dev, int ffl
sc = CDEV2SOFTC(dev);
AT91_PIO_LOCK(sc);
sc->flags &= ~OPENED;
-#if 0
- /* Disable interrupts. */
-#endif
AT91_PIO_UNLOCK(sc);
return (0);
}
static int
+at91_pio_poll(struct cdev *dev, int events, struct thread *td)
+{
+ struct at91_pio_softc *sc;
+ int revents = 0;
+
+ sc = CDEV2SOFTC(dev);
+ AT91_PIO_LOCK(sc);
+ if (events & (POLLIN | POLLRDNORM)) {
+ if (sc->buflen != 0)
+ revents |= events & (POLLIN | POLLRDNORM);
+ else
+ selrecord(td, &sc->selp);
+ }
+ AT91_PIO_UNLOCK(sc);
+
+ return (revents);
+}
+
+static int
+at91_pio_read(struct cdev *dev, struct uio *uio, int flag)
+{
+ struct at91_pio_softc *sc;
+ int err, ret, len;
+
+ sc = CDEV2SOFTC(dev);
+ AT91_PIO_LOCK(sc);
+ err = 0;
+ ret = 0;
+ while (uio->uio_resid) {
+ while (sc->buflen == 0 && err == 0)
+ err = msleep(sc, &sc->sc_mtx, PCATCH | PZERO, "prd", 0);
+ if (err != 0)
+ break;
+ len = MIN(sc->buflen, uio->uio_resid);
+ err = uiomove(sc->buf, len, uio);
+ if (err != 0)
+ break;
+ /*
+ * If we read the whole thing no datacopy is needed,
+ * otherwise we move the data down.
+ */
+ ret += len;
+ if (sc->buflen == len)
+ sc->buflen = 0;
+ else {
+ bcopy(sc->buf + len, sc->buf, sc->buflen - len);
+ sc->buflen -= len;
+ }
+ /* If there's no data left, end the read. */
+ if (sc->buflen == 0)
+ break;
+ }
+ AT91_PIO_UNLOCK(sc);
+ return (err);
+}
+
+static void
+at91_pio_bang32(struct at91_pio_softc *sc, uint32_t bits, uint32_t datapin,
+ uint32_t clockpin)
+{
+ int i;
+
+ for (i = 0; i < 32; i++) {
+ if (bits & 0x80000000)
+ WR4(sc, PIO_SODR, datapin);
+ else
+ WR4(sc, PIO_CODR, datapin);
+ bits <<= 1;
+ WR4(sc, PIO_CODR, clockpin);
+ WR4(sc, PIO_SODR, clockpin);
+ }
+}
+
+static void
+at91_pio_bang(struct at91_pio_softc *sc, uint8_t bits, uint32_t bitcount,
+ uint32_t datapin, uint32_t clockpin)
+{
+ int i;
+
+ for (i = 0; i < bitcount; i++) {
+ if (bits & 0x80)
+ WR4(sc, PIO_SODR, datapin);
+ else
+ WR4(sc, PIO_CODR, datapin);
+ bits <<= 1;
+ WR4(sc, PIO_CODR, clockpin);
+ WR4(sc, PIO_SODR, clockpin);
+ }
+}
+
+static int
at91_pio_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag,
struct thread *td)
{
+ struct at91_pio_softc *sc;
+ struct at91_gpio_cfg *cfg;
+ struct at91_gpio_info *info;
+ struct at91_gpio_bang *bang;
+ struct at91_gpio_bang_many *bangmany;
+ uint32_t i, num;
+ uint8_t many[1024], *walker;
+ int err;
+ int bitcount;
- return (ENXIO);
+ sc = CDEV2SOFTC(dev);
+ switch(cmd) {
+ case AT91_GPIO_SET: /* turn bits on */
+ WR4(sc, PIO_SODR, *(uint32_t *)data);
+ return (0);
+ case AT91_GPIO_CLR: /* turn bits off */
+ WR4(sc, PIO_CODR, *(uint32_t *)data);
+ return (0);
+ case AT91_GPIO_READ: /* Get the status of input bits */
+ *(uint32_t *)data = RD4(sc, PIO_PDSR);
+ return (0);
+ case AT91_GPIO_CFG: /* Configure AT91_GPIO pins */
+ cfg = (struct at91_gpio_cfg *)data;
+ if (cfg->cfgmask & AT91_GPIO_CFG_INPUT) {
+ WR4(sc, PIO_OER, cfg->iomask & ~cfg->input);
+ WR4(sc, PIO_ODR, cfg->iomask & cfg->input);
+ }
+ if (cfg->cfgmask & AT91_GPIO_CFG_HI_Z) {
+ WR4(sc, PIO_MDDR, cfg->iomask & ~cfg->hi_z);
+ WR4(sc, PIO_MDER, cfg->iomask & cfg->hi_z);
+ }
+ if (cfg->cfgmask & AT91_GPIO_CFG_PULLUP) {
+ WR4(sc, PIO_PUDR, cfg->iomask & ~cfg->pullup);
+ WR4(sc, PIO_PUER, cfg->iomask & cfg->pullup);
+ }
+ if (cfg->cfgmask & AT91_GPIO_CFG_GLITCH) {
+ WR4(sc, PIO_IFDR, cfg->iomask & ~cfg->glitch);
+ WR4(sc, PIO_IFER, cfg->iomask & cfg->glitch);
+ }
+ if (cfg->cfgmask & AT91_GPIO_CFG_GPIO) {
+ WR4(sc, PIO_PDR, cfg->iomask & ~cfg->gpio);
+ WR4(sc, PIO_PER, cfg->iomask & cfg->gpio);
+ }
+ if (cfg->cfgmask & AT91_GPIO_CFG_PERIPH) {
+ WR4(sc, PIO_ASR, cfg->iomask & ~cfg->periph);
+ WR4(sc, PIO_BSR, cfg->iomask & cfg->periph);
+ }
+ if (cfg->cfgmask & AT91_GPIO_CFG_INTR) {
+ WR4(sc, PIO_IDR, cfg->iomask & ~cfg->intr);
+ WR4(sc, PIO_IER, cfg->iomask & cfg->intr);
+ }
+ return (0);
+ case AT91_GPIO_BANG:
+ bang = (struct at91_gpio_bang *)data;
+ at91_pio_bang32(sc, bang->bits, bang->datapin, bang->clockpin);
+ return (0);
+ case AT91_GPIO_BANG_MANY:
+ bangmany = (struct at91_gpio_bang_many *)data;
+ walker = (uint8_t *)bangmany->bits;
+ bitcount = bangmany->numbits;
+ while (bitcount > 0) {
+ num = MIN((bitcount + 7) / 8, sizeof(many));
+ err = copyin(walker, many, num);
+ if (err)
+ return err;
+ for (i = 0; i < num && bitcount > 0; i++, bitcount -= 8)
+ if (bitcount >= 8)
+ at91_pio_bang(sc, many[i], 8, bangmany->datapin, bangmany->clockpin);
+ else
+ at91_pio_bang(sc, many[i], bitcount, bangmany->datapin, bangmany->clockpin);
+ walker += num;
+ }
+ return (0);
+ case AT91_GPIO_INFO: /* Learn about this device's AT91_GPIO bits */
+ info = (struct at91_gpio_info *)data;
+ info->output_status = RD4(sc, PIO_ODSR);
+ info->input_status = RD4(sc, PIO_OSR);
+ info->highz_status = RD4(sc, PIO_MDSR);
+ info->pullup_status = RD4(sc, PIO_PUSR);
+ info->glitch_status = RD4(sc, PIO_IFSR);
+ info->enabled_status = RD4(sc, PIO_PSR);
+ info->periph_status = RD4(sc, PIO_ABSR);
+ info->intr_status = RD4(sc, PIO_IMR);
+ memset(info->extra_status, 0, sizeof(info->extra_status));
+ return (0);
+ }
+ return (ENOTTY);
}
/*
@@ -341,6 +528,17 @@ at91_pio_gpio_output(uint32_t pio, uint3
}
void
+at91_pio_gpio_high_z(uint32_t pio, uint32_t high_z_mask, int enable)
+{
+ uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
+
+ if (enable)
+ PIO[PIO_MDER / 4] = high_z_mask;
+ else
+ PIO[PIO_MDDR / 4] = high_z_mask;
+}
+
+void
at91_pio_gpio_set(uint32_t pio, uint32_t data_mask)
{
uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
@@ -361,9 +559,7 @@ at91_pio_gpio_get(uint32_t pio, uint32_t
{
uint32_t *PIO = (uint32_t *)(AT91_BASE + pio);
- data_mask &= PIO[PIO_PDSR / 4];
-
- return (data_mask ? 1 : 0);
+ return ((PIO[PIO_PDSR / 4] & data_mask));
}
void
Modified: projects/camlock/sys/arm/at91/at91_piovar.h
==============================================================================
--- projects/camlock/sys/arm/at91/at91_piovar.h Sat Mar 30 07:07:52 2013 (r248928)
+++ projects/camlock/sys/arm/at91/at91_piovar.h Sat Mar 30 07:13:01 2013 (r248929)
@@ -36,6 +36,7 @@ void at91_pio_use_gpio(uint32_t pio, uin
void at91_pio_gpio_input(uint32_t pio, uint32_t input_enable_mask);
void at91_pio_gpio_output(uint32_t pio, uint32_t output_enable_mask,
int use_pullup);
+void at91_pio_gpio_high_z(uint32_t pio, uint32_t high_z_mask, int enable);
void at91_pio_gpio_set(uint32_t pio, uint32_t data_mask);
void at91_pio_gpio_clear(uint32_t pio, uint32_t data_mask);
uint8_t at91_pio_gpio_get(uint32_t pio, uint32_t data_mask);
Modified: projects/camlock/sys/arm/at91/at91_pmc.c
==============================================================================
--- projects/camlock/sys/arm/at91/at91_pmc.c Sat Mar 30 07:07:52 2013 (r248928)
+++ projects/camlock/sys/arm/at91/at91_pmc.c Sat Mar 30 07:13:01 2013 (r248929)
@@ -227,23 +227,18 @@ at91_pmc_set_pllb_mode(struct at91_pmc_c
struct at91_pmc_softc *sc = pmc_softc;
uint32_t value;
- if (on) {
- on = PMC_IER_LOCKB;
- value = pllb_init;
- } else
- value = 0;
+ value = on ? pllb_init : 0;
- /* Workaround RM9200 Errata #26 */
- if (at91_is_rm92() &&
- ((value ^ RD4(sc, CKGR_PLLBR)) & 0x03f0ff) != 0) {
- WR4(sc, CKGR_PLLBR, value ^ 1);
- while ((RD4(sc, PMC_SR) & PMC_IER_LOCKB) != on)
+ /*
+ * Only write to the register if the value is changing. Besides being
+ * good common sense, this works around RM9200 Errata #26 (CKGR_PLL[AB]R
+ * must not be written with the same value currently in the register).
+ */
+ if (RD4(sc, CKGR_PLLBR) != value) {
+ WR4(sc, CKGR_PLLBR, value);
+ while (on && (RD4(sc, PMC_SR) & PMC_IER_LOCKB) != PMC_IER_LOCKB)
continue;
}
-
- WR4(sc, CKGR_PLLBR, value);
- while ((RD4(sc, PMC_SR) & PMC_IER_LOCKB) != on)
- continue;
}
static void
@@ -577,7 +572,6 @@ at91_pmc_init_clock(void)
WR4(sc, PMC_SCER, PMC_SCER_MCKUDP);
} else
WR4(sc, PMC_SCDR, PMC_SCER_UHP_SAM9 | PMC_SCER_UDP_SAM9);
- WR4(sc, CKGR_PLLBR, 0);
/*
* MCK and PCU derive from one of the primary clocks. Initialize
Modified: projects/camlock/sys/arm/at91/at91rm9200_devices.c
==============================================================================
--- projects/camlock/sys/arm/at91/at91rm9200_devices.c Sat Mar 30 07:07:52 2013 (r248928)
+++ projects/camlock/sys/arm/at91/at91rm9200_devices.c Sat Mar 30 07:13:01 2013 (r248929)
@@ -92,7 +92,7 @@ at91rm9200_config_uart(unsigned devid, u
case AT91RM9200_ID_USART0:
at91_pio_use_periph_a(AT91RM92_PIOA_BASE, AT91C_PIO_PA17, 1); /* TXD0 */
- at91_pio_use_periph_a(AT91RM92_PIOA_BASE, AT91C_PIO_PA19, 0); /* RXD0 */
+ at91_pio_use_periph_a(AT91RM92_PIOA_BASE, AT91C_PIO_PA18, 0); /* RXD0 */
/* CTS PA20 */
/* RTS -- errata #39 PA21 */
break;
Copied: projects/camlock/sys/arm/include/at91_gpio.h (from r248928, head/sys/arm/include/at91_gpio.h)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ projects/camlock/sys/arm/include/at91_gpio.h Sat Mar 30 07:13:01 2013 (r248929, copy of r248928, head/sys/arm/include/at91_gpio.h)
@@ -0,0 +1,108 @@
+/*-
+ * Copyright (C) 2006 M. Warner Losh. All rights reserved.
+ * Copyright (C) 2012 Ian Lepore. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef _ARM_AT91_GPIO_H
+#define _ARM_AT91_GPIO_H
+
+#ifndef _KERNEL
+#include <sys/types.h>
+#endif
+#include <sys/ioccom.h>
+
+/* Userland GPIO API for Atmel AT91 series SOC.
+ *
+ * Open /dev/pioN (where N is 0 for PIOA, 1 for PIOB, etc), and use ioctl(2)
+ * calls to configure the pin(s) as needed.
+ *
+ * The userland interrupt support allows you to use read(2) and/or select(2) to
+ * get notified of interrupts on PIO pins for which you enabled interrupt
+ * notifications. Each time an interrupt occurs on a given pin, that pin number
+ * is written into a buffer as a uint8_t. Thus, reading from /dev/pioN delivers
+ * info on which interrupt(s) have occurred since the last read. You can also
+ * use select() to block until an interrupt occurs (you still need to read() to
+ * consume the interrupt number bytes from the buffer.)
+ */
+
+struct at91_gpio_info
+{
+ uint32_t output_status; /* Current state of output pins */
+ uint32_t input_status; /* 1->out 0->in bitmask */
+ uint32_t highz_status; /* 1->highz 0->driven bitmask */
+ uint32_t pullup_status; /* 1->floating 0->pullup engaged */
+ uint32_t glitch_status; /* 0-> no glitch filter 1->gf */
+ uint32_t enabled_status; /* 1->used for pio 0->other */
+ uint32_t periph_status; /* 0->A periph 1->B periph */
+ uint32_t intr_status; /* 1-> ISR enabled, 0->disabled */
+ uint32_t extra_status[8];/* Extra status info, device depend */
+};
+
+struct at91_gpio_cfg
+{
+ uint32_t cfgmask; /* which things change */
+#define AT91_GPIO_CFG_INPUT 0x01 /* configure input/output pins */
+#define AT91_GPIO_CFG_HI_Z 0x02 /* HiZ */
+#define AT91_GPIO_CFG_PULLUP 0x04 /* Enable/disable pullup resistors */
+#define AT91_GPIO_CFG_GLITCH 0x08 /* Glitch filtering */
+#define AT91_GPIO_CFG_GPIO 0x10 /* Use pin for PIO or peripheral */
+#define AT91_GPIO_CFG_PERIPH 0x20 /* Select which peripheral to use */
+#define AT91_GPIO_CFG_INTR 0x40 /* Select pin for interrupts */
+ uint32_t iomask; /* Mask of bits to change */
+ uint32_t input; /* or output */
+ uint32_t hi_z; /* Disable output */
+ uint32_t pullup; /* Enable pullup resistor */
+ uint32_t glitch; /* Glitch filtering */
+ uint32_t gpio; /* Enabled for PIO (1) or periph (0) */
+ uint32_t periph; /* Select periph A (0) or periph B (1) */
+ uint32_t intr; /* Enable interrupt (1), or not (0) */
+};
+
+struct at91_gpio_bang
+{
+ uint32_t clockpin; /* clock pin MASK */
+ uint32_t datapin; /* Data pin MASK */
+ uint32_t bits; /* bits to clock out (all 32) */
+};
+
+struct at91_gpio_bang_many
+{
+ uint32_t clockpin; /* clock pin MASK */
+ uint32_t datapin; /* Data pin MASK */
+ void *bits; /* bits to clock out */
+ uint32_t numbits; /* Number of bits to clock out */
+};
+
+#define AT91_GPIO_SET _IOW('g', 0, uint32_t) /* Turn bits on */
+#define AT91_GPIO_CLR _IOW('g', 1, uint32_t) /* Turn bits off */
+#define AT91_GPIO_READ _IOR('g', 2, uint32_t) /* Read input bit state */
+#define AT91_GPIO_INFO _IOR('g', 3, struct at91_gpio_info) /* State of pio cfg */
+#define AT91_GPIO_CFG _IOW('g', 4, struct at91_gpio_cfg) /* Configure pio */
+#define AT91_GPIO_BANG _IOW('g', 5, struct at91_gpio_bang) /* bit bang 32 bits */
+#define AT91_GPIO_BANG_MANY _IOW('g', 6, struct at91_gpio_bang_many)/* bit bang >32 bits */
+
+#endif /* _ARM_AT91_GPIO_H */
+
Modified: projects/camlock/sys/arm/include/machdep.h
==============================================================================
--- projects/camlock/sys/arm/include/machdep.h Sat Mar 30 07:07:52 2013 (r248928)
+++ projects/camlock/sys/arm/include/machdep.h Sat Mar 30 07:13:01 2013 (r248929)
@@ -5,6 +5,7 @@
#define _MACHDEP_BOOT_MACHDEP_H_
/* Structs that need to be initialised by initarm */
+struct pv_addr;
extern struct pv_addr irqstack;
extern struct pv_addr undstack;
extern struct pv_addr abtstack;
@@ -15,13 +16,14 @@ extern struct pv_addr abtstack;
#define UND_STACK_SIZE 1
/* misc prototypes used by the many arm machdeps */
+struct trapframe;
void arm_lock_cache_line(vm_offset_t);
void init_proc0(vm_offset_t kstack);
void halt(void);
-void data_abort_handler(trapframe_t *);
-void prefetch_abort_handler(trapframe_t *);
+void data_abort_handler(struct trapframe *);
+void prefetch_abort_handler(struct trapframe *);
void set_stackptrs(int cpu);
-void undefinedinstruction_bounce(trapframe_t *);
+void undefinedinstruction_bounce(struct trapframe *);
/* Early boot related helper functions */
struct arm_boot_params;
Modified: projects/camlock/sys/cam/ata/ata_da.c
==============================================================================
--- projects/camlock/sys/cam/ata/ata_da.c Sat Mar 30 07:07:52 2013 (r248928)
+++ projects/camlock/sys/cam/ata/ata_da.c Sat Mar 30 07:13:01 2013 (r248929)
@@ -130,6 +130,7 @@ struct ada_softc {
ada_state state;
ada_flags flags;
ada_quirks quirks;
+ int sort_io_queue;
int ordered_tag_count;
int outstanding_cmds;
int trim_max_ranges;
@@ -449,6 +450,8 @@ static void adaresume(void *arg);
softc->read_ahead : ada_read_ahead)
#define ADA_WC (softc->write_cache >= 0 ? \
softc->write_cache : ada_write_cache)
+#define ADA_SIO (softc->sort_io_queue >= 0 ? \
+ softc->sort_io_queue : cam_sort_io_queues)
/*
* Most platforms map firmware geometry to actual, but some don't. If
@@ -670,10 +673,17 @@ adastrategy(struct bio *bp)
* Place it in the queue of disk activities for this disk
*/
if (bp->bio_cmd == BIO_DELETE &&
- (softc->flags & ADA_FLAG_CAN_TRIM))
- bioq_disksort(&softc->trim_queue, bp);
- else
- bioq_disksort(&softc->bio_queue, bp);
+ (softc->flags & ADA_FLAG_CAN_TRIM)) {
+ if (ADA_SIO)
+ bioq_disksort(&softc->trim_queue, bp);
+ else
+ bioq_insert_tail(&softc->trim_queue, bp);
+ } else {
+ if (ADA_SIO)
+ bioq_disksort(&softc->bio_queue, bp);
+ else
+ bioq_insert_tail(&softc->bio_queue, bp);
+ }
/*
* Schedule ourselves for performing the work.
@@ -997,6 +1007,10 @@ adasysctlinit(void *context, int pending
SYSCTL_ADD_INT(&softc->sysctl_ctx, SYSCTL_CHILDREN(softc->sysctl_tree),
OID_AUTO, "write_cache", CTLFLAG_RW | CTLFLAG_MPSAFE,
&softc->write_cache, 0, "Enable disk write cache.");
+ SYSCTL_ADD_INT(&softc->sysctl_ctx, SYSCTL_CHILDREN(softc->sysctl_tree),
+ OID_AUTO, "sort_io_queue", CTLFLAG_RW | CTLFLAG_MPSAFE,
+ &softc->sort_io_queue, 0,
+ "Sort IO queue to try and optimise disk access patterns");
#ifdef ADA_TEST_FAILURE
/*
* Add a 'door bell' sysctl which allows one to set it from userland
@@ -1132,6 +1146,7 @@ adaregister(struct cam_periph *periph, v
snprintf(announce_buf, sizeof(announce_buf),
"kern.cam.ada.%d.write_cache", periph->unit_number);
TUNABLE_INT_FETCH(announce_buf, &softc->write_cache);
+ softc->sort_io_queue = -1;
adagetparams(periph, cgd);
softc->disk = disk_alloc();
softc->disk->d_devstat = devstat_new_entry(periph->periph_name,
Modified: projects/camlock/sys/cam/cam.c
==============================================================================
--- projects/camlock/sys/cam/cam.c Sat Mar 30 07:07:52 2013 (r248928)
+++ projects/camlock/sys/cam/cam.c Sat Mar 30 07:13:01 2013 (r248929)
@@ -110,6 +110,15 @@ const int num_cam_status_entries =
#ifdef _KERNEL
SYSCTL_NODE(_kern, OID_AUTO, cam, CTLFLAG_RD, 0, "CAM Subsystem");
+
+#ifndef CAM_DEFAULT_SORT_IO_QUEUES
+#define CAM_DEFAULT_SORT_IO_QUEUES 1
+#endif
+
+int cam_sort_io_queues = CAM_DEFAULT_SORT_IO_QUEUES;
+TUNABLE_INT("kern.cam.sort_io_queues", &cam_sort_io_queues);
+SYSCTL_INT(_kern_cam, OID_AUTO, sort_io_queues, CTLFLAG_RWTUN,
+ &cam_sort_io_queues, 0, "Sort IO queues to try and optimise disk access patterns");
#endif
void
Modified: projects/camlock/sys/cam/cam.h
==============================================================================
--- projects/camlock/sys/cam/cam.h Sat Mar 30 07:07:52 2013 (r248928)
+++ projects/camlock/sys/cam/cam.h Sat Mar 30 07:13:01 2013 (r248929)
@@ -227,6 +227,9 @@ struct cam_status_entry
extern const struct cam_status_entry cam_status_table[];
extern const int num_cam_status_entries;
+#ifdef _KERNEL
+extern int cam_sort_io_queues;
+#endif
union ccb;
#ifdef SYSCTL_DECL /* from sysctl.h */
Modified: projects/camlock/sys/cam/scsi/scsi_da.c
==============================================================================
--- projects/camlock/sys/cam/scsi/scsi_da.c Sat Mar 30 07:07:52 2013 (r248928)
+++ projects/camlock/sys/cam/scsi/scsi_da.c Sat Mar 30 07:13:01 2013 (r248929)
@@ -145,6 +145,7 @@ struct da_softc {
da_state state;
da_flags flags;
da_quirks quirks;
+ int sort_io_queue;
int minimum_cmd_size;
int error_inject;
int ordered_tag_count;
@@ -903,6 +904,8 @@ static timeout_t damediapoll;
#define DA_DEFAULT_SEND_ORDERED 1
#endif
+#define DA_SIO (softc->sort_io_queue >= 0 ? \
+ softc->sort_io_queue : cam_sort_io_queues)
static int da_poll_period = DA_DEFAULT_POLL_PERIOD;
static int da_retry_count = DA_DEFAULT_RETRY;
@@ -1140,10 +1143,15 @@ dastrategy(struct bio *bp)
if (bp->bio_cmd == BIO_DELETE) {
if (bp->bio_bcount == 0)
biodone(bp);
- else
+ else if (DA_SIO)
bioq_disksort(&softc->delete_queue, bp);
- } else
+ else
+ bioq_insert_tail(&softc->delete_queue, bp);
+ } else if (DA_SIO) {
bioq_disksort(&softc->bio_queue, bp);
+ } else {
+ bioq_insert_tail(&softc->bio_queue, bp);
+ }
/*
* Schedule ourselves for performing the work.
@@ -1504,6 +1512,9 @@ dasysctlinit(void *context, int pending)
OID_AUTO, "minimum_cmd_size", CTLTYPE_INT | CTLFLAG_RW,
&softc->minimum_cmd_size, 0, dacmdsizesysctl, "I",
"Minimum CDB size");
+ SYSCTL_ADD_INT(&softc->sysctl_ctx, SYSCTL_CHILDREN(softc->sysctl_tree),
+ OID_AUTO, "sort_io_queue", CTLFLAG_RW, &softc->sort_io_queue, 0,
+ "Sort IO queue to try and optimise disk access patterns");
SYSCTL_ADD_INT(&softc->sysctl_ctx,
SYSCTL_CHILDREN(softc->sysctl_tree),
@@ -1651,6 +1662,7 @@ daregister(struct cam_periph *periph, vo
softc->flags |= DA_FLAG_PACK_REMOVABLE;
softc->unmap_max_ranges = UNMAP_MAX_RANGES;
softc->unmap_max_lba = 1024*1024*2;
+ softc->sort_io_queue = -1;
periph->softc = softc;
@@ -2133,9 +2145,16 @@ cmd6workaround(union ccb *ccb)
dadeletemethodset(softc, DA_DELETE_DISABLE);
} else
dadeletemethodset(softc, DA_DELETE_DISABLE);
- while ((bp = bioq_takefirst(&softc->delete_run_queue))
- != NULL)
- bioq_disksort(&softc->delete_queue, bp);
+
+ if (DA_SIO) {
+ while ((bp = bioq_takefirst(&softc->delete_run_queue))
+ != NULL)
+ bioq_disksort(&softc->delete_queue, bp);
+ } else {
+ while ((bp = bioq_takefirst(&softc->delete_run_queue))
+ != NULL)
+ bioq_insert_tail(&softc->delete_queue, bp);
+ }
bioq_insert_tail(&softc->delete_queue,
(struct bio *)ccb->ccb_h.ccb_bp);
ccb->ccb_h.ccb_bp = NULL;
Modified: projects/camlock/sys/dev/cxgbe/adapter.h
==============================================================================
--- projects/camlock/sys/dev/cxgbe/adapter.h Sat Mar 30 07:07:52 2013 (r248928)
+++ projects/camlock/sys/dev/cxgbe/adapter.h Sat Mar 30 07:13:01 2013 (r248929)
@@ -50,9 +50,6 @@
#include "offload.h"
#include "firmware/t4fw_interface.h"
-#define T4_CFGNAME "t4fw_cfg"
-#define T4_FWNAME "t4fw"
-
MALLOC_DECLARE(M_CXGBE);
#define CXGBE_UNIMPLEMENTED(s) \
panic("%s (%s, line %d) not implemented yet.", s, __FILE__, __LINE__)
@@ -144,12 +141,6 @@ enum {
TX_WR_FLITS = SGE_MAX_WR_LEN / 8
};
-#ifdef T4_PKT_TIMESTAMP
-#define RX_COPY_THRESHOLD (MINCLSIZE - 8)
-#else
-#define RX_COPY_THRESHOLD MINCLSIZE
-#endif
-
enum {
/* adapter intr_type */
INTR_INTX = (1 << 0),
@@ -327,6 +318,9 @@ enum {
EQ_STALLED = (1 << 6), /* out of hw descriptors or dmamaps */
};
+/* Listed in order of preference. Update t4_sysctls too if you change these */
+enum {DOORBELL_UDB, DOORBELL_WRWC, DOORBELL_UDBWC, DOORBELL_KDB};
+
/*
* Egress Queue: driver is producer, T4 is consumer.
*
@@ -344,6 +338,9 @@ struct sge_eq {
struct tx_desc *desc; /* KVA of descriptor ring */
bus_addr_t ba; /* bus address of descriptor ring */
struct sge_qstat *spg; /* status page, for convenience */
+ int doorbells;
+ volatile uint32_t *udb; /* KVA of doorbell (lies within BAR2) */
+ u_int udb_qid; /* relative qid within the doorbell page */
uint16_t cap; /* max # of desc, for convenience */
uint16_t avail; /* available descriptors, for convenience */
uint16_t qsize; /* size (# of entries) of the queue */
@@ -496,6 +493,7 @@ struct sge {
int timer_val[SGE_NTIMERS];
int counter_val[SGE_NCOUNTERS];
int fl_starve_threshold;
+ int s_qpp;
int nrxq; /* total # of Ethernet rx queues */
int ntxq; /* total # of Ethernet tx tx queues */
@@ -541,6 +539,9 @@ struct adapter {
bus_space_handle_t bh;
bus_space_tag_t bt;
bus_size_t mmio_len;
+ int udbs_rid;
+ struct resource *udbs_res;
+ volatile uint8_t *udbs_base;
unsigned int pf;
unsigned int mbox;
@@ -570,6 +571,7 @@ struct adapter {
struct l2t_data *l2t; /* L2 table */
struct tid_info tids;
+ int doorbells;
int open_device_map;
#ifdef TCP_OFFLOAD
int offload_map;
@@ -748,13 +750,15 @@ t4_os_set_hw_addr(struct adapter *sc, in
bcopy(hw_addr, sc->port[idx]->hw_addr, ETHER_ADDR_LEN);
}
-static inline bool is_10G_port(const struct port_info *pi)
+static inline bool
+is_10G_port(const struct port_info *pi)
{
return ((pi->link_cfg.supported & FW_PORT_CAP_SPEED_10G) != 0);
}
-static inline int tx_resume_threshold(struct sge_eq *eq)
+static inline int
+tx_resume_threshold(struct sge_eq *eq)
{
return (eq->qsize / 4);
@@ -778,7 +782,9 @@ void end_synchronized_op(struct adapter
/* t4_sge.c */
void t4_sge_modload(void);
-int t4_sge_init(struct adapter *);
+void t4_init_sge_cpl_handlers(struct adapter *);
+void t4_tweak_chip_settings(struct adapter *);
+int t4_read_chip_settings(struct adapter *);
int t4_create_dma_tag(struct adapter *);
int t4_destroy_dma_tag(struct adapter *);
int t4_setup_adapter_queues(struct adapter *);
Modified: projects/camlock/sys/dev/cxgbe/common/common.h
==============================================================================
--- projects/camlock/sys/dev/cxgbe/common/common.h Sat Mar 30 07:07:52 2013 (r248928)
+++ projects/camlock/sys/dev/cxgbe/common/common.h Sat Mar 30 07:13:01 2013 (r248929)
@@ -42,15 +42,19 @@ enum {
MACADDR_LEN = 12, /* MAC Address length */
};
-enum { MEM_EDC0, MEM_EDC1, MEM_MC };
+enum { MEM_EDC0, MEM_EDC1, MEM_MC, MEM_MC0 = MEM_MC, MEM_MC1 };
enum {
MEMWIN0_APERTURE = 2048,
MEMWIN0_BASE = 0x1b800,
MEMWIN1_APERTURE = 32768,
MEMWIN1_BASE = 0x28000,
- MEMWIN2_APERTURE = 65536,
- MEMWIN2_BASE = 0x30000,
+
+ MEMWIN2_APERTURE_T4 = 65536,
+ MEMWIN2_BASE_T4 = 0x30000,
+
+ MEMWIN2_APERTURE_T5 = 128 * 1024,
+ MEMWIN2_BASE_T5 = 0x60000,
};
enum dev_master { MASTER_CANT, MASTER_MAY, MASTER_MUST };
@@ -63,15 +67,20 @@ enum {
PAUSE_AUTONEG = 1 << 2
};
-#define FW_VERSION_MAJOR 1
-#define FW_VERSION_MINOR 8
-#define FW_VERSION_MICRO 4
-#define FW_VERSION_BUILD 0
-
-#define FW_VERSION (V_FW_HDR_FW_VER_MAJOR(FW_VERSION_MAJOR) | \
- V_FW_HDR_FW_VER_MINOR(FW_VERSION_MINOR) | \
- V_FW_HDR_FW_VER_MICRO(FW_VERSION_MICRO) | \
- V_FW_HDR_FW_VER_BUILD(FW_VERSION_BUILD))
+#define FW_VERSION_MAJOR_T4 1
+#define FW_VERSION_MINOR_T4 8
+#define FW_VERSION_MICRO_T4 4
+#define FW_VERSION_BUILD_T4 0
+
+#define FW_VERSION_MAJOR_T5 0
+#define FW_VERSION_MINOR_T5 5
+#define FW_VERSION_MICRO_T5 18
+#define FW_VERSION_BUILD_T5 0
+
+struct memwin {
+ uint32_t base;
+ uint32_t aperture;
+};
struct port_stats {
u64 tx_octets; /* total # of octets in good frames */
@@ -267,18 +276,20 @@ struct adapter_params {
unsigned int cim_la_size;
- /* Used as int in sysctls, do not reduce size */
- unsigned int nports; /* # of ethernet ports */
- unsigned int portvec;
- unsigned int rev; /* chip revision */
- unsigned int offload;
+ uint8_t nports; /* # of ethernet ports */
+ uint8_t portvec;
+ unsigned int chipid:4; /* chip ID. T4 = 4, T5 = 5, ... */
+ unsigned int rev:4; /* chip revision */
+ unsigned int fpga:1; /* this is an FPGA */
+ unsigned int offload:1; /* hw is TOE capable, fw has divvied up card
+ resources for TOE operation. */
+ unsigned int bypass:1; /* this is a bypass card */
unsigned int ofldq_wr_cred;
};
-enum { /* chip revisions */
- T4_REV_A = 0,
-};
+#define CHELSIO_T4 0x4
+#define CHELSIO_T5 0x5
struct trace_params {
u32 data[TRACE_LEN / 4];
@@ -316,6 +327,31 @@ static inline int is_offload(const struc
return adap->params.offload;
}
+static inline int chip_id(struct adapter *adap)
+{
+ return adap->params.chipid;
+}
+
+static inline int chip_rev(struct adapter *adap)
+{
+ return adap->params.rev;
+}
+
+static inline int is_t4(struct adapter *adap)
+{
+ return adap->params.chipid == CHELSIO_T4;
+}
+
+static inline int is_t5(struct adapter *adap)
+{
+ return adap->params.chipid == CHELSIO_T5;
+}
+
+static inline int is_fpga(struct adapter *adap)
+{
+ return adap->params.fpga;
+}
+
static inline unsigned int core_ticks_per_usec(const struct adapter *adap)
{
return adap->params.vpd.cclk / 1000;
@@ -437,7 +473,8 @@ int t4_cim_read_la(struct adapter *adap,
*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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