svn commit: r230814 - projects/armv6/sys/arm/arm

[Grzegorz Bernacki]

Author: gber
Date: Tue Jan 31 15:38:06 2012
New Revision: 230814
URL: http://svn.freebsd.org/changeset/base/230814

Log:
  Fix TTB setup
  
  When multiprocessor system is used,
  shareable flag must be set when TTB is stored in CP15 register.
  
  Submitted by: Lukasz Plachno
  Obtained from: Marvell, Semihalf

Modified:
  projects/armv6/sys/arm/arm/cpufunc_asm_pj4b.S
  projects/armv6/sys/arm/arm/locore.S

Modified: projects/armv6/sys/arm/arm/cpufunc_asm_pj4b.S
==============================================================================
--- projects/armv6/sys/arm/arm/cpufunc_asm_pj4b.S	Tue Jan 31 15:36:21 2012	(r230813)
+++ projects/armv6/sys/arm/arm/cpufunc_asm_pj4b.S	Tue Jan 31 15:38:06 2012	(r230814)
@@ -40,6 +40,9 @@ __FBSDID("$FreeBSD$");
 ENTRY(pj4b_setttb)
 	/* Cache synchronization is not required as this core has PIPT caches */
 	mcr	p15, 0, r1, c7, c10, 4	/* drain the write buffer */
+#ifdef SMP
+	orr 	r0, r0, #2		/* Set TTB shared memory flag */
+#endif
 	mcr	p15, 0, r0, c2, c0, 0	/* load new TTB */
 	mcr	p15, 0, r0, c8, c7, 0	/* invalidate I+D TLBs */
 	RET

Modified: projects/armv6/sys/arm/arm/locore.S
==============================================================================
--- projects/armv6/sys/arm/arm/locore.S	Tue Jan 31 15:36:21 2012	(r230813)
+++ projects/armv6/sys/arm/arm/locore.S	Tue Jan 31 15:38:06 2012	(r230814)
@@ -160,6 +160,9 @@ Lunmapped:
 	orrne	r5, r5, #PHYSADDR
 	movne	pc, r5
 
+#if defined(SMP)
+	orr 	r0, r0, #2		/* Set TTB shared memory flag */
+#endif
 	mcr	p15, 0, r0, c2, c0, 0	/* Set TTB */
 	mcr	p15, 0, r0, c8, c7, 0	/* Flush TLB */
 
@@ -335,6 +338,9 @@ ASENTRY_NP(mpentry)
 
 Ltag:
 	ldr	r0, Lstartup_pagetable
+#if defined(SMP)
+	orr 	r0, r0, #2		/* Set TTB shared memory flag */
+#endif
 	mcr	p15, 0, r0, c2, c0, 0	/* Set TTB */
 	mcr	p15, 0, r0, c8, c7, 0	/* Flush TLB */