svn commit: r221915 - in projects/altix/sys: . amd64/amd64
amd64/conf amd64/include arm/arm arm/include boot boot/common
boot/sparc64/loader cam/scsi cddl/dev/dtrace/amd64
cddl/dev/dtrace/i386 conf...
Marcel Moolenaar
marcel at FreeBSD.org
Sat May 14 20:48:25 UTC 2011
Author: marcel
Date: Sat May 14 20:48:23 2011
New Revision: 221915
URL: http://svn.freebsd.org/changeset/base/221915
Log:
Merge svn+ssh://svn.freebsd.org/base/head@221894
Added:
projects/altix/sys/dev/ath/ath_hal/ah_eeprom_9287.c
- copied unchanged from r221894, head/sys/dev/ath/ath_hal/ah_eeprom_9287.c
projects/altix/sys/dev/ath/ath_hal/ah_eeprom_9287.h
- copied unchanged from r221894, head/sys/dev/ath/ath_hal/ah_eeprom_9287.h
projects/altix/sys/dev/ath/ath_hal/ar9002/ar9285an.h
- copied unchanged from r221894, head/sys/dev/ath/ath_hal/ar9002/ar9285an.h
projects/altix/sys/nfs/nfs_kdtrace.h
- copied unchanged from r221894, head/sys/nfs/nfs_kdtrace.h
projects/altix/sys/teken/demo/
- copied from r221894, head/sys/teken/demo/
projects/altix/sys/teken/libteken/
- copied from r221894, head/sys/teken/libteken/
projects/altix/sys/teken/stress/
- copied from r221894, head/sys/teken/stress/
Deleted:
projects/altix/sys/conf/Makefile.sun4v
projects/altix/sys/conf/files.sun4v
projects/altix/sys/conf/options.sun4v
projects/altix/sys/nfsclient/nfs_kdtrace.h
projects/altix/sys/sun4v/
projects/altix/sys/teken/Makefile
projects/altix/sys/teken/teken_demo.c
projects/altix/sys/teken/teken_stress.c
Modified:
projects/altix/sys/Makefile
projects/altix/sys/amd64/amd64/machdep.c
projects/altix/sys/amd64/amd64/mp_machdep.c
projects/altix/sys/amd64/conf/GENERIC
projects/altix/sys/amd64/include/clock.h
projects/altix/sys/amd64/include/specialreg.h
projects/altix/sys/amd64/include/vmparam.h
projects/altix/sys/arm/arm/pmap.c
projects/altix/sys/arm/include/vmparam.h
projects/altix/sys/boot/Makefile
projects/altix/sys/boot/common/interp.c
projects/altix/sys/boot/common/loader.8
projects/altix/sys/boot/sparc64/loader/main.c
projects/altix/sys/cam/scsi/scsi_cd.c
projects/altix/sys/cddl/dev/dtrace/amd64/dtrace_subr.c
projects/altix/sys/cddl/dev/dtrace/i386/dtrace_subr.c
projects/altix/sys/conf/kern.mk
projects/altix/sys/dev/ahci/ahci.c
projects/altix/sys/dev/ata/ata-pci.h
projects/altix/sys/dev/ata/chipsets/ata-intel.c
projects/altix/sys/dev/ath/ath_hal/ah.c
projects/altix/sys/dev/ath/ath_hal/ah.h
projects/altix/sys/dev/ath/ath_hal/ah_debug.h
projects/altix/sys/dev/ath/ath_hal/ah_eeprom.h
projects/altix/sys/dev/ath/ath_hal/ah_eeprom_v14.h
projects/altix/sys/dev/ath/ath_hal/ah_internal.h
projects/altix/sys/dev/ath/ath_hal/ar5416/ar5416.h
projects/altix/sys/dev/ath/ath_hal/ar5416/ar5416_ani.c
projects/altix/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
projects/altix/sys/dev/ath/ath_hal/ar5416/ar5416_cal.c
projects/altix/sys/dev/ath/ath_hal/ar5416/ar5416_misc.c
projects/altix/sys/dev/ath/ath_hal/ar5416/ar5416_power.c
projects/altix/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
projects/altix/sys/dev/ath/ath_hal/ar5416/ar5416desc.h
projects/altix/sys/dev/ath/ath_hal/ar5416/ar5416phy.h
projects/altix/sys/dev/ath/ath_hal/ar5416/ar5416reg.h
projects/altix/sys/dev/ath/ath_hal/ar9001/ar9130_attach.c
projects/altix/sys/dev/ath/ath_hal/ar9001/ar9160_attach.c
projects/altix/sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
projects/altix/sys/dev/ath/ath_hal/ar9002/ar9280_olc.c
projects/altix/sys/dev/ath/ath_hal/ar9002/ar9285.h
projects/altix/sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
projects/altix/sys/dev/ath/ath_hal/ar9002/ar9285_cal.c
projects/altix/sys/dev/ath/ath_hal/ar9002/ar9285_diversity.c
projects/altix/sys/dev/ath/ath_hal/ar9002/ar9285_phy.c
projects/altix/sys/dev/ath/ath_hal/ar9002/ar9285_phy.h
projects/altix/sys/dev/ath/ath_hal/ar9002/ar9285_reset.c
projects/altix/sys/dev/ath/ath_rate/sample/tx_schedules.h
projects/altix/sys/dev/ath/if_ath.c
projects/altix/sys/dev/bge/if_bge.c
projects/altix/sys/dev/bge/if_bgereg.h
projects/altix/sys/dev/bm/if_bm.c
projects/altix/sys/dev/bxe/if_bxe.c
projects/altix/sys/dev/bxe/if_bxe.h
projects/altix/sys/dev/ichsmb/ichsmb_pci.c
projects/altix/sys/dev/ichwd/ichwd.c
projects/altix/sys/dev/ichwd/ichwd.h
projects/altix/sys/dev/iwn/if_iwn.c
projects/altix/sys/dev/iwn/if_iwnreg.h
projects/altix/sys/dev/iwn/if_iwnvar.h
projects/altix/sys/dev/md/md.c
projects/altix/sys/dev/mii/atphy.c
projects/altix/sys/dev/mii/brgphy.c
projects/altix/sys/dev/mii/ip1000phy.c
projects/altix/sys/dev/mii/mii_physubr.c
projects/altix/sys/dev/mii/miidevs
projects/altix/sys/dev/null/null.c
projects/altix/sys/dev/pci/isa_pci.c
projects/altix/sys/dev/puc/pucdata.c
projects/altix/sys/dev/sound/pci/hda/hdac.c
projects/altix/sys/dev/sound/pcm/dsp.c
projects/altix/sys/dev/sound/usb/uaudio.c
projects/altix/sys/dev/syscons/syscons.c
projects/altix/sys/dev/syscons/syscons.h
projects/altix/sys/dev/usb/usb_device.c
projects/altix/sys/dev/usb/usbdevs
projects/altix/sys/dev/xen/balloon/balloon.c
projects/altix/sys/dev/xl/if_xl.c
projects/altix/sys/dev/xl/if_xlreg.h
projects/altix/sys/fs/ext2fs/ext2_lookup.c
projects/altix/sys/fs/nfs/nfs.h
projects/altix/sys/fs/nfsclient/nfs_clvfsops.c
projects/altix/sys/fs/nfsserver/nfs_nfsdkrpc.c
projects/altix/sys/fs/nfsserver/nfs_nfsdport.c
projects/altix/sys/geom/eli/g_eli.c
projects/altix/sys/geom/eli/g_eli.h
projects/altix/sys/geom/eli/g_eli_ctl.c
projects/altix/sys/geom/eli/g_eli_integrity.c
projects/altix/sys/geom/eli/g_eli_key_cache.c
projects/altix/sys/geom/geom_kern.c
projects/altix/sys/geom/part/g_part.c
projects/altix/sys/geom/part/g_part_apm.c
projects/altix/sys/geom/part/g_part_bsd.c
projects/altix/sys/geom/part/g_part_ebr.c
projects/altix/sys/geom/part/g_part_mbr.c
projects/altix/sys/geom/part/g_part_pc98.c
projects/altix/sys/geom/part/g_part_vtoc8.c
projects/altix/sys/i386/conf/GENERIC
projects/altix/sys/i386/i386/machdep.c
projects/altix/sys/i386/i386/mp_machdep.c
projects/altix/sys/i386/include/clock.h
projects/altix/sys/i386/include/specialreg.h
projects/altix/sys/i386/include/vmparam.h
projects/altix/sys/i386/xen/clock.c
projects/altix/sys/i386/xen/mp_machdep.c
projects/altix/sys/ia64/ia64/exception.S
projects/altix/sys/ia64/ia64/pmap.c
projects/altix/sys/ia64/ia64/syscall.S
projects/altix/sys/ia64/include/ia64_cpu.h
projects/altix/sys/ia64/include/pcpu.h
projects/altix/sys/ia64/include/vmparam.h
projects/altix/sys/ia64/isa/isa.c
projects/altix/sys/isa/isa_common.c
projects/altix/sys/isa/isa_common.h
projects/altix/sys/isa/syscons_isa.c
projects/altix/sys/kern/kern_clocksource.c
projects/altix/sys/kern/kern_descrip.c
projects/altix/sys/kern/kern_environment.c
projects/altix/sys/kern/kern_proc.c
projects/altix/sys/kern/kern_synch.c
projects/altix/sys/kern/kern_sysctl.c
projects/altix/sys/kern/vfs_bio.c
projects/altix/sys/kern/vfs_mount.c
projects/altix/sys/kern/vfs_subr.c
projects/altix/sys/kern/vfs_vnops.c
projects/altix/sys/kern/vnode_if.src
projects/altix/sys/mips/atheros/ar71xx_gpio.c
projects/altix/sys/mips/atheros/ar71xx_gpiovar.h
projects/altix/sys/mips/atheros/ar724xreg.h
projects/altix/sys/mips/atheros/ar91xxreg.h
projects/altix/sys/mips/conf/ADM5120
projects/altix/sys/mips/conf/ALCHEMY
projects/altix/sys/mips/conf/AR71XX
projects/altix/sys/mips/conf/AR91XX_BASE
projects/altix/sys/mips/conf/IDT
projects/altix/sys/mips/conf/MALTA
projects/altix/sys/mips/conf/MALTA64
projects/altix/sys/mips/conf/OCTEON1
projects/altix/sys/mips/conf/PB92
projects/altix/sys/mips/conf/QEMU
projects/altix/sys/mips/conf/RT305X
projects/altix/sys/mips/conf/SENTRY5
projects/altix/sys/mips/conf/XLR
projects/altix/sys/mips/conf/XLR64
projects/altix/sys/mips/conf/XLRN32
projects/altix/sys/mips/conf/std.SWARM
projects/altix/sys/mips/include/vmparam.h
projects/altix/sys/modules/mem/Makefile
projects/altix/sys/modules/uart/Makefile
projects/altix/sys/net/if_tun.c
projects/altix/sys/net80211/ieee80211_alq.c
projects/altix/sys/netinet/ipfw/ip_dn_glue.c
projects/altix/sys/netinet/ipfw/ip_dummynet.c
projects/altix/sys/netinet/sctp_auth.c
projects/altix/sys/netinet/sctp_auth.h
projects/altix/sys/netinet/sctp_indata.c
projects/altix/sys/netinet/sctp_input.c
projects/altix/sys/netinet/sctp_input.h
projects/altix/sys/netinet/sctp_output.c
projects/altix/sys/netinet/sctp_output.h
projects/altix/sys/netinet/sctp_pcb.c
projects/altix/sys/netinet/sctp_timer.c
projects/altix/sys/netinet/sctp_usrreq.c
projects/altix/sys/netinet/sctp_var.h
projects/altix/sys/netinet/sctputil.c
projects/altix/sys/netinet/tcp_input.c
projects/altix/sys/netinet/tcp_subr.c
projects/altix/sys/netinet/tcp_timewait.c
projects/altix/sys/netipsec/key.c
projects/altix/sys/nfsclient/nfs_bio.c
projects/altix/sys/nfsclient/nfs_kdtrace.c
projects/altix/sys/nfsclient/nfs_subs.c
projects/altix/sys/nfsclient/nfs_vnops.c
projects/altix/sys/pc98/cbus/syscons_cbus.c
projects/altix/sys/powerpc/conf/GENERIC
projects/altix/sys/powerpc/include/vmparam.h
projects/altix/sys/powerpc/mpc85xx/isa.c
projects/altix/sys/powerpc/powermac/macio.c
projects/altix/sys/powerpc/powermac/maciovar.h
projects/altix/sys/powerpc/powerpc/intr_machdep.c
projects/altix/sys/sparc64/include/asmacros.h
projects/altix/sys/sparc64/include/vmparam.h
projects/altix/sys/sparc64/isa/isa.c
projects/altix/sys/sparc64/sparc64/autoconf.c
projects/altix/sys/sparc64/sparc64/genassym.c
projects/altix/sys/sparc64/sparc64/mem.c
projects/altix/sys/sys/elf_common.h
projects/altix/sys/sys/kdb.h
projects/altix/sys/sys/param.h
projects/altix/sys/sys/priority.h
projects/altix/sys/sys/queue.h
projects/altix/sys/sys/systm.h
projects/altix/sys/sys/user.h
projects/altix/sys/teken/teken.c
projects/altix/sys/teken/teken.h
projects/altix/sys/ufs/ffs/ffs_softdep.c
projects/altix/sys/vm/vm_kern.c
projects/altix/sys/vm/vm_object.c
projects/altix/sys/x86/isa/clock.c
projects/altix/sys/x86/isa/isa.c
projects/altix/sys/x86/x86/tsc.c
Directory Properties:
projects/altix/lib/libstand/ (props changed)
projects/altix/sys/ (props changed)
projects/altix/sys/amd64/include/xen/ (props changed)
projects/altix/sys/boot/i386/efi/ (props changed)
projects/altix/sys/boot/ia64/efi/ (props changed)
projects/altix/sys/boot/ia64/ski/ (props changed)
projects/altix/sys/boot/powerpc/boot1.chrp/ (props changed)
projects/altix/sys/boot/powerpc/ofw/ (props changed)
projects/altix/sys/cddl/contrib/opensolaris/ (props changed)
projects/altix/sys/conf/ (props changed)
projects/altix/sys/contrib/dev/acpica/ (props changed)
projects/altix/sys/contrib/octeon-sdk/ (props changed)
projects/altix/sys/contrib/pf/ (props changed)
projects/altix/sys/contrib/x86emu/ (props changed)
projects/altix/sys/kern/subr_busdma.c (props changed)
Modified: projects/altix/sys/Makefile
==============================================================================
--- projects/altix/sys/Makefile Sat May 14 20:35:01 2011 (r221914)
+++ projects/altix/sys/Makefile Sat May 14 20:48:23 2011 (r221915)
@@ -14,7 +14,7 @@ CSCOPEDIRS= boot bsm cam cddl compat con
netsmb nfs nfsclient nfsserver nlm opencrypto \
pci rpc security sys ufs vm xdr ${CSCOPE_ARCHDIR}
.if defined(ALL_ARCH)
-CSCOPE_ARCHDIR ?= amd64 arm i386 ia64 mips pc98 powerpc sparc64 sun4v x86
+CSCOPE_ARCHDIR ?= amd64 arm i386 ia64 mips pc98 powerpc sparc64 x86
.else
CSCOPE_ARCHDIR ?= ${MACHINE}
.endif
Modified: projects/altix/sys/amd64/amd64/machdep.c
==============================================================================
--- projects/altix/sys/amd64/amd64/machdep.c Sat May 14 20:35:01 2011 (r221914)
+++ projects/altix/sys/amd64/amd64/machdep.c Sat May 14 20:48:23 2011 (r221915)
@@ -1298,9 +1298,6 @@ add_smap_entry(struct bios_smap *smap, v
* available physical memory in the system, then test this memory and
* build the phys_avail array describing the actually-available memory.
*
- * If we cannot accurately determine the physical memory map, then use
- * value from the 0xE801 call, and failing that, the RTC.
- *
* Total memory size may be set by the kernel environment variable
* hw.physmem or the compile-time define MAXMEM.
*
Modified: projects/altix/sys/amd64/amd64/mp_machdep.c
==============================================================================
--- projects/altix/sys/amd64/amd64/mp_machdep.c Sat May 14 20:35:01 2011 (r221914)
+++ projects/altix/sys/amd64/amd64/mp_machdep.c Sat May 14 20:48:23 2011 (r221915)
@@ -176,11 +176,34 @@ mem_range_AP_init(void)
static void
topo_probe_amd(void)
{
+ int core_id_bits;
+ int id;
/* AMD processors do not support HTT. */
- cpu_cores = (amd_feature2 & AMDID2_CMP) != 0 ?
- (cpu_procinfo2 & AMDID_CMP_CORES) + 1 : 1;
cpu_logical = 1;
+
+ if ((amd_feature2 & AMDID2_CMP) == 0) {
+ cpu_cores = 1;
+ return;
+ }
+
+ core_id_bits = (cpu_procinfo2 & AMDID_COREID_SIZE) >>
+ AMDID_COREID_SIZE_SHIFT;
+ if (core_id_bits == 0) {
+ cpu_cores = (cpu_procinfo2 & AMDID_CMP_CORES) + 1;
+ return;
+ }
+
+ /* Fam 10h and newer should get here. */
+ for (id = 0; id <= MAX_APIC_ID; id++) {
+ /* Check logical CPU availability. */
+ if (!cpu_info[id].cpu_present || cpu_info[id].cpu_disabled)
+ continue;
+ /* Check if logical CPU has the same package ID. */
+ if ((id >> core_id_bits) != (boot_cpu_id >> core_id_bits))
+ continue;
+ cpu_cores++;
+ }
}
/*
Modified: projects/altix/sys/amd64/conf/GENERIC
==============================================================================
--- projects/altix/sys/amd64/conf/GENERIC Sat May 14 20:35:01 2011 (r221914)
+++ projects/altix/sys/amd64/conf/GENERIC Sat May 14 20:48:23 2011 (r221915)
@@ -165,6 +165,7 @@ device splash # Splash screen and scre
# syscons is the default console driver, resembling an SCO console
device sc
+options SC_PIXEL_MODE # add support for the raster text mode
device agp # support several AGP chipsets
Modified: projects/altix/sys/amd64/include/clock.h
==============================================================================
--- projects/altix/sys/amd64/include/clock.h Sat May 14 20:35:01 2011 (r221914)
+++ projects/altix/sys/amd64/include/clock.h Sat May 14 20:48:23 2011 (r221915)
@@ -29,7 +29,6 @@ void i8254_init(void);
void startrtclock(void);
void init_TSC(void);
-void init_TSC_tc(void);
#define HAS_TIMER_SPKR 1
int timer_spkr_acquire(void);
Modified: projects/altix/sys/amd64/include/specialreg.h
==============================================================================
--- projects/altix/sys/amd64/include/specialreg.h Sat May 14 20:35:01 2011 (r221914)
+++ projects/altix/sys/amd64/include/specialreg.h Sat May 14 20:48:23 2011 (r221915)
@@ -228,6 +228,8 @@
* AMD extended function 8000_0008h ecx info
*/
#define AMDID_CMP_CORES 0x000000ff
+#define AMDID_COREID_SIZE 0x0000f000
+#define AMDID_COREID_SIZE_SHIFT 12
/*
* CPUID manufacturers identifiers
Modified: projects/altix/sys/amd64/include/vmparam.h
==============================================================================
--- projects/altix/sys/amd64/include/vmparam.h Sat May 14 20:35:01 2011 (r221914)
+++ projects/altix/sys/amd64/include/vmparam.h Sat May 14 20:48:23 2011 (r221915)
@@ -212,4 +212,6 @@
#define VM_INITIAL_PAGEIN 16
#endif
+#define ZERO_REGION_SIZE (2 * 1024 * 1024) /* 2MB */
+
#endif /* _MACHINE_VMPARAM_H_ */
Modified: projects/altix/sys/arm/arm/pmap.c
==============================================================================
--- projects/altix/sys/arm/arm/pmap.c Sat May 14 20:35:01 2011 (r221914)
+++ projects/altix/sys/arm/arm/pmap.c Sat May 14 20:48:23 2011 (r221915)
@@ -3646,7 +3646,7 @@ pmap_change_wiring(pmap_t pmap, vm_offse
pte = *ptep;
pg = PHYS_TO_VM_PAGE(l2pte_pa(pte));
if (pg)
- pmap_modify_pv(pg, pmap, va, PVF_WIRED, wired);
+ pmap_modify_pv(pg, pmap, va, PVF_WIRED, wired ? PVF_WIRED : 0);
vm_page_unlock_queues();
PMAP_UNLOCK(pmap);
}
Modified: projects/altix/sys/arm/include/vmparam.h
==============================================================================
--- projects/altix/sys/arm/include/vmparam.h Sat May 14 20:35:01 2011 (r221914)
+++ projects/altix/sys/arm/include/vmparam.h Sat May 14 20:48:23 2011 (r221915)
@@ -150,4 +150,7 @@
#ifdef ARM_USE_SMALL_ALLOC
#define UMA_MD_SMALL_ALLOC
#endif /* ARM_USE_SMALL_ALLOC */
+
+#define ZERO_REGION_SIZE (64 * 1024) /* 64KB */
+
#endif /* _MACHINE_VMPARAM_H_ */
Modified: projects/altix/sys/boot/Makefile
==============================================================================
--- projects/altix/sys/boot/Makefile Sat May 14 20:35:01 2011 (r221914)
+++ projects/altix/sys/boot/Makefile Sat May 14 20:48:23 2011 (r221915)
@@ -13,7 +13,7 @@ SUBDIR+= fdt
.endif
# Pick the machine-dependent subdir based on the target architecture.
-ADIR= ${MACHINE:S/amd64/i386/:S/sun4v/sparc64/:S/powerpc64/powerpc/}
+ADIR= ${MACHINE:S/amd64/i386/:S/powerpc64/powerpc/}
.if exists(${.CURDIR}/${ADIR}/.)
SUBDIR+= ${ADIR}
.endif
Modified: projects/altix/sys/boot/common/interp.c
==============================================================================
--- projects/altix/sys/boot/common/interp.c Sat May 14 20:35:01 2011 (r221914)
+++ projects/altix/sys/boot/common/interp.c Sat May 14 20:48:23 2011 (r221915)
@@ -105,7 +105,7 @@ interact(void)
/*
* Read our default configuration
*/
- if(include("/boot/loader.rc")!=CMD_OK)
+ if (include("/boot/loader.rc") != CMD_OK)
include("/boot/boot.conf");
printf("\n");
/*
Modified: projects/altix/sys/boot/common/loader.8
==============================================================================
--- projects/altix/sys/boot/common/loader.8 Sat May 14 20:35:01 2011 (r221914)
+++ projects/altix/sys/boot/common/loader.8 Sat May 14 20:48:23 2011 (r221915)
@@ -597,7 +597,7 @@ Modifies kernel option
Limits the amount of KVM reserved for use by the
buffer cache, specified in bytes.
The default maximum is 200MB on i386,
-and 400MB on amd64, sparc64, and sun4v.
+and 400MB on amd64 and sparc64.
This parameter is used to
prevent the buffer cache from eating too much
KVM in large-memory machine configurations.
Modified: projects/altix/sys/boot/sparc64/loader/main.c
==============================================================================
--- projects/altix/sys/boot/sparc64/loader/main.c Sat May 14 20:35:01 2011 (r221914)
+++ projects/altix/sys/boot/sparc64/loader/main.c Sat May 14 20:48:23 2011 (r221915)
@@ -113,13 +113,11 @@ static int map_phys(int, size_t, vm_offs
static void release_phys(vm_offset_t, u_int);
static int __elfN(exec)(struct preloaded_file *);
static int mmu_mapin_sun4u(vm_offset_t, vm_size_t);
-static int mmu_mapin_sun4v(vm_offset_t, vm_size_t);
static vm_offset_t init_heap(void);
static phandle_t find_bsp_sun4u(phandle_t, uint32_t);
const char *cpu_cpuid_prop_sun4u(void);
uint32_t cpu_get_mid_sun4u(void);
static void tlb_init_sun4u(void);
-static void tlb_init_sun4v(void);
#ifdef LOADER_DEBUG
typedef u_int64_t tte_t;
@@ -129,7 +127,6 @@ static void pmap_print_tte_sun4u(tte_t,
#endif
static struct mmu_ops mmu_ops_sun4u = { tlb_init_sun4u, mmu_mapin_sun4u };
-static struct mmu_ops mmu_ops_sun4v = { tlb_init_sun4v, mmu_mapin_sun4v };
/* sun4u */
struct tlb_entry *dtlb_store;
@@ -140,16 +137,6 @@ static int cpu_impl;
static u_int dtlb_slot_max;
static u_int itlb_slot_max;
-/* sun4v */
-static struct tlb_entry *tlb_store;
-static int is_sun4v = 0;
-/*
- * no direct TLB access on sun4v
- * we somewhat arbitrarily declare enough
- * slots to cover a 4GB AS with 4MB pages
- */
-#define SUN4V_TLB_SLOT_MAX (1 << 10)
-
static vm_offset_t curkva = 0;
static vm_offset_t heapva;
@@ -568,47 +555,6 @@ mmu_mapin_sun4u(vm_offset_t va, vm_size_
return (0);
}
-static int
-mmu_mapin_sun4v(vm_offset_t va, vm_size_t len)
-{
- vm_offset_t pa, mva;
-
- if (va + len > curkva)
- curkva = va + len;
-
- pa = (vm_offset_t)-1;
- len += va & PAGE_MASK_4M;
- va &= ~PAGE_MASK_4M;
- while (len) {
- if ((va >> 22) > SUN4V_TLB_SLOT_MAX)
- panic("%s: trying to map more than 4GB", __func__);
- if (tlb_store[va >> 22].te_pa == -1) {
- /* Allocate a physical page, claim the virtual area */
- if (pa == (vm_offset_t)-1) {
- pa = alloc_phys(PAGE_SIZE_4M, PAGE_SIZE_4M);
- if (pa == (vm_offset_t)-1)
- panic("%s: out of memory", __func__);
- mva = claim_virt(va, PAGE_SIZE_4M, 0);
- if (mva != va)
- panic("%s: can't claim virtual page "
- "(wanted %#lx, got %#lx)",
- __func__, va, mva);
- }
-
- tlb_store[va >> 22].te_pa = pa;
- if (map_phys(-1, PAGE_SIZE_4M, va, pa) == -1)
- printf("%s: can't map physical page\n",
- __func__);
- pa = (vm_offset_t)-1;
- }
- len -= len > PAGE_SIZE_4M ? PAGE_SIZE_4M : len;
- va += PAGE_SIZE_4M;
- }
- if (pa != (vm_offset_t)-1)
- release_phys(pa, PAGE_SIZE_4M);
- return (0);
-}
-
static vm_offset_t
init_heap(void)
{
@@ -739,14 +685,6 @@ tlb_init_sun4u(void)
panic("%s: can't allocate TLB store", __func__);
}
-static void
-tlb_init_sun4v(void)
-{
-
- tlb_store = malloc(SUN4V_TLB_SLOT_MAX * sizeof(*tlb_store));
- memset(tlb_store, 0xFF, SUN4V_TLB_SLOT_MAX * sizeof(*tlb_store));
-}
-
int
main(int (*openfirm)(void *))
{
@@ -777,14 +715,7 @@ main(int (*openfirm)(void *))
if ((root = OF_peer(0)) == -1)
panic("%s: can't get root phandle", __func__);
OF_getprop(root, "compatible", compatible, sizeof(compatible));
- if (!strcmp(compatible, "sun4v")) {
- printf("\nBooting with sun4v support.\n");
- mmu_ops = &mmu_ops_sun4v;
- is_sun4v = 1;
- } else {
- printf("\nBooting with sun4u support.\n");
- mmu_ops = &mmu_ops_sun4u;
- }
+ mmu_ops = &mmu_ops_sun4u;
mmu_ops->tlb_init();
Modified: projects/altix/sys/cam/scsi/scsi_cd.c
==============================================================================
--- projects/altix/sys/cam/scsi/scsi_cd.c Sat May 14 20:35:01 2011 (r221914)
+++ projects/altix/sys/cam/scsi/scsi_cd.c Sat May 14 20:48:23 2011 (r221915)
@@ -2138,7 +2138,7 @@ cdioctl(struct disk *dp, u_long cmd, voi
("trying to do CDIOREADTOCHEADER\n"));
error = cdreadtoc(periph, 0, 0, (u_int8_t *)th,
- sizeof (*th), /*sense_flags*/0);
+ sizeof (*th), /*sense_flags*/SF_NO_PRINT);
if (error) {
free(th, M_SCSICD);
cam_periph_unlock(periph);
Modified: projects/altix/sys/cddl/dev/dtrace/amd64/dtrace_subr.c
==============================================================================
--- projects/altix/sys/cddl/dev/dtrace/amd64/dtrace_subr.c Sat May 14 20:35:01 2011 (r221914)
+++ projects/altix/sys/cddl/dev/dtrace/amd64/dtrace_subr.c Sat May 14 20:48:23 2011 (r221915)
@@ -359,26 +359,6 @@ static uint64_t nsec_scale;
#define SCALE_SHIFT 28
static void
-dtrace_gethrtime_init_sync(void *arg)
-{
-#ifdef CHECK_SYNC
- /*
- * Delay this function from returning on one
- * of the CPUs to check that the synchronisation
- * works.
- */
- uintptr_t cpu = (uintptr_t) arg;
-
- if (cpu == curcpu) {
- int i;
- for (i = 0; i < 1000000000; i++)
- tgt_cpu_tsc = rdtsc();
- tgt_cpu_tsc = 0;
- }
-#endif
-}
-
-static void
dtrace_gethrtime_init_cpu(void *arg)
{
uintptr_t cpu = (uintptr_t) arg;
@@ -434,7 +414,7 @@ dtrace_gethrtime_init(void *arg)
pc = pcpu_find(i);
map = PCPU_GET(cpumask) | pc->pc_cpumask;
- smp_rendezvous_cpus(map, dtrace_gethrtime_init_sync,
+ smp_rendezvous_cpus(map, NULL,
dtrace_gethrtime_init_cpu,
smp_no_rendevous_barrier, (void *)(uintptr_t) i);
Modified: projects/altix/sys/cddl/dev/dtrace/i386/dtrace_subr.c
==============================================================================
--- projects/altix/sys/cddl/dev/dtrace/i386/dtrace_subr.c Sat May 14 20:35:01 2011 (r221914)
+++ projects/altix/sys/cddl/dev/dtrace/i386/dtrace_subr.c Sat May 14 20:48:23 2011 (r221915)
@@ -359,26 +359,6 @@ static uint64_t nsec_scale;
#define SCALE_SHIFT 28
static void
-dtrace_gethrtime_init_sync(void *arg)
-{
-#ifdef CHECK_SYNC
- /*
- * Delay this function from returning on one
- * of the CPUs to check that the synchronisation
- * works.
- */
- uintptr_t cpu = (uintptr_t) arg;
-
- if (cpu == curcpu) {
- int i;
- for (i = 0; i < 1000000000; i++)
- tgt_cpu_tsc = rdtsc();
- tgt_cpu_tsc = 0;
- }
-#endif
-}
-
-static void
dtrace_gethrtime_init_cpu(void *arg)
{
uintptr_t cpu = (uintptr_t) arg;
@@ -434,7 +414,7 @@ dtrace_gethrtime_init(void *arg)
pc = pcpu_find(i);
map = PCPU_GET(cpumask) | pc->pc_cpumask;
- smp_rendezvous_cpus(map, dtrace_gethrtime_init_sync,
+ smp_rendezvous_cpus(map, NULL,
dtrace_gethrtime_init_cpu,
smp_no_rendevous_barrier, (void *)(uintptr_t) i);
Modified: projects/altix/sys/conf/kern.mk
==============================================================================
--- projects/altix/sys/conf/kern.mk Sat May 14 20:35:01 2011 (r221914)
+++ projects/altix/sys/conf/kern.mk Sat May 14 20:48:23 2011 (r221915)
@@ -25,11 +25,21 @@ CWARNFLAGS?= -Wall -Wredundant-decls -Wn
# operations inside the kernel itself. These operations are exclusively
# reserved for user applications.
#
+# gcc:
+# Setting -mno-mmx implies -mno-3dnow
+# Setting -mno-sse implies -mno-sse2, -mno-sse3 and -mno-ssse3
+#
+# clang:
+# Setting -mno-mmx implies -mno-3dnow, -mno-3dnowa, -mno-sse, -mno-sse2,
+# -mno-sse3, -mno-ssse3, -mno-sse41 and -mno-sse42
+#
.if ${MACHINE_CPUARCH} == "i386"
.if ${CC:T:Mclang} != "clang"
-CFLAGS+= -mno-align-long-strings -mpreferred-stack-boundary=2
+CFLAGS+= -mno-align-long-strings -mpreferred-stack-boundary=2 -mno-sse
+.else
+CFLAGS+= -mno-aes -mno-avx
.endif
-CFLAGS+= -mno-mmx -mno-3dnow -mno-sse -mno-sse2 -mno-sse3 -msoft-float
+CFLAGS+= -mno-mmx -msoft-float
INLINE_LIMIT?= 8000
.endif
@@ -61,10 +71,23 @@ INLINE_LIMIT?= 15000
# operations inside the kernel itself. These operations are exclusively
# reserved for user applications.
#
+# gcc:
+# Setting -mno-mmx implies -mno-3dnow
+# Setting -mno-sse implies -mno-sse2, -mno-sse3, -mno-ssse3 and -mfpmath=387
+#
+# clang:
+# Setting -mno-mmx implies -mno-3dnow, -mno-3dnowa, -mno-sse, -mno-sse2,
+# -mno-sse3, -mno-ssse3, -mno-sse41 and -mno-sse42
+# (-mfpmath= is not supported)
+#
.if ${MACHINE_CPUARCH} == "amd64"
-CFLAGS+= -mcmodel=kernel -mno-red-zone \
- -mfpmath=387 -mno-mmx -mno-3dnow -mno-sse -mno-sse2 -mno-sse3 \
- -msoft-float -fno-asynchronous-unwind-tables
+.if ${CC:T:Mclang} != "clang"
+CFLAGS+= -mno-sse
+.else
+CFLAGS+= -mno-aes -mno-avx
+.endif
+CFLAGS+= -mcmodel=kernel -mno-red-zone -mno-mmx -msoft-float \
+ -fno-asynchronous-unwind-tables
INLINE_LIMIT?= 8000
.endif
Modified: projects/altix/sys/dev/ahci/ahci.c
==============================================================================
--- projects/altix/sys/dev/ahci/ahci.c Sat May 14 20:35:01 2011 (r221914)
+++ projects/altix/sys/dev/ahci/ahci.c Sat May 14 20:48:23 2011 (r221915)
@@ -164,10 +164,18 @@ static struct {
{0x1c038086, 0x00, "Intel Cougar Point", 0},
{0x1c048086, 0x00, "Intel Cougar Point", 0},
{0x1c058086, 0x00, "Intel Cougar Point", 0},
- {0x23238086, 0x00, "Intel DH89xxCC", 0},
{0x1d028086, 0x00, "Intel Patsburg", 0},
{0x1d048086, 0x00, "Intel Patsburg", 0},
{0x1d068086, 0x00, "Intel Patsburg", 0},
+ {0x1e028086, 0x00, "Intel Panther Point", 0},
+ {0x1e038086, 0x00, "Intel Panther Point", 0},
+ {0x1e048086, 0x00, "Intel Panther Point", 0},
+ {0x1e058086, 0x00, "Intel Panther Point", 0},
+ {0x1e068086, 0x00, "Intel Panther Point", 0},
+ {0x1e078086, 0x00, "Intel Panther Point", 0},
+ {0x1e0e8086, 0x00, "Intel Panther Point", 0},
+ {0x1e0f8086, 0x00, "Intel Panther Point", 0},
+ {0x23238086, 0x00, "Intel DH89xxCC", 0},
{0x2361197b, 0x00, "JMicron JMB361", AHCI_Q_NOFORCE},
{0x2363197b, 0x00, "JMicron JMB363", AHCI_Q_NOFORCE},
{0x2365197b, 0x00, "JMicron JMB365", AHCI_Q_NOFORCE},
Modified: projects/altix/sys/dev/ata/ata-pci.h
==============================================================================
--- projects/altix/sys/dev/ata/ata-pci.h Sat May 14 20:35:01 2011 (r221914)
+++ projects/altix/sys/dev/ata/ata-pci.h Sat May 14 20:48:23 2011 (r221915)
@@ -233,6 +233,19 @@ struct ata_pci_controller {
#define ATA_PBG_R2 0x1d068086
#define ATA_PBG_S2 0x1d088086
+#define ATA_PPT_S1 0x1e008086
+#define ATA_PPT_S2 0x1e018086
+#define ATA_PPT_AH1 0x1e028086
+#define ATA_PPT_AH2 0x1e038086
+#define ATA_PPT_R1 0x1e048086
+#define ATA_PPT_R2 0x1e058086
+#define ATA_PPT_R3 0x1e068086
+#define ATA_PPT_R4 0x1e078086
+#define ATA_PPT_S3 0x1e088086
+#define ATA_PPT_S4 0x1e098086
+#define ATA_PPT_R5 0x1e0e8086
+#define ATA_PPT_R6 0x1e0f8086
+
#define ATA_I31244 0x32008086
#define ATA_ISCH 0x811a8086
#define ATA_DH89XXCC 0x23238086
Modified: projects/altix/sys/dev/ata/chipsets/ata-intel.c
==============================================================================
--- projects/altix/sys/dev/ata/chipsets/ata-intel.c Sat May 14 20:35:01 2011 (r221914)
+++ projects/altix/sys/dev/ata/chipsets/ata-intel.c Sat May 14 20:48:23 2011 (r221915)
@@ -181,6 +181,18 @@ ata_intel_probe(device_t dev)
{ ATA_PBG_R1, 0, INTEL_AHCI, 0, ATA_SA300, "Patsburg" },
{ ATA_PBG_R2, 0, INTEL_AHCI, 0, ATA_SA300, "Patsburg" },
{ ATA_PBG_S2, 0, INTEL_6CH2, 0, ATA_SA300, "Patsburg" },
+ { ATA_PPT_S1, 0, INTEL_6CH, 0, ATA_SA300, "Panther Point" },
+ { ATA_PPT_S2, 0, INTEL_6CH, 0, ATA_SA300, "Panther Point" },
+ { ATA_PPT_AH1, 0, INTEL_AHCI, 0, ATA_SA300, "Panther Point" },
+ { ATA_PPT_AH2, 0, INTEL_AHCI, 0, ATA_SA300, "Panther Point" },
+ { ATA_PPT_R1, 0, INTEL_AHCI, 0, ATA_SA300, "Panther Point" },
+ { ATA_PPT_R2, 0, INTEL_AHCI, 0, ATA_SA300, "Panther Point" },
+ { ATA_PPT_R3, 0, INTEL_AHCI, 0, ATA_SA300, "Panther Point" },
+ { ATA_PPT_R4, 0, INTEL_AHCI, 0, ATA_SA300, "Panther Point" },
+ { ATA_PPT_S3, 0, INTEL_6CH2, 0, ATA_SA300, "Panther Point" },
+ { ATA_PPT_S4, 0, INTEL_6CH2, 0, ATA_SA300, "Panther Point" },
+ { ATA_PPT_R5, 0, INTEL_AHCI, 0, ATA_SA300, "Panther Point" },
+ { ATA_PPT_R6, 0, INTEL_AHCI, 0, ATA_SA300, "Panther Point" },
{ ATA_I31244, 0, 0, 2, ATA_SA150, "31244" },
{ ATA_ISCH, 0, 0, 1, ATA_UDMA5, "SCH" },
{ ATA_DH89XXCC, 0, INTEL_AHCI, 0, ATA_SA300, "DH89xxCC" },
Modified: projects/altix/sys/dev/ath/ath_hal/ah.c
==============================================================================
--- projects/altix/sys/dev/ath/ath_hal/ah.c Sat May 14 20:35:01 2011 (r221914)
+++ projects/altix/sys/dev/ath/ath_hal/ah.c Sat May 14 20:48:23 2011 (r221915)
@@ -585,19 +585,49 @@ ath_hal_getcapability(struct ath_hal *ah
return HAL_ENOTSUPP;
case HAL_CAP_11D:
return HAL_OK;
- case HAL_CAP_RXORN_FATAL: /* HAL_INT_RXORN treated as fatal */
- return AH_PRIVATE(ah)->ah_rxornIsFatal ? HAL_OK : HAL_ENOTSUPP;
+
case HAL_CAP_HT:
return pCap->halHTSupport ? HAL_OK : HAL_ENOTSUPP;
+ case HAL_CAP_GTXTO:
+ return pCap->halGTTSupport ? HAL_OK : HAL_ENOTSUPP;
+ case HAL_CAP_FAST_CC:
+ return pCap->halFastCCSupport ? HAL_OK : HAL_ENOTSUPP;
case HAL_CAP_TX_CHAINMASK: /* mask of TX chains supported */
*result = pCap->halTxChainMask;
return HAL_OK;
case HAL_CAP_RX_CHAINMASK: /* mask of RX chains supported */
*result = pCap->halRxChainMask;
return HAL_OK;
+ case HAL_CAP_NUM_GPIO_PINS:
+ *result = pCap->halNumGpioPins;
+ return HAL_OK;
+ case HAL_CAP_CST:
+ return pCap->halCSTSupport ? HAL_OK : HAL_ENOTSUPP;
+ case HAL_CAP_RTS_AGGR_LIMIT:
+ *result = pCap->halRtsAggrLimit;
+ return HAL_OK;
+ case HAL_CAP_4ADDR_AGGR:
+ return pCap->hal4AddrAggrSupport ? HAL_OK : HAL_ENOTSUPP;
+ case HAL_CAP_AUTO_SLEEP:
+ return pCap->halAutoSleepSupport ? HAL_OK : HAL_ENOTSUPP;
+ case HAL_CAP_MBSSID_AGGR_SUPPORT:
+ return pCap->halMbssidAggrSupport ? HAL_OK : HAL_ENOTSUPP;
+ case HAL_CAP_SPLIT_4KB_TRANS: /* hardware handles descriptors straddling 4k page boundary */
+ return pCap->hal4kbSplitTransSupport ? HAL_OK : HAL_ENOTSUPP;
+ case HAL_CAP_REG_FLAG:
+ *result = AH_PRIVATE(ah)->ah_currentRDext;
+ return HAL_OK;
+ case HAL_CAP_BT_COEX:
+ return pCap->halBtCoexSupport ? HAL_OK : HAL_ENOTSUPP;
+ case HAL_CAP_HT20_SGI:
+ return pCap->halHTSGI20Support ? HAL_OK : HAL_ENOTSUPP;
case HAL_CAP_RXTSTAMP_PREC: /* rx desc tstamp precision (bits) */
*result = pCap->halTstampPrecision;
return HAL_OK;
+
+ /* FreeBSD-specific entries for now */
+ case HAL_CAP_RXORN_FATAL: /* HAL_INT_RXORN treated as fatal */
+ return AH_PRIVATE(ah)->ah_rxornIsFatal ? HAL_OK : HAL_ENOTSUPP;
case HAL_CAP_INTRMASK: /* mask of supported interrupts */
*result = pCap->halIntrMask;
return HAL_OK;
@@ -614,10 +644,6 @@ ath_hal_getcapability(struct ath_hal *ah
default:
return HAL_ENOTSUPP;
}
- case HAL_CAP_SPLIT_4KB_TRANS: /* hardware handles descriptors straddling 4k page boundary */
- return pCap->hal4kbSplitTransSupport ? HAL_OK : HAL_ENOTSUPP;
- case HAL_CAP_HAS_PSPOLL: /* hardware has ps-poll support */
- return pCap->halHasPsPollSupport ? HAL_OK : HAL_ENOTSUPP;
case HAL_CAP_RXDESC_SELFLINK: /* hardware supports self-linked final RX descriptors correctly */
return pCap->halHasRxSelfLinkedTail ? HAL_OK : HAL_ENOTSUPP;
default:
Modified: projects/altix/sys/dev/ath/ath_hal/ah.h
==============================================================================
--- projects/altix/sys/dev/ath/ath_hal/ah.h Sat May 14 20:35:01 2011 (r221914)
+++ projects/altix/sys/dev/ath/ath_hal/ah.h Sat May 14 20:48:23 2011 (r221915)
@@ -109,21 +109,41 @@ typedef enum {
HAL_CAP_TPC_ACK = 26, /* ack txpower with per-packet tpc */
HAL_CAP_TPC_CTS = 27, /* cts txpower with per-packet tpc */
HAL_CAP_11D = 28, /* 11d beacon support for changing cc */
- HAL_CAP_INTMIT = 29, /* interference mitigation */
- HAL_CAP_RXORN_FATAL = 30, /* HAL_INT_RXORN treated as fatal */
- HAL_CAP_HT = 31, /* hardware can support HT */
- HAL_CAP_TX_CHAINMASK = 32, /* mask of TX chains supported */
- HAL_CAP_RX_CHAINMASK = 33, /* mask of RX chains supported */
- HAL_CAP_RXTSTAMP_PREC = 34, /* rx desc tstamp precision (bits) */
- HAL_CAP_BB_HANG = 35, /* can baseband hang */
- HAL_CAP_MAC_HANG = 36, /* can MAC hang */
- HAL_CAP_INTRMASK = 37, /* bitmask of supported interrupts */
- HAL_CAP_BSSIDMATCH = 38, /* hardware has disable bssid match */
- HAL_CAP_STREAMS = 39, /* how many 802.11n spatial streams are available */
- HAL_CAP_SPLIT_4KB_TRANS = 40, /* hardware supports descriptors straddling a 4k page boundary */
- HAL_CAP_HAS_PSPOLL = 41, /* hardware has ps-poll support */
- HAL_CAP_RXDESC_SELFLINK = 42, /* support a self-linked tail RX descriptor */
- HAL_CAP_GTXTO = 43, /* hardware supports global tx timeout */
+
+ HAL_CAP_HT = 30, /* hardware can support HT */
+ HAL_CAP_GTXTO = 31, /* hardware supports global tx timeout */
+ HAL_CAP_FAST_CC = 32, /* hardware supports fast channel change */
+ HAL_CAP_TX_CHAINMASK = 33, /* mask of TX chains supported */
+ HAL_CAP_RX_CHAINMASK = 34, /* mask of RX chains supported */
+ HAL_CAP_NUM_GPIO_PINS = 36, /* number of GPIO pins */
+
+ HAL_CAP_CST = 38, /* hardware supports carrier sense timeout */
+
+ HAL_CAP_RTS_AGGR_LIMIT = 42, /* aggregation limit with RTS */
+ HAL_CAP_4ADDR_AGGR = 43, /* hardware is capable of 4addr aggregation */
+
+ HAL_CAP_AUTO_SLEEP = 48, /* hardware can go to network sleep
+ automatically after waking up to receive TIM */
+ HAL_CAP_MBSSID_AGGR_SUPPORT = 49, /* Support for mBSSID Aggregation */
+ HAL_CAP_SPLIT_4KB_TRANS = 50, /* hardware supports descriptors straddling a 4k page boundary */
+ HAL_CAP_REG_FLAG = 51, /* Regulatory domain flags */
+
+ HAL_CAP_BT_COEX = 60, /* hardware is capable of bluetooth coexistence */
+
+ HAL_CAP_HT20_SGI = 96, /* hardware supports HT20 short GI */
+
+ HAL_CAP_RXTSTAMP_PREC = 100, /* rx desc tstamp precision (bits) */
+
+ /* The following are private to the FreeBSD HAL (224 onward) */
+
+ HAL_CAP_INTMIT = 229, /* interference mitigation */
+ HAL_CAP_RXORN_FATAL = 230, /* HAL_INT_RXORN treated as fatal */
+ HAL_CAP_BB_HANG = 235, /* can baseband hang */
+ HAL_CAP_MAC_HANG = 236, /* can MAC hang */
+ HAL_CAP_INTRMASK = 237, /* bitmask of supported interrupts */
+ HAL_CAP_BSSIDMATCH = 238, /* hardware has disable bssid match */
+ HAL_CAP_STREAMS = 239, /* how many 802.11n spatial streams are available */
+ HAL_CAP_RXDESC_SELFLINK = 242, /* support a self-linked tail RX descriptor */
} HAL_CAPABILITY_TYPE;
/*
Modified: projects/altix/sys/dev/ath/ath_hal/ah_debug.h
==============================================================================
--- projects/altix/sys/dev/ath/ath_hal/ah_debug.h Sat May 14 20:35:01 2011 (r221914)
+++ projects/altix/sys/dev/ath/ath_hal/ah_debug.h Sat May 14 20:48:23 2011 (r221915)
@@ -45,7 +45,10 @@ enum {
HAL_DEBUG_GPIO = 0x00040000, /* GPIO debugging */
HAL_DEBUG_INTERRUPT = 0x00080000, /* interrupt handling */
HAL_DEBUG_DIVERSITY = 0x00100000, /* diversity debugging */
+ HAL_DEBUG_DFS = 0x00200000, /* DFS debugging */
+ HAL_DEBUG_HANG = 0x00400000, /* BB/MAC hang debugging */
+ HAL_DEBUG_UNMASKABLE = 0xf0000000, /* always printed */
HAL_DEBUG_ANY = 0xffffffff
};
#endif /* _ATH_AH_DEBUG_H_ */
Modified: projects/altix/sys/dev/ath/ath_hal/ah_eeprom.h
==============================================================================
--- projects/altix/sys/dev/ath/ath_hal/ah_eeprom.h Sat May 14 20:35:01 2011 (r221914)
+++ projects/altix/sys/dev/ath/ath_hal/ah_eeprom.h Sat May 14 20:48:23 2011 (r221915)
@@ -133,4 +133,5 @@ HAL_STATUS ath_hal_v1EepromAttach(struct
HAL_STATUS ath_hal_legacyEepromAttach(struct ath_hal *ah);
HAL_STATUS ath_hal_v14EepromAttach(struct ath_hal *ah);
HAL_STATUS ath_hal_v4kEepromAttach(struct ath_hal *ah);
+HAL_STATUS ath_hal_9287EepromAttach(struct ath_hal *ah);
#endif /* _ATH_AH_EEPROM_H_ */
Copied: projects/altix/sys/dev/ath/ath_hal/ah_eeprom_9287.c (from r221894, head/sys/dev/ath/ath_hal/ah_eeprom_9287.c)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ projects/altix/sys/dev/ath/ath_hal/ah_eeprom_9287.c Sat May 14 20:48:23 2011 (r221915, copy of r221894, head/sys/dev/ath/ath_hal/ah_eeprom_9287.c)
@@ -0,0 +1,405 @@
+/*
+ * Copyright (c) 2008 Sam Leffler, Errno Consulting
+ * Copyright (c) 2010 Atheros Communications, Inc.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ * $FreeBSD$
+ */
+#include "opt_ah.h"
+
+#include "ah.h"
+#include "ah_internal.h"
+#include "ah_eeprom_v14.h"
+#include "ah_eeprom_9287.h"
+
+static HAL_STATUS
+v9287EepromGet(struct ath_hal *ah, int param, void *val)
+{
+#define CHAN_A_IDX 0
+#define CHAN_B_IDX 1
+#define IS_VERS(op, v) ((pBase->version & AR5416_EEP_VER_MINOR_MASK) op (v))
+ HAL_EEPROM_9287 *ee = AH_PRIVATE(ah)->ah_eeprom;
+ const MODAL_EEP_9287_HEADER *pModal = &ee->ee_base.modalHeader;
+ const BASE_EEP_9287_HEADER *pBase = &ee->ee_base.baseEepHeader;
+ uint32_t sum;
+ uint8_t *macaddr;
+ int i;
+
+ switch (param) {
+ case AR_EEP_NFTHRESH_2:
+ *(int16_t *)val = pModal->noiseFloorThreshCh[0];
+ return HAL_OK;
+ case AR_EEP_MACADDR: /* Get MAC Address */
+ sum = 0;
+ macaddr = val;
+ for (i = 0; i < 6; i++) {
+ macaddr[i] = pBase->macAddr[i];
+ sum += pBase->macAddr[i];
+ }
+ if (sum == 0 || sum == 0xffff*3) {
+ HALDEBUG(ah, HAL_DEBUG_ANY, "%s: bad mac address %s\n",
+ __func__, ath_hal_ether_sprintf(macaddr));
+ return HAL_EEBADMAC;
+ }
+ return HAL_OK;
+ case AR_EEP_REGDMN_0:
+ return pBase->regDmn[0];
+ case AR_EEP_REGDMN_1:
+ return pBase->regDmn[1];
+ case AR_EEP_OPCAP:
+ return pBase->deviceCap;
+ case AR_EEP_OPMODE:
+ return pBase->opCapFlags;
+ case AR_EEP_RFSILENT:
+ return pBase->rfSilent;
+#if 0
+ case AR_EEP_OB_5:
+ return pModal[CHAN_A_IDX].ob;
+ case AR_EEP_DB_5:
+ return pModal[CHAN_A_IDX].db;
+ case AR_EEP_OB_2:
+ return pModal[CHAN_B_IDX].ob;
+ case AR_EEP_DB_2:
+ return pModal[CHAN_B_IDX].db;
+#endif
+ case AR_EEP_TXMASK:
+ return pBase->txMask;
+ case AR_EEP_RXMASK:
+ return pBase->rxMask;
+#if 0
+ case AR_EEP_RXGAIN_TYPE:
+ return IS_VERS(>=, AR5416_EEP_MINOR_VER_17) ?
+ pBase->rxGainType : AR5416_EEP_RXGAIN_ORIG;
+ case AR_EEP_TXGAIN_TYPE:
+ return IS_VERS(>=, AR5416_EEP_MINOR_VER_19) ?
+ pBase->txGainType : AR5416_EEP_TXGAIN_ORIG;
+#endif
+ case AR_EEP_OL_PWRCTRL:
+ HALASSERT(val == AH_NULL);
+ return pBase->openLoopPwrCntl ? HAL_OK : HAL_EIO;
+ case AR_EEP_AMODE:
+ return HAL_EIO; /* no 5GHz for Kiwi */
+ case AR_EEP_BMODE:
+ case AR_EEP_GMODE:
+ HALASSERT(val == AH_NULL);
+ return pBase->opCapFlags & AR5416_OPFLAGS_11G ?
+ HAL_OK : HAL_EIO;
+ case AR_EEP_32KHZCRYSTAL:
+ case AR_EEP_COMPRESS:
+ case AR_EEP_FASTFRAME: /* XXX policy decision, h/w can do it */
+ case AR_EEP_WRITEPROTECT: /* NB: no write protect bit */
+ HALASSERT(val == AH_NULL);
+ /* fall thru... */
+ case AR_EEP_MAXQCU: /* NB: not in opCapFlags */
+ case AR_EEP_KCENTRIES: /* NB: not in opCapFlags */
+ return HAL_EIO;
+ case AR_EEP_AES:
+ case AR_EEP_BURST:
+ case AR_EEP_RFKILL:
+ case AR_EEP_TURBO5DISABLE:
+ case AR_EEP_TURBO2DISABLE:
+ HALASSERT(val == AH_NULL);
+ return HAL_OK;
+ case AR_EEP_ANTGAINMAX_2:
+ *(int8_t *) val = ee->ee_antennaGainMax[1];
+ return HAL_OK;
+ case AR_EEP_PWR_TABLE_OFFSET:
+ *(int8_t *) val = pBase->pwrTableOffset;
+ return HAL_OK;
+ default:
+ HALASSERT(0);
+ return HAL_EINVAL;
+ }
+#undef IS_VERS
+#undef CHAN_A_IDX
+#undef CHAN_B_IDX
+}
+
+static HAL_BOOL
+v9287EepromSet(struct ath_hal *ah, int param, int v)
+{
+ HAL_EEPROM_9287 *ee = AH_PRIVATE(ah)->ah_eeprom;
+
+ switch (param) {
+ case AR_EEP_ANTGAINMAX_2:
+ ee->ee_antennaGainMax[1] = (int8_t) v;
+ return HAL_OK;
+ case AR_EEP_ANTGAINMAX_5:
+ ee->ee_antennaGainMax[0] = (int8_t) v;
+ return HAL_OK;
+ }
+ return HAL_EINVAL;
+}
+
+static HAL_BOOL
+v9287EepromDiag(struct ath_hal *ah, int request,
+ const void *args, uint32_t argsize, void **result, uint32_t *resultsize)
+{
+ HAL_EEPROM_9287 *ee = AH_PRIVATE(ah)->ah_eeprom;
+
+ switch (request) {
+ case HAL_DIAG_EEPROM:
+ *result = ee;
+ *resultsize = sizeof(HAL_EEPROM_9287);
+ return AH_TRUE;
+ }
+ return AH_FALSE;
+}
+
+/* Do structure specific swaps if Eeprom format is non native to host */
+static void
+eepromSwap(HAL_EEPROM_9287 *ee)
+{
+ uint32_t integer, i;
+ uint16_t word;
+ MODAL_EEP_9287_HEADER *pModal;
+
+ /* convert Base Eep header */
+ word = __bswap16(ee->ee_base.baseEepHeader.length);
+ ee->ee_base.baseEepHeader.length = word;
+
+ word = __bswap16(ee->ee_base.baseEepHeader.checksum);
+ ee->ee_base.baseEepHeader.checksum = word;
+
+ word = __bswap16(ee->ee_base.baseEepHeader.version);
+ ee->ee_base.baseEepHeader.version = word;
+
+ word = __bswap16(ee->ee_base.baseEepHeader.regDmn[0]);
+ ee->ee_base.baseEepHeader.regDmn[0] = word;
+
+ word = __bswap16(ee->ee_base.baseEepHeader.regDmn[1]);
+ ee->ee_base.baseEepHeader.regDmn[1] = word;
+
+ word = __bswap16(ee->ee_base.baseEepHeader.rfSilent);
+ ee->ee_base.baseEepHeader.rfSilent = word;
+
+ word = __bswap16(ee->ee_base.baseEepHeader.blueToothOptions);
+ ee->ee_base.baseEepHeader.blueToothOptions = word;
+
+ word = __bswap16(ee->ee_base.baseEepHeader.deviceCap);
+ ee->ee_base.baseEepHeader.deviceCap = word;
+
+ /* convert Modal Eep header */
+
+ /* only 2.4ghz here; so only one modal header entry */
+ pModal = &ee->ee_base.modalHeader;
+
+ /* XXX linux/ah_osdep.h only defines __bswap32 for BE */
+ integer = __bswap32(pModal->antCtrlCommon);
+ pModal->antCtrlCommon = integer;
+
+ for (i = 0; i < AR9287_MAX_CHAINS; i++) {
+ integer = __bswap32(pModal->antCtrlChain[i]);
+ pModal->antCtrlChain[i] = integer;
+ }
+ for (i = 0; i < AR5416_EEPROM_MODAL_SPURS; i++) {
+ word = __bswap16(pModal->spurChans[i].spurChan);
+ pModal->spurChans[i].spurChan = word;
+ }
+}
+
+static uint16_t
+v9287EepromGetSpurChan(struct ath_hal *ah, int ix, HAL_BOOL is2GHz)
+{
+ HAL_EEPROM_9287 *ee = AH_PRIVATE(ah)->ah_eeprom;
+
+ HALASSERT(is2GHz == AH_TRUE);
+ if (is2GHz != AH_TRUE)
+ return 0; /* XXX ? */
+
+ HALASSERT(0 <= ix && ix < AR5416_EEPROM_MODAL_SPURS);
+ return ee->ee_base.modalHeader.spurChans[ix].spurChan;
+}
+
+/**************************************************************************
+ * fbin2freq
+ *
+ * Get channel value from binary representation held in eeprom
+ * RETURNS: the frequency in MHz
+ */
+static uint16_t
+fbin2freq(uint8_t fbin, HAL_BOOL is2GHz)
+{
+ /*
+ * Reserved value 0xFF provides an empty definition both as
+ * an fbin and as a frequency - do not convert
+ */
+ if (fbin == AR5416_BCHAN_UNUSED)
+ return fbin;
+ return (uint16_t)((is2GHz) ? (2300 + fbin) : (4800 + 5 * fbin));
+}
+
+
+/*
+ * Copy EEPROM Conformance Testing Limits contents
+ * into the allocated space
+ */
+/* USE CTLS from chain zero */
+#define CTL_CHAIN 0
+
+static void
+v9287EepromReadCTLInfo(struct ath_hal *ah, HAL_EEPROM_9287 *ee)
+{
+ RD_EDGES_POWER *rep = ee->ee_rdEdgesPower;
+ int i, j;
+
+ HALASSERT(AR9287_NUM_CTLS <= sizeof(ee->ee_rdEdgesPower)/NUM_EDGES);
+
+ for (i = 0; ee->ee_base.ctlIndex[i] != 0 && i < AR9287_NUM_CTLS; i++) {
+ for (j = 0; j < NUM_EDGES; j ++) {
+ /* XXX Confirm this is the right thing to do when an invalid channel is stored */
+ if (ee->ee_base.ctlData[i].ctlEdges[CTL_CHAIN][j].bChannel == AR5416_BCHAN_UNUSED) {
+ rep[j].rdEdge = 0;
+ rep[j].twice_rdEdgePower = 0;
+ rep[j].flag = 0;
+ } else {
+ rep[j].rdEdge = fbin2freq(
+ ee->ee_base.ctlData[i].ctlEdges[CTL_CHAIN][j].bChannel,
+ (ee->ee_base.ctlIndex[i] & CTL_MODE_M) != CTL_11A);
+ rep[j].twice_rdEdgePower = MS(ee->ee_base.ctlData[i].ctlEdges[CTL_CHAIN][j].tPowerFlag, CAL_CTL_EDGES_POWER);
+ rep[j].flag = MS(ee->ee_base.ctlData[i].ctlEdges[CTL_CHAIN][j].tPowerFlag, CAL_CTL_EDGES_FLAG) != 0;
+ }
+ }
+ rep += NUM_EDGES;
+ }
+ ee->ee_numCtls = i;
+ HALDEBUG(ah, HAL_DEBUG_ATTACH | HAL_DEBUG_EEPROM,
+ "%s Numctls = %u\n",__func__,i);
+}
+
+/*
+ * Reclaim any EEPROM-related storage.
+ */
+static void
+v9287EepromDetach(struct ath_hal *ah)
+{
+ HAL_EEPROM_9287 *ee = AH_PRIVATE(ah)->ah_eeprom;
+
+ ath_hal_free(ee);
+ AH_PRIVATE(ah)->ah_eeprom = AH_NULL;
+}
+
+#define owl_get_eep_ver(_ee) \
+ (((_ee)->ee_base.baseEepHeader.version >> 12) & 0xF)
+#define owl_get_eep_rev(_ee) \
+ (((_ee)->ee_base.baseEepHeader.version) & 0xFFF)
+
+HAL_STATUS
+ath_hal_9287EepromAttach(struct ath_hal *ah)
+{
+#define NW(a) (sizeof(a) / sizeof(uint16_t))
+ HAL_EEPROM_9287 *ee = AH_PRIVATE(ah)->ah_eeprom;
+ uint16_t *eep_data, magic;
+ HAL_BOOL need_swap;
+ u_int w, off, len;
+ uint32_t sum;
+
+ HALASSERT(ee == AH_NULL);
+
+ if (!ath_hal_eepromRead(ah, AR5416_EEPROM_MAGIC_OFFSET, &magic)) {
+ HALDEBUG(ah, HAL_DEBUG_ANY,
+ "%s Error reading Eeprom MAGIC\n", __func__);
+ return HAL_EEREAD;
+ }
+ HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s Eeprom Magic = 0x%x\n",
+ __func__, magic);
+ if (magic != AR5416_EEPROM_MAGIC) {
+ HALDEBUG(ah, HAL_DEBUG_ANY, "Bad magic number\n");
+ return HAL_EEMAGIC;
+ }
+
+ ee = ath_hal_malloc(sizeof(HAL_EEPROM_9287));
+ if (ee == AH_NULL) {
+ /* XXX message */
+ return HAL_ENOMEM;
+ }
+
+ eep_data = (uint16_t *) ee;
+ for (w = 0; w < NW(struct ar9287_eeprom); w++) {
+ off = AR9287_EEP_START_LOC + w;
+ if (!ath_hal_eepromRead(ah, off, &eep_data[w])) {
+ HALDEBUG(ah, HAL_DEBUG_ANY,
+ "%s eeprom read error at offset 0x%x\n",
+ __func__, off);
+ return HAL_EEREAD;
+ }
+ }
+ /* Convert to eeprom native eeprom endian format */
+ if (isBigEndian()) {
+ for (w = 0; w < NW(HAL_EEPROM_9287); w++)
+ eep_data[w] = __bswap16(eep_data[w]);
+ }
+
+ /*
+ * At this point, we're in the native eeprom endian format
+ * Now, determine the eeprom endian by looking at byte 26??
+ */
+ need_swap = ((ee->ee_base.baseEepHeader.eepMisc & AR5416_EEPMISC_BIG_ENDIAN) != 0) ^ isBigEndian();
+ if (need_swap) {
+ HALDEBUG(ah, HAL_DEBUG_ATTACH | HAL_DEBUG_EEPROM,
+ "Byte swap EEPROM contents.\n");
+ len = __bswap16(ee->ee_base.baseEepHeader.length);
+ } else {
+ len = ee->ee_base.baseEepHeader.length;
+ }
+ len = AH_MIN(len, sizeof(HAL_EEPROM_9287)) / sizeof(uint16_t);
+
+ /* Apply the checksum, done in native eeprom format */
+ /* XXX - Need to check to make sure checksum calculation is done
+ * in the correct endian format. Right now, it seems it would
+ * cast the raw data to host format and do the calculation, which may
+ * not be correct as the calculation may need to be done in the native
+ * eeprom format
+ */
+ sum = 0;
+ for (w = 0; w < len; w++)
+ sum ^= eep_data[w];
+ /* Check CRC - Attach should fail on a bad checksum */
+ if (sum != 0xffff) {
+ HALDEBUG(ah, HAL_DEBUG_ANY,
+ "Bad EEPROM checksum 0x%x (Len=%u)\n", sum, len);
*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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