svn commit: r198970 - projects/mips/sys/mips/atheros
Oleksandr Tymoshenko
gonzo at FreeBSD.org
Fri Nov 6 06:50:46 UTC 2009
Author: gonzo
Date: Fri Nov 6 06:50:45 2009
New Revision: 198970
URL: http://svn.freebsd.org/changeset/base/198970
Log:
- Fix initialization of PLL registers (different shifts for
arge0/arge1)
- Use base MAC address to generate MACs for arge1 and above
Modified:
projects/mips/sys/mips/atheros/if_arge.c
projects/mips/sys/mips/atheros/if_argevar.h
Modified: projects/mips/sys/mips/atheros/if_arge.c
==============================================================================
--- projects/mips/sys/mips/atheros/if_arge.c Fri Nov 6 06:50:45 2009 (r198969)
+++ projects/mips/sys/mips/atheros/if_arge.c Fri Nov 6 06:50:45 2009 (r198970)
@@ -205,9 +205,11 @@ arge_attach(device_t dev)
if (sc->arge_mac_unit == 0) {
sc->arge_ddr_flush_reg = AR71XX_WB_FLUSH_GE0;
sc->arge_pll_reg = AR71XX_PLL_ETH_INT0_CLK;
+ sc->arge_pll_reg_shift = 17;
} else {
sc->arge_ddr_flush_reg = AR71XX_WB_FLUSH_GE1;
sc->arge_pll_reg = AR71XX_PLL_ETH_INT1_CLK;
+ sc->arge_pll_reg_shift = 19;
}
/*
@@ -229,7 +231,6 @@ arge_attach(device_t dev)
sc->arge_phy_num = phynum;
-
mtx_init(&sc->arge_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
MTX_DEF);
callout_init_mtx(&sc->arge_stat_callout, &sc->arge_mtx, 0);
@@ -308,6 +309,9 @@ arge_attach(device_t dev)
eaddr[5] = (rnd >> 8) & 0xff;
}
+ if (sc->arge_mac_unit != 0)
+ eaddr[5] += sc->arge_mac_unit;
+
if (arge_dma_alloc(sc) != 0) {
error = ENXIO;
goto fail;
@@ -617,20 +621,20 @@ arge_link_task(void *arg, int pending)
/* set PLL registers */
sec_cfg = ATH_READ_REG(AR71XX_PLL_CPU_CONFIG);
- sec_cfg &= ~(3 << 17);
- sec_cfg |= (2 << 17);
+ sec_cfg &= ~(3 << sc->arge_pll_reg_shift);
+ sec_cfg |= (2 << sc->arge_pll_reg_shift);
- ATH_WRITE_REG(AR71XX_PLL_CPU_CONFIG, sec_cfg);
+ ATH_WRITE_REG(AR71XX_PLL_SEC_CONFIG, sec_cfg);
DELAY(100);
ATH_WRITE_REG(sc->arge_pll_reg, pll);
- sec_cfg |= (3 << 17);
- ATH_WRITE_REG(AR71XX_PLL_CPU_CONFIG, sec_cfg);
+ sec_cfg |= (3 << sc->arge_pll_reg_shift);
+ ATH_WRITE_REG(AR71XX_PLL_SEC_CONFIG, sec_cfg);
DELAY(100);
- sec_cfg &= ~(3 << 17);
- ATH_WRITE_REG(AR71XX_PLL_CPU_CONFIG, sec_cfg);
+ sec_cfg &= ~(3 << sc->arge_pll_reg_shift);
+ ATH_WRITE_REG(AR71XX_PLL_SEC_CONFIG, sec_cfg);
DELAY(100);
}
} else
Modified: projects/mips/sys/mips/atheros/if_argevar.h
==============================================================================
--- projects/mips/sys/mips/atheros/if_argevar.h Fri Nov 6 06:50:45 2009 (r198969)
+++ projects/mips/sys/mips/atheros/if_argevar.h Fri Nov 6 06:50:45 2009 (r198970)
@@ -133,6 +133,7 @@ struct arge_softc {
int arge_phy_num;
uint32_t arge_ddr_flush_reg;
uint32_t arge_pll_reg;
+ uint32_t arge_pll_reg_shift;
int arge_if_flags;
};
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