svn commit: r318003 - head/sys/dev/iwm

[Adrian Chadd]

Author: adrian
Date: Tue May  9 02:42:53 2017
New Revision: 318003
URL: https://svnweb.freebsd.org/changeset/base/318003

Log:
  [iwm] Add iwm_nic_unlock() calls missing from previous commit.
  
  Obtained from:	dragonflybsd.git f88ab372284e63c4c13da93e9026a203b9b4cdc5

Modified:
  head/sys/dev/iwm/if_iwm.c
  head/sys/dev/iwm/if_iwm_pcie_trans.c

Modified: head/sys/dev/iwm/if_iwm.c
==============================================================================
--- head/sys/dev/iwm/if_iwm.c	Tue May  9 02:41:33 2017	(r318002)
+++ head/sys/dev/iwm/if_iwm.c	Tue May  9 02:42:53 2017	(r318003)
@@ -1327,6 +1327,7 @@ iwm_stop_device(struct iwm_softc *sc)
 		if (iwm_nic_lock(sc)) {
 			iwm_write_prph(sc, IWM_APMG_CLK_DIS_REG,
 			    IWM_APMG_CLK_VAL_DMA_CLK_RQT);
+			iwm_nic_unlock(sc);
 		}
 		DELAY(5);
 	}
@@ -2597,6 +2598,7 @@ iwm_pcie_load_given_ucode(struct iwm_sof
 			iwm_write_prph(sc,
 				       IWM_LMPM_SECURE_UCODE_LOAD_CPU2_HDR_ADDR,
 				       IWM_LMPM_SECURE_CPU2_HDR_MEM_SPACE);
+			iwm_nic_unlock(sc);
 		}
 
 		/* load to FW the binary sections of CPU2 */
@@ -2629,6 +2631,7 @@ iwm_pcie_load_given_ucode_8000(struct iw
 	if (iwm_nic_lock(sc)) {
 		iwm_write_prph(sc, IWM_RELEASE_CPU_RESET,
 		    IWM_RELEASE_CPU_RESET_BIT);
+		iwm_nic_unlock(sc);
 	}
 
 	/* load to FW the binary Secured sections of CPU1 */
@@ -2887,6 +2890,7 @@ iwm_mvm_load_ucode_wait_alive(struct iwm
 			if (iwm_nic_lock(sc)) {
 				a = iwm_read_prph(sc, IWM_SB_CPU_1_STATUS);
 				b = iwm_read_prph(sc, IWM_SB_CPU_2_STATUS);
+				iwm_nic_unlock(sc);
 			}
 			device_printf(sc->sc_dev,
 			    "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",

Modified: head/sys/dev/iwm/if_iwm_pcie_trans.c
==============================================================================
--- head/sys/dev/iwm/if_iwm_pcie_trans.c	Tue May  9 02:41:33 2017	(r318002)
+++ head/sys/dev/iwm/if_iwm_pcie_trans.c	Tue May  9 02:42:53 2017	(r318003)
@@ -502,11 +502,13 @@ iwm_apm_init(struct iwm_softc *sc)
 		if (iwm_nic_lock(sc)) {
 			iwm_read_prph(sc, IWM_OSC_CLK);
 			iwm_read_prph(sc, IWM_OSC_CLK);
+			iwm_nic_unlock(sc);
 		}
 		iwm_set_bits_prph(sc, IWM_OSC_CLK, IWM_OSC_CLK_FORCE_CONTROL);
 		if (iwm_nic_lock(sc)) {
 			iwm_read_prph(sc, IWM_OSC_CLK);
 			iwm_read_prph(sc, IWM_OSC_CLK);
+			iwm_nic_unlock(sc);
 		}
 	}
 
@@ -521,6 +523,7 @@ iwm_apm_init(struct iwm_softc *sc)
 		if (iwm_nic_lock(sc)) {
 			iwm_write_prph(sc, IWM_APMG_CLK_EN_REG,
 			    IWM_APMG_CLK_VAL_DMA_CLK_RQT);
+			iwm_nic_unlock(sc);
 		}
 		DELAY(20);
 
@@ -532,6 +535,7 @@ iwm_apm_init(struct iwm_softc *sc)
 		if (iwm_nic_lock(sc)) {
 			iwm_write_prph(sc, IWM_APMG_RTC_INT_STT_REG,
 			    IWM_APMG_RTC_INT_STT_RFKILL);
+			iwm_nic_unlock(sc);
 		}
 	}
  out: