svn commit: r317786 - head/sys/amd64/pci

[Sepherosa Ziehau]

Author: sephe
Date: Thu May  4 05:28:46 2017
New Revision: 317786
URL: https://svnweb.freebsd.org/changeset/base/317786

Log:
  pcicfg: Fix direct calls of pci_cfg{read,write} on systems w/o PCI host bridge.
  
  Reported by:	dexuan@
  Reviewed by:	jhb@
  MFC after:	1 week
  Sponsored by:	Microsoft
  Differential Revision: https://reviews.freebsd.org/D10564

Modified:
  head/sys/amd64/pci/pci_cfgreg.c

Modified: head/sys/amd64/pci/pci_cfgreg.c
==============================================================================
--- head/sys/amd64/pci/pci_cfgreg.c	Thu May  4 05:26:37 2017	(r317785)
+++ head/sys/amd64/pci/pci_cfgreg.c	Thu May  4 05:28:46 2017	(r317786)
@@ -64,6 +64,7 @@ static vm_offset_t pcie_base;
 static int pcie_minbus, pcie_maxbus;
 static uint32_t pcie_badslots;
 static struct mtx pcicfg_mtx;
+MTX_SYSINIT(pcicfg_mtx, &pcicfg_mtx, "pcicfg_mtx", MTX_SPIN);
 static int mcfg_enable = 1;
 SYSCTL_INT(_hw_pci, OID_AUTO, mcfg, CTLFLAG_RDTUN, &mcfg_enable, 0,
     "Enable support for PCI-e memory mapped config access");
@@ -74,15 +75,9 @@ SYSCTL_INT(_hw_pci, OID_AUTO, mcfg, CTLF
 int
 pci_cfgregopen(void)
 {
-	static int once = 0;
 	uint64_t pciebar;
 	uint16_t did, vid;
 
-	if (!once) {
-		mtx_init(&pcicfg_mtx, "pcicfg", NULL, MTX_SPIN);
-		once = 1;
-	}
-
 	if (cfgmech != CFGMECH_NONE)
 		return (1);
 	cfgmech = CFGMECH_1;
@@ -138,6 +133,9 @@ pci_cfgregread(int bus, int slot, int fu
 {
 	uint32_t line;
 
+	if (cfgmech == CFGMECH_NONE)
+		return (0xffffffff);
+
 	/*
 	 * Some BIOS writers seem to want to ignore the spec and put
 	 * 0 in the intline rather than 255 to indicate none.  Some use
@@ -162,6 +160,9 @@ void
 pci_cfgregwrite(int bus, int slot, int func, int reg, u_int32_t data, int bytes)
 {
 
+	if (cfgmech == CFGMECH_NONE)
+		return;
+
 	if (cfgmech == CFGMECH_PCIE &&
 	    (bus >= pcie_minbus && bus <= pcie_maxbus) &&
 	    (bus != 0 || !(1 << slot & pcie_badslots)))