svn commit: r306755 - in head/sys/arm: arm include

[Michal Meloun]

Author: mmel
Date: Thu Oct  6 12:01:10 2016
New Revision: 306755
URL: https://svnweb.freebsd.org/changeset/base/306755

Log:
  ARM: Add identifiers for ARM Cortex v8 and Marvell Sheeva v7 cores.
  Not a functional change.
  
  MFC after: 3 days

Modified:
  head/sys/arm/arm/cpuinfo.c
  head/sys/arm/include/cpuinfo.h

Modified: head/sys/arm/arm/cpuinfo.c
==============================================================================
--- head/sys/arm/arm/cpuinfo.c	Thu Oct  6 11:54:42 2016	(r306754)
+++ head/sys/arm/arm/cpuinfo.c	Thu Oct  6 12:01:10 2016	(r306755)
@@ -165,7 +165,11 @@ cpuinfo_get_actlr_modifier(uint32_t *act
 
 	if (cpuinfo.implementer == CPU_IMPLEMENTER_ARM) {
 		switch (cpuinfo.part_number) {
-
+		case CPU_ARCH_CORTEX_A72:
+		case CPU_ARCH_CORTEX_A57:
+		case CPU_ARCH_CORTEX_A53:
+			/* Nothing to do for AArch32 */
+			break;
 		case CPU_ARCH_CORTEX_A17:
 		case CPU_ARCH_CORTEX_A12: /* A12 is merged to A17 */
 			/*

Modified: head/sys/arm/include/cpuinfo.h
==============================================================================
--- head/sys/arm/include/cpuinfo.h	Thu Oct  6 11:54:42 2016	(r306754)
+++ head/sys/arm/include/cpuinfo.h	Thu Oct  6 12:01:10 2016	(r306755)
@@ -45,10 +45,18 @@
 #define CPU_ARCH_CORTEX_A12		0xC0D
 #define CPU_ARCH_CORTEX_A15		0xC0F
 #define CPU_ARCH_CORTEX_A17		0xC11
+#define CPU_ARCH_CORTEX_A53		0xD03
+#define CPU_ARCH_CORTEX_A57		0xD07
+#define CPU_ARCH_CORTEX_A72		0xD08
+
 
 /* QCOM */
 #define CPU_ARCH_KRAIT_300		0x06F
 
+/* MRVL */
+#define CPU_ARCH_SHEEVA_851		0x581	/* PJ4/PJ4B */
+#define CPU_ARCH_SHEEVA_584		0x584 	/* PJ4B-MP/PJ4C */
+
 struct cpuinfo {
 	/* raw id registers */
 	uint32_t midr;