svn commit: r298477 - in head/sys: conf riscv/riscv

[Ruslan Bukin]

On Fri, Apr 22, 2016 at 11:31:37PM +0200, Marko Zec wrote:
> On Fri, 22 Apr 2016 16:15:59 +0000
> Ruslan Bukin <br at freebsd.org> wrote:
> 
> > Author: br
> > Date: Fri Apr 22 16:15:58 2016
> > New Revision: 298477
> > URL: https://svnweb.freebsd.org/changeset/base/298477
> > 
> > Log:
> >   Clear the DDR memory. This should be done by bootloaders,
> >   but they have no such feature yet.
> >   
> >   This fixes operation on Rocket Core and lowRISC.
> > 
> > Modified:
> >   head/sys/conf/options.riscv
> >   head/sys/riscv/riscv/locore.S
> > 
> > Modified: head/sys/conf/options.riscv
> > ==============================================================================
> > --- head/sys/conf/options.riscv	Fri Apr 22 15:12:05
> > 2016	(r298476) +++ head/sys/conf/options.riscv	Fri Apr
> > 22 16:15:58 2016	(r298477) @@ -2,3 +2,4 @@
> >  
> >  RISCV				opt_global.h
> >  VFP				opt_global.h
> > +DDR_CLEAR_SIZE			opt_global.h
> > 
> > Modified: head/sys/riscv/riscv/locore.S
> > ==============================================================================
> > --- head/sys/riscv/riscv/locore.S	Fri Apr 22 15:12:05
> > 2016	(r298476) +++ head/sys/riscv/riscv/locore.S	Fri
> > Apr 22 16:15:58 2016	(r298477) @@ -126,6 +126,17 @@ _start:
> >  	csrr	a0, mhartid
> >  	bnez	a0, mpentry
> >  
> > +#if defined(DDR_CLEAR_SIZE)
> > +	/* Clear DDR memory */
> > +	la	t0, _end
> > +	li	t1, DDR_CLEAR_SIZE
> > +1:
> > +	sd	zero, 0(t0)
> > +	addi	t0, t0, 8
> > +	bltu	t0, t1, 1b
> 
> Usually _end appears to be (double) word aligned, but that happens out
> of pure luck, since compilers do not provide firm guarantees about
> _end's alignment (at least gcc doesn't, as far as I know).
> 
> So depending on which kind of RV this code would run, sometimes it may
> end up doing a lot of traps emulating unaligned access in software, or
> worse...
> 
> Hence it would't hurt to check for _end's alignment first and do a few
> byte-by-byte bzero()ing if needed, before proceeding a dword pace.
> 
> 

You right. Thanks.
Anyway I think this commit is wrong in general as we usually require to clear BSS only.
I was playing with buggy version of hardware and clearing all the DRR was helpful to get booted. I will check again soon on default hardware and hopefully will get this reverted.

thanks

Ruslan