svn commit: r298062 - head/sys/boot/fdt/dts/mips
Stanislav Galabov
sgalabov at FreeBSD.org
Fri Apr 15 15:36:11 UTC 2016
Author: sgalabov
Date: Fri Apr 15 15:36:09 2016
New Revision: 298062
URL: https://svnweb.freebsd.org/changeset/base/298062
Log:
Import Mediatek/Ralink dtsi patches against OpenWRT dtsi files
This revision suggests dtsi patches to be used with the original OpenWRT
dtsi files so we can re-use what has already been done in OpenWRT for the
Mediatek/Ralink SoCs.
The only thing that is required after importing this revision should be
the following:
1. Import OpenWRT dts/dtsi files into sys/gnu/dts/mips
2. Run the following script in sys/gnu/dts/mips:
for f in `ls [mr]t*.dtsi`; do
printf "\n#include <fbsd-$f>\n" > $f
done
This will apply our dtsi patches to OpenWRT's dtsi files and will allow us
to re-use dts/dtsi files for ~170 Mediatek/Ralink boards.
Currently our drivers are not 100% compatible with OpenWRT's dts files, but
they're compatible enough.
We can add more functionality in the future that would better leverage the
OpenWRT work as well.
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D5965
Added:
head/sys/boot/fdt/dts/mips/fbsd-mt7620a.dtsi (contents, props changed)
head/sys/boot/fdt/dts/mips/fbsd-mt7620n.dtsi (contents, props changed)
head/sys/boot/fdt/dts/mips/fbsd-mt7621.dtsi (contents, props changed)
head/sys/boot/fdt/dts/mips/fbsd-mt7628an.dtsi (contents, props changed)
head/sys/boot/fdt/dts/mips/fbsd-rt2880.dtsi (contents, props changed)
head/sys/boot/fdt/dts/mips/fbsd-rt3050.dtsi (contents, props changed)
head/sys/boot/fdt/dts/mips/fbsd-rt3352.dtsi (contents, props changed)
head/sys/boot/fdt/dts/mips/fbsd-rt3883.dtsi (contents, props changed)
head/sys/boot/fdt/dts/mips/fbsd-rt5350.dtsi (contents, props changed)
Added: head/sys/boot/fdt/dts/mips/fbsd-mt7620a.dtsi
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/boot/fdt/dts/mips/fbsd-mt7620a.dtsi Fri Apr 15 15:36:09 2016 (r298062)
@@ -0,0 +1,52 @@
+/* $FreeBSD$ */
+
+/ {
+
+ /*
+ * FreeBSD's stdin and stdout, so we can have a console
+ */
+ chosen {
+ stdin = &uartlite;
+ stdout = &uartlite;
+ };
+
+ /*
+ * OpenWRT doesn't define a clock controller, but we currently need one
+ */
+ clkctrl: cltctrl {
+ compatible = "ralink,rt2880-clock";
+ #clock-cells = <1>;
+ };
+
+ palmbus at 10000000 {
+ /*
+ * Make palmbus compatible to our simplebus
+ */
+ compatible = "simple-bus";
+
+ /*
+ * Reference uartlite at c00 as uartlite, so we can address it
+ * within the chosen node above
+ */
+ uartlite: uartlite at c00 {};
+ };
+
+ usbphy: usbphy {
+ clocks = <&clkctrl 22 &clkctrl 25>;
+ clock-names = "host", "device";
+ };
+
+ pcie at 10140000 {
+ /*
+ * Our driver is different that OpenWRT's, so we need slightly
+ * different values for the reg property
+ */
+ reg = <0x10140000 0x10000>;
+
+ /*
+ * Also, we need resets and clocks defined, so we can properly
+ * initialize the PCIe
+ */
+ clocks = <&clkctrl 26>;
+ };
+};
Added: head/sys/boot/fdt/dts/mips/fbsd-mt7620n.dtsi
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/boot/fdt/dts/mips/fbsd-mt7620n.dtsi Fri Apr 15 15:36:09 2016 (r298062)
@@ -0,0 +1,38 @@
+/* $FreeBSD$ */
+
+/ {
+
+ /*
+ * FreeBSD's stdin and stdout, so we can have a console
+ */
+ chosen {
+ stdin = &uartlite;
+ stdout = &uartlite;
+ };
+
+ /*
+ * OpenWRT doesn't define a clock controller, but we currently need one
+ */
+ clkctrl: cltctrl {
+ compatible = "ralink,rt2880-clock";
+ #clock-cells = <1>;
+ };
+
+ palmbus at 10000000 {
+ /*
+ * Make palmbus compatible to our simplebus
+ */
+ compatible = "simple-bus";
+
+ /*
+ * Reference uartlite at c00 as uartlite, so we can address it
+ * within the chosen node above
+ */
+ uartlite: uartlite at c00 {};
+ };
+
+ usbphy: usbphy {
+ clocks = <&clkctrl 22 &clkctrl 25>;
+ clock-names = "host", "device";
+ };
+};
Added: head/sys/boot/fdt/dts/mips/fbsd-mt7621.dtsi
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/boot/fdt/dts/mips/fbsd-mt7621.dtsi Fri Apr 15 15:36:09 2016 (r298062)
@@ -0,0 +1,102 @@
+/* $FreeBSD$ */
+
+/ {
+
+ /*
+ * FreeBSD's stdin and stdout, so we can have a console
+ */
+ chosen {
+ stdin = &uartlite;
+ stdout = &uartlite;
+ };
+
+ /*
+ * OpenWRT doesn't define a clock controller, but we currently need one
+ */
+ clkctrl: cltctrl {
+ compatible = "ralink,rt2880-clock";
+ #clock-cells = <1>;
+ };
+
+ gic: interrupt-controller at 1fbc0000 {
+ /*
+ * OpenWRT does not define the GIC interrupt, but we need it
+ * for now, at least until we re-work our GIC driver
+ */
+ interrupt-parent = <&cpuintc>;
+ interrupts = <2>;
+ };
+
+ palmbus at 1E000000 {
+ /*
+ * Make palmbus compatible to our simplebus
+ */
+ compatible = "simple-bus";
+
+ /*
+ * Reference uartlite at c00 as uartlite, so we can address it
+ * within the chosen node above
+ */
+ uartlite: uartlite at c00 {
+ /*
+ * Mark uartlite as compatible to mtk,ns16550a instead
+ * of simply ns16550a so we can autodetect the UART
+ * clock
+ */
+ compatible = "mtk,ns16550a";
+ };
+
+ gpio at 600 {
+ /*
+ * Mark gpio as compatible to simple-bus and override
+ * its #size-cells and provide a default ranges property
+ * so we can attach instances of our mtk_gpio_v2 driver
+ * to it for now. Provide exactly the same resources to
+ * the instances of mtk_gpio_v2.
+ */
+ compatible = "simple-bus";
+ ranges = <0x0 0x600 0x100>;
+ #size-cells = <1>;
+
+ interrupt-parent = <&gic>;
+
+ gpio0: bank at 0 {
+ reg = <0x0 0x100>;
+ interrupts = <GIC_SHARED 6 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ gpio1: bank at 1 {
+ reg = <0x0 0x100>;
+ interrupts = <GIC_SHARED 6 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ gpio2: bank at 2 {
+ reg = <0x0 0x100>;
+ interrupts = <GIC_SHARED 6 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ };
+ };
+
+ xhci at 1E1C0000 {
+ /*
+ * A slightly different value for reg size is needed by our
+ * driver for the moment
+ */
+ reg = <0x1e1c0000 0x20000>;
+ };
+
+ pcie at 1e140000 {
+ /*
+ * Our driver is different that OpenWRT's, so we need slightly
+ * different values for the reg property
+ */
+ reg = <0x1e140000 0x10000>;
+
+ /*
+ * Also, we need resets and clocks defined, so we can properly
+ * initialize the PCIe
+ */
+ resets = <&rstctrl 24>, <&rstctrl 25>, <&rstctrl 26>;
+ clocks = <&clkctrl 24>, <&clkctrl 25>, <&clkctrl 26>;
+ };
+};
Added: head/sys/boot/fdt/dts/mips/fbsd-mt7628an.dtsi
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/boot/fdt/dts/mips/fbsd-mt7628an.dtsi Fri Apr 15 15:36:09 2016 (r298062)
@@ -0,0 +1,88 @@
+/* $FreeBSD$ */
+
+/ {
+
+ /*
+ * FreeBSD's stdin and stdout, so we can have a console
+ */
+ chosen {
+ stdin = &uartlite;
+ stdout = &uartlite;
+ };
+
+ /*
+ * OpenWRT doesn't define a clock controller, but we currently need one
+ */
+ clkctrl: cltctrl {
+ compatible = "ralink,rt2880-clock";
+ #clock-cells = <1>;
+ };
+
+ palmbus at 10000000 {
+ /*
+ * Make palmbus compatible to our simplebus
+ */
+ compatible = "simple-bus";
+
+ /*
+ * Reference uart2 at e00 as uartlite, so we can address it
+ * within the chosen node above
+ */
+ uartlite: uart2 at e00 {
+ /*
+ * Mark uartlite as compatible to mtk,ns16550a instead
+ * of simply ns16550a so we can autodetect the UART
+ * clock
+ */
+ compatible = "mtk,ns16550a";
+ };
+
+ gpio at 600 {
+ /*
+ * Mark gpio as compatible to simple-bus and override
+ * its #size-cells and provide a default ranges property
+ * so we can attach instances of our mtk_gpio_v2 driver
+ * to it for now. Provide exactly the same resources to
+ * the instances of mtk_gpio_v2.
+ */
+ compatible = "simple-bus";
+ ranges = <0x0 0x600 0x100>;
+ #size-cells = <1>;
+
+ gpio0: bank at 0 {
+ reg = <0x0 0x100>;
+ interrupts = <6>;
+ };
+
+ gpio1: bank at 1 {
+ reg = <0x0 0x100>;
+ interrupts = <6>;
+ };
+
+ gpio2: bank at 2 {
+ reg = <0x0 0x100>;
+ interrupts = <6>;
+ };
+ };
+ };
+
+ usbphy: usbphy at 10120000 {
+ clocks = <&clkctrl 22 &clkctrl 25>;
+ clock-names = "host", "device";
+ };
+
+ pcie at 10140000 {
+ /*
+ * Our driver is different that OpenWRT's, so we need slightly
+ * different values for the reg property
+ */
+ reg = <0x10140000 0x10000>;
+
+ /*
+ * Also, we need resets and clocks defined, so we can properly
+ * initialize the PCIe
+ */
+ resets = <&rstctrl 26>, <&rstctrl 27>;
+ clocks = <&clkctrl 26>, <&clkctrl 27>;
+ };
+};
Added: head/sys/boot/fdt/dts/mips/fbsd-rt2880.dtsi
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/boot/fdt/dts/mips/fbsd-rt2880.dtsi Fri Apr 15 15:36:09 2016 (r298062)
@@ -0,0 +1,33 @@
+/* $FreeBSD$ */
+
+/ {
+
+ /*
+ * FreeBSD's stdin and stdout, so we can have a console
+ */
+ chosen {
+ stdin = &uartlite;
+ stdout = &uartlite;
+ };
+
+ /*
+ * OpenWRT doesn't define a clock controller, but we currently need one
+ */
+ clkctrl: cltctrl {
+ compatible = "ralink,rt2880-clock";
+ #clock-cells = <1>;
+ };
+
+ palmbus at 300000 {
+ /*
+ * Make palmbus compatible to our simplebus
+ */
+ compatible = "simple-bus";
+
+ /*
+ * Reference uartlite at c00 as uartlite, so we can address it
+ * within the chosen node above
+ */
+ uartlite: uartlite at c00 {};
+ };
+};
Added: head/sys/boot/fdt/dts/mips/fbsd-rt3050.dtsi
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/boot/fdt/dts/mips/fbsd-rt3050.dtsi Fri Apr 15 15:36:09 2016 (r298062)
@@ -0,0 +1,41 @@
+/* $FreeBSD$ */
+
+/ {
+
+ /*
+ * FreeBSD's stdin and stdout, so we can have a console
+ */
+ chosen {
+ stdin = &uartlite;
+ stdout = &uartlite;
+ };
+
+ /*
+ * OpenWRT doesn't define a clock controller, but we currently need one
+ */
+ clkctrl: cltctrl {
+ compatible = "ralink,rt2880-clock";
+ #clock-cells = <1>;
+ };
+
+ palmbus at 10000000 {
+ /*
+ * Make palmbus compatible to our simplebus
+ */
+ compatible = "simple-bus";
+
+ /*
+ * Reference uartlite at c00 as uartlite, so we can address it
+ * within the chosen node above
+ */
+ uartlite: uartlite at c00 {};
+ };
+
+ usbphy: usbphy {
+ compatible = "ralink,rt3050-usbphy";
+ resets = <&rstctrl 22>;
+ reset-names = "otg";
+ clocks = <&clkctrl 18>;
+ clock-names = "otg";
+ };
+};
Added: head/sys/boot/fdt/dts/mips/fbsd-rt3352.dtsi
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/boot/fdt/dts/mips/fbsd-rt3352.dtsi Fri Apr 15 15:36:09 2016 (r298062)
@@ -0,0 +1,38 @@
+/* $FreeBSD$ */
+
+/ {
+
+ /*
+ * FreeBSD's stdin and stdout, so we can have a console
+ */
+ chosen {
+ stdin = &uartlite;
+ stdout = &uartlite;
+ };
+
+ /*
+ * OpenWRT doesn't define a clock controller, but we currently need one
+ */
+ clkctrl: cltctrl {
+ compatible = "ralink,rt2880-clock";
+ #clock-cells = <1>;
+ };
+
+ palmbus at 10000000 {
+ /*
+ * Make palmbus compatible to our simplebus
+ */
+ compatible = "simple-bus";
+
+ /*
+ * Reference uartlite at c00 as uartlite, so we can address it
+ * within the chosen node above
+ */
+ uartlite: uartlite at c00 {};
+ };
+
+ usbphy {
+ clocks = <&clkctrl 18 &clkctrl 20>;
+ clock-names = "host", "device";
+ };
+};
Added: head/sys/boot/fdt/dts/mips/fbsd-rt3883.dtsi
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/boot/fdt/dts/mips/fbsd-rt3883.dtsi Fri Apr 15 15:36:09 2016 (r298062)
@@ -0,0 +1,50 @@
+/* $FreeBSD$ */
+
+/ {
+
+ /*
+ * FreeBSD's stdin and stdout, so we can have a console
+ */
+ chosen {
+ stdin = &uartlite;
+ stdout = &uartlite;
+ };
+
+ /*
+ * OpenWRT doesn't define a clock controller, but we currently need one
+ */
+ clkctrl: cltctrl {
+ compatible = "ralink,rt2880-clock";
+ #clock-cells = <1>;
+ };
+
+ palmbus at 10000000 {
+ /*
+ * Make palmbus compatible to our simplebus
+ */
+ compatible = "simple-bus";
+
+ /*
+ * Reference uartlite at c00 as uartlite, so we can address it
+ * within the chosen node above
+ */
+ uartlite: uartlite at c00 {};
+ };
+
+ usbphy: usbphy {
+ clocks = <&clkctrl 22 &clkctrl 25>;
+ clock-names = "host", "device";
+ };
+
+ pci at 10140000 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges = <
+ 0x02000000 0 0x00000000 0x20000000 0 0x10000000
+ 0x01000000 0 0x00000000 0x10160000 0 0x00010000
+ >;
+
+ interrupt-parent = <&cpuintc>;
+ interrupts = <4>;
+ };
+};
Added: head/sys/boot/fdt/dts/mips/fbsd-rt5350.dtsi
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/boot/fdt/dts/mips/fbsd-rt5350.dtsi Fri Apr 15 15:36:09 2016 (r298062)
@@ -0,0 +1,38 @@
+/* $FreeBSD$ */
+
+/ {
+
+ /*
+ * FreeBSD's stdin and stdout, so we can have a console
+ */
+ chosen {
+ stdin = &uartlite;
+ stdout = &uartlite;
+ };
+
+ /*
+ * OpenWRT doesn't define a clock controller, but we currently need one
+ */
+ clkctrl: cltctrl {
+ compatible = "ralink,rt2880-clock";
+ #clock-cells = <1>;
+ };
+
+ palmbus at 10000000 {
+ /*
+ * Make palmbus compatible to our simplebus
+ */
+ compatible = "simple-bus";
+
+ /*
+ * Reference uartlite at c00 as uartlite, so we can address it
+ * within the chosen node above
+ */
+ uartlite: uartlite at c00 {};
+ };
+
+ usbphy {
+ clocks = <&clkctrl 18>;
+ clock-names = "host";
+ };
+};
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