svn commit: r238955 - head/sys/arm/at91
Warner Losh
imp at FreeBSD.org
Tue Jul 31 19:14:22 UTC 2012
Author: imp
Date: Tue Jul 31 19:14:22 2012
New Revision: 238955
URL: http://svn.freebsd.org/changeset/base/238955
Log:
Allow chip selects other than 0. The SAM9260EK board
has its dataflash on CS1.
Modified:
head/sys/arm/at91/at91_spi.c
Modified: head/sys/arm/at91/at91_spi.c
==============================================================================
--- head/sys/arm/at91/at91_spi.c Tue Jul 31 18:47:17 2012 (r238954)
+++ head/sys/arm/at91/at91_spi.c Tue Jul 31 19:14:22 2012 (r238955)
@@ -42,6 +42,7 @@ __FBSDID("$FreeBSD$");
#include <machine/bus.h>
+#include <arm/at91/at91var.h>
#include <arm/at91/at91_spireg.h>
#include <arm/at91/at91_pdcreg.h>
@@ -144,6 +145,7 @@ at91_spi_attach(device_t dev)
* memory and APB bandwidth.
* Also, currently we lack a way for lettting both the board and the
* slave devices take their maximum supported SPI clocks into account.
+ * Also, we hard-wire SPI mode to 3.
*/
csr = SPI_CSR_CPOL | (4 << 16) | (0xff << 8);
WR4(sc, SPI_CSR0, csr);
@@ -285,7 +287,10 @@ at91_spi_transfer(device_t dev, device_t
*/
WR4(sc, PDC_PTCR, PDC_PTCR_TXTDIS | PDC_PTCR_RXTDIS);
-#ifdef SPI_CHIPSEL_SUPPORT
+ /*
+ * PSCDEC = 0 has a range of 0..3 for chip select. We
+ * don't support PSCDEC = 1 which has a range of 0..15.
+ */
if (cmd->cs < 0 || cmd->cs > 3) {
device_printf(dev,
"Invalid chip select %d requested by %s\n", cmd->cs,
@@ -293,18 +298,23 @@ at91_spi_transfer(device_t dev, device_t
err = EINVAL;
goto out;
}
+
#ifdef SPI_CHIP_SELECT_HIGH_SUPPORT
+ /*
+ * The AT91RM9200 couldn't do CS high for CS 0. Other chips can, but we
+ * don't support that yet, or other spi modes.
+ */
if (at91_is_rm92() && cmd->cs == 0 &&
(cmd->flags & SPI_CHIP_SELECT_HIGH) != 0) {
device_printf(dev,
- "Invalid chip select high requested by %s\n",
+ "Invalid chip select high requested by %s for cs 0.\n",
device_get_nameunit(child));
err = EINVAL;
goto out;
}
#endif
- WR4(sc, SPI_MR, (RD4(sc, SPI_MR) & ~0x000f0000) | CS_TO_MR(cmd->cs));
-#endif
+ err = (RD4(sc, SPI_MR) & ~0x000f0000) | CS_TO_MR(cmd->cs);
+ WR4(sc, SPI_MR, err);
/*
* Set up the TX side of the transfer.
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