svn commit: r238885 - head/sys/dev/ath

[Adrian Chadd]

Author: adrian
Date: Sun Jul 29 09:23:32 2012
New Revision: 238885
URL: http://svn.freebsd.org/changeset/base/238885

Log:
  Shuffle the rate control call to be consistent with non-aggregate TX.
  
  The correct ordering for non-aggregate TX is:
  
  * call ath_hal_setuptxdesc() to setup the first TX descriptor complete
    with the first TX rate/try count;
  * call ath_hal_setupxtxdesc() to setup the multi-rate retry;
  * .. or for 802.11n NICs, call ath_hal_set11nratescenario() for MRR and
    802.11n flags;
  * then call ath_hal_filltxdesc() to setup intermediary descriptors
    in a multi-descriptor single frame.
  
  The call to ath_hal_filltxdesc() routines seem to correctly (consistently?)
  handle the intermediary descriptor flags, including copying the rate
  control information to the final descriptor in the frame.  That's used
  by the rate control module rather than the hardware.
  
  Tested:
  
  * Only on AR9280 STA mode, however it should work on other chips in
    both STA and AP mode.

Modified:
  head/sys/dev/ath/if_ath_tx.c

Modified: head/sys/dev/ath/if_ath_tx.c
==============================================================================
--- head/sys/dev/ath/if_ath_tx.c	Sun Jul 29 08:52:32 2012	(r238884)
+++ head/sys/dev/ath/if_ath_tx.c	Sun Jul 29 09:23:32 2012	(r238885)
@@ -3895,9 +3895,9 @@ ath_tx_tid_hw_queue_aggr(struct ath_soft
 			ath_tx_set_rtscts(sc, bf);
 			ath_tx_rate_fill_rcflags(sc, bf);
 			ath_tx_setds(sc, bf);
+			ath_tx_set_ratectrl(sc, ni, bf);
 			ath_tx_chaindesclist(sc, bf);
 			ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc);
-			ath_tx_set_ratectrl(sc, ni, bf);
 
 			sc->sc_aggr_stats.aggr_nonbaw_pkt++;
 
@@ -3955,9 +3955,9 @@ ath_tx_tid_hw_queue_aggr(struct ath_soft
 			    "%s: single-frame aggregate\n", __func__);
 			bf->bf_state.bfs_aggr = 0;
 			ath_tx_setds(sc, bf);
+			ath_tx_set_ratectrl(sc, ni, bf);
 			ath_tx_chaindesclist(sc, bf);
 			ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc);
-			ath_tx_set_ratectrl(sc, ni, bf);
 			if (status == ATH_AGGR_BAW_CLOSED)
 				sc->sc_aggr_stats.aggr_baw_closed_single_pkt++;
 			else
@@ -4084,8 +4084,8 @@ ath_tx_tid_hw_queue_norm(struct ath_soft
 		ath_tx_set_rtscts(sc, bf);
 		ath_tx_rate_fill_rcflags(sc, bf);
 		ath_tx_setds(sc, bf);
-		ath_tx_chaindesclist(sc, bf);
 		ath_tx_set_ratectrl(sc, ni, bf);
+		ath_tx_chaindesclist(sc, bf);
 
 		/* Track outstanding buffer count to hardware */
 		/* aggregates are "one" buffer */