svn commit: r238314 - head/sys/dev/ath/ath_hal

[Adrian Chadd]

Author: adrian
Date: Mon Jul  9 23:58:22 2012
New Revision: 238314
URL: http://svn.freebsd.org/changeset/base/238314

Log:
  Add some AR9300 HAL descriptor definition changes.
  
  * Add a couple of RX errors;
  * Add the spectral scan PHY error code;
  * extend the RX flags to be a 16 bit field, rather than an 8 bit field;
  * Add a new RX flag.
  
  Obtained from:	Qualcomm Atheros

Modified:
  head/sys/dev/ath/ath_hal/ah_desc.h

Modified: head/sys/dev/ath/ath_hal/ah_desc.h
==============================================================================
--- head/sys/dev/ath/ath_hal/ah_desc.h	Mon Jul  9 21:53:50 2012	(r238313)
+++ head/sys/dev/ath/ath_hal/ah_desc.h	Mon Jul  9 23:58:22 2012	(r238314)
@@ -122,11 +122,12 @@ struct ath_rx_status {
 	int8_t		rs_rssi_ext[3];	/* rx frame RSSI [ext, chain 0-2] */
 	uint8_t		rs_isaggr;	/* is part of the aggregate */
 	uint8_t		rs_moreaggr;	/* more frames in aggr to follow */
+	uint16_t	rs_flags;	/* misc flags */
 	uint8_t		rs_num_delims;	/* number of delims in aggr */
-	uint8_t		rs_flags;	/* misc flags */
+	uint8_t		rs_spare0;	/* padding */
 	uint32_t	rs_evm0;	/* evm bytes */
 	uint32_t	rs_evm1;
-	uint32_t	rs_evm2;	
+	uint32_t	rs_evm2;
 	uint32_t	rs_evm3;	/* needed for ar9300 and later */
 	uint32_t	rs_evm4;	/* needed for ar9300 and later */
 #endif /* AH_SUPPORT_AR5416 */
@@ -138,16 +139,19 @@ struct ath_rx_status {
 #define	HAL_RXERR_FIFO		0x04	/* fifo overrun */
 #define	HAL_RXERR_DECRYPT	0x08	/* non-Michael decrypt error */
 #define	HAL_RXERR_MIC		0x10	/* Michael MIC decrypt error */
+#define	HAL_RXERR_INCOMP	0x20	/* Rx Desc processing is incomplete */
+#define	HAL_RXERR_KEYMISS	0x40	/* Key not found in keycache */
 
 /* bits found in rs_flags */
-#define	HAL_RX_MORE		0x01	/* more descriptors follow */
-#define	HAL_RX_MORE_AGGR	0x02	/* more frames in aggr */
-#define	HAL_RX_GI		0x04	/* full gi */
-#define	HAL_RX_2040		0x08	/* 40 Mhz */
-#define	HAL_RX_DELIM_CRC_PRE	0x10	/* crc error in delimiter pre */
-#define	HAL_RX_DELIM_CRC_POST	0x20	/* crc error in delim after */
-#define	HAL_RX_DECRYPT_BUSY	0x40	/* decrypt was too slow */
-#define	HAL_RX_HI_RX_CHAIN	0x80	/* SM power save: hi Rx chain control */
+#define	HAL_RX_MORE		0x0001	/* more descriptors follow */
+#define	HAL_RX_MORE_AGGR	0x0002	/* more frames in aggr */
+#define	HAL_RX_GI		0x0004	/* full gi */
+#define	HAL_RX_2040		0x0008	/* 40 Mhz */
+#define	HAL_RX_DELIM_CRC_PRE	0x0010	/* crc error in delimiter pre */
+#define	HAL_RX_DELIM_CRC_POST	0x0020	/* crc error in delim after */
+#define	HAL_RX_DECRYPT_BUSY	0x0040	/* decrypt was too slow */
+#define	HAL_RX_HI_RX_CHAIN	0x0080	/* SM power save: hi Rx chain control */
+#define	HAL_RX_IS_APSD		0x0100	/* Is ASPD trigger frame */
 
 enum {
 	HAL_PHYERR_UNDERRUN		= 0,	/* Transmit underrun */
@@ -178,6 +182,8 @@ enum {
 	HAL_PHYERR_HT_CRC_ERROR		= 34,	/* */
 	HAL_PHYERR_HT_LENGTH_ILLEGAL	= 35,	/* */
 	HAL_PHYERR_HT_RATE_ILLEGAL	= 36,	/* */
+
+	HAL_PHYERR_SPECTRAL		= 38,
 };
 
 /* value found in rs_keyix to mark invalid entries */