svn commit: r195799 - head/sys/powerpc/mpc85xx

[Rafal Jaworowski]

Author: raj
Date: Tue Jul 21 08:38:45 2009
New Revision: 195799
URL: http://svn.freebsd.org/changeset/base/195799

Log:
  Do not use OCP85XX_LBC_OFF twice when accessing LBC registers on MPC85XX.
  
  It turns LBC control registers were not programmed correctly on MPC85XX. We
  were accessing bogus addresses as the base offset (OCP85XX_LBC_OFF) was
  erroneously added during offset calculations.  Effectively the state of LBC
  control registers was not altered by the kernel initialization code, but
  everything worked as long as we coincided to use the same settings (LBC decode
  windows) as firmware has initialized.
  
  Submitted by:	Lukasz Wojcik
  Reviewed by:	marcel
  Approved by:	re (kensmith)
  Obtained from:	Semihalf

Modified:
  head/sys/powerpc/mpc85xx/lbc.h

Modified: head/sys/powerpc/mpc85xx/lbc.h
==============================================================================
--- head/sys/powerpc/mpc85xx/lbc.h	Tue Jul 21 08:29:19 2009	(r195798)
+++ head/sys/powerpc/mpc85xx/lbc.h	Tue Jul 21 08:38:45 2009	(r195799)
@@ -39,10 +39,10 @@
 #define	LBC_DEVTYPE_RTC		2
 
 /* Local access registers */
-#define	LBC85XX_BR(n)	(OCP85XX_LBC_OFF + (8 * n))
-#define	LBC85XX_OR(n)	(OCP85XX_LBC_OFF + 4 + (8 * n))
-#define	LBC85XX_LBCR	(OCP85XX_LBC_OFF + 0xd0)
-#define	LBC85XX_LCRR	(OCP85XX_LBC_OFF + 0xd4)
+#define	LBC85XX_BR(n)	(8 * n)
+#define	LBC85XX_OR(n)	(4 + (8 * n))
+#define	LBC85XX_LBCR	(0xd0)
+#define	LBC85XX_LCRR	(0xd4)
 
 /* LBC machine select */
 #define	LBCRES_MSEL_GPCM	0