svn commit: r365187 - head/sys/dev/oce
Mateusz Guzik
mjg at FreeBSD.org
Tue Sep 1 22:02:39 UTC 2020
Author: mjg
Date: Tue Sep 1 22:02:32 2020
New Revision: 365187
URL: https://svnweb.freebsd.org/changeset/base/365187
Log:
oce: clean up empty lines in .c and .h files
Modified:
head/sys/dev/oce/oce_hw.c
head/sys/dev/oce/oce_hw.h
head/sys/dev/oce/oce_if.c
head/sys/dev/oce/oce_if.h
head/sys/dev/oce/oce_mbox.c
head/sys/dev/oce/oce_queue.c
head/sys/dev/oce/oce_sysctl.c
head/sys/dev/oce/oce_user.h
head/sys/dev/oce/oce_util.c
Modified: head/sys/dev/oce/oce_hw.c
==============================================================================
--- head/sys/dev/oce/oce_hw.c Tue Sep 1 22:02:12 2020 (r365186)
+++ head/sys/dev/oce/oce_hw.c Tue Sep 1 22:02:32 2020 (r365187)
@@ -40,7 +40,6 @@
/* $FreeBSD$ */
-
#include "oce_if.h"
static int oce_POST(POCE_SOFTC sc);
@@ -98,7 +97,7 @@ oce_hw_init(POCE_SOFTC sc)
rc = oce_POST(sc);
if (rc)
return rc;
-
+
/* create the bootstrap mailbox */
rc = oce_dma_alloc(sc, sizeof(struct oce_bmbx), &sc->bsmbx, 0);
if (rc) {
@@ -115,30 +114,27 @@ oce_hw_init(POCE_SOFTC sc)
if (rc)
goto error;
-
rc = oce_get_fw_version(sc);
if (rc)
goto error;
-
rc = oce_get_fw_config(sc);
if (rc)
goto error;
-
sc->macaddr.size_of_struct = 6;
rc = oce_read_mac_addr(sc, 0, 1, MAC_ADDRESS_TYPE_NETWORK,
&sc->macaddr);
if (rc)
goto error;
-
+
if ((IS_BE(sc) && (sc->flags & OCE_FLAGS_BE3)) || IS_SH(sc)) {
rc = oce_mbox_check_native_mode(sc);
if (rc)
goto error;
} else
sc->be3_native = 0;
-
+
return rc;
error:
@@ -147,8 +143,6 @@ error:
return rc;
}
-
-
/**
* @brief Releases the obtained pci resources
* @param sc software handle to the device
@@ -194,9 +188,6 @@ oce_hw_pci_free(POCE_SOFTC sc)
}
}
-
-
-
/**
* @brief Function to get the PCI capabilities
* @param sc software handle to the device
@@ -284,7 +275,7 @@ oce_hw_pci_alloc(POCE_SOFTC sc)
if (intf.bits.sli_valid != OCE_INTF_VALID_SIG)
goto error;
-
+
if (intf.bits.sli_rev != OCE_INTF_SLI_REV4) {
device_printf(sc->dev, "Adapter doesnt support SLI4\n");
goto error;
@@ -329,7 +320,6 @@ error:
return ENXIO;
}
-
/**
* @brief Function for device shutdown
* @param sc software handle to the device
@@ -363,7 +353,6 @@ oce_hw_shutdown(POCE_SOFTC sc)
oce_dma_free(sc, &sc->bsmbx);
}
-
/**
* @brief Function for creating nw interface.
* @param sc software handle to the device
@@ -480,7 +469,7 @@ oce_hw_start(POCE_SOFTC sc)
rc = oce_get_link_status(sc, &link);
if (rc)
return 1;
-
+
if (link.logical_link_status == NTWK_LOGICAL_LINK_UP) {
sc->link_status = NTWK_LOGICAL_LINK_UP;
if_link_state_change(sc->ifp, LINK_STATE_UP);
@@ -493,7 +482,7 @@ oce_hw_start(POCE_SOFTC sc)
sc->qos_link_speed = (uint32_t )link.qos_link_speed * 10;
rc = oce_start_mq(sc->mq);
-
+
/* we need to get MCC aync events. So enable intrs and arm
first EQ, Other EQs will be armed after interface is UP
*/
@@ -508,7 +497,6 @@ oce_hw_start(POCE_SOFTC sc)
return rc;
}
-
/**
* @brief Function for hardware enable interupts.
* @param sc software handle to the device
@@ -524,7 +512,6 @@ oce_hw_intr_enable(POCE_SOFTC sc)
}
-
/**
* @brief Function for hardware disable interupts
* @param sc software handle to the device
@@ -533,13 +520,12 @@ void
oce_hw_intr_disable(POCE_SOFTC sc)
{
uint32_t reg;
-
+
reg = OCE_READ_REG32(sc, devcfg, PCICFG_INTR_CTRL);
reg &= ~HOSTINTR_MASK;
OCE_WRITE_REG32(sc, devcfg, PCICFG_INTR_CTRL, reg);
}
-
static u_int
oce_copy_maddr(void *arg, struct sockaddr_dl *sdl, u_int cnt)
{
@@ -554,7 +540,6 @@ oce_copy_maddr(void *arg, struct sockaddr_dl *sdl, u_i
return (1);
}
-
/**
* @brief Function for hardware update multicast filter
* @param sc software handle to the device
@@ -589,4 +574,3 @@ oce_hw_update_multicast(POCE_SOFTC sc)
oce_dma_free(sc, &dma);
return rc;
}
-
Modified: head/sys/dev/oce/oce_hw.h
==============================================================================
--- head/sys/dev/oce/oce_hw.h Tue Sep 1 22:02:12 2020 (r365186)
+++ head/sys/dev/oce/oce_hw.h Tue Sep 1 22:02:32 2020 (r365187)
@@ -61,7 +61,6 @@
#define INTR_EN 0x20000000
#define IMAGE_TRANSFER_SIZE (32 * 1024) /* 32K at a time */
-
/********* UE Status and Mask Registers ***/
#define PCICFG_UE_STATUS_LOW 0xA0
#define PCICFG_UE_STATUS_HIGH 0xA4
@@ -271,8 +270,6 @@ typedef union pci_sli_intf_u {
} bits;
} pci_sli_intf_t;
-
-
/* physical address structure to be used in MBX */
struct phys_addr {
/* dw0 */
@@ -281,8 +278,6 @@ struct phys_addr {
uint32_t hi;
};
-
-
typedef union pcicfg_intr_ctl_u {
uint32_t dw0;
struct {
@@ -304,9 +299,6 @@ typedef union pcicfg_intr_ctl_u {
} bits;
} pcicfg_intr_ctl_t;
-
-
-
typedef union pcicfg_semaphore_u {
uint32_t dw0;
struct {
@@ -320,9 +312,6 @@ typedef union pcicfg_semaphore_u {
} bits;
} pcicfg_semaphore_t;
-
-
-
typedef union pcicfg_soft_reset_u {
uint32_t dw0;
struct {
@@ -344,9 +333,6 @@ typedef union pcicfg_soft_reset_u {
} bits;
} pcicfg_soft_reset_t;
-
-
-
typedef union pcicfg_online1_u {
uint32_t dw0;
struct {
@@ -400,8 +386,6 @@ typedef union pcicfg_online1_u {
} bits;
} pcicfg_online1_t;
-
-
typedef union mpu_ep_semaphore_u {
uint32_t dw0;
struct {
@@ -427,9 +411,6 @@ typedef union mpu_ep_semaphore_u {
} bits;
} mpu_ep_semaphore_t;
-
-
-
typedef union mpu_ep_control_u {
uint32_t dw0;
struct {
@@ -453,9 +434,6 @@ typedef union mpu_ep_control_u {
} bits;
} mpu_ep_control_t;
-
-
-
/* RX doorbell */
typedef union pd_rxulp_db_u {
uint32_t dw0;
@@ -474,7 +452,6 @@ typedef union pd_rxulp_db_u {
} bits;
} pd_rxulp_db_t;
-
/* TX doorbell */
typedef union pd_txulp_db_u {
uint32_t dw0;
@@ -777,7 +754,6 @@ struct oce_async_event_qnq {
uint32_t code;
} ;
-
typedef union oce_mq_ext_ctx_u {
uint32_t dw[6];
struct {
@@ -861,7 +837,6 @@ typedef union oce_mq_ext_ctx_u {
} oce_mq_ext_ctx_t;
-
/* MQ mailbox structure */
struct oce_bmbx {
struct oce_mbx mbx;
@@ -1554,8 +1529,6 @@ struct mbx_create_common_mq_ex {
} params;
};
-
-
/* [53] OPCODE_COMMON_DESTROY_MQ */
struct mbx_destroy_common_mq {
struct mbx_hdr hdr;
@@ -1710,7 +1683,6 @@ struct mbx_common_query_fw_config {
uint32_t port_id; /* used for stats retrieval */
uint32_t function_mode;
struct {
-
uint32_t ulp_mode;
uint32_t nic_wqid_base;
uint32_t nic_wq_tot;
@@ -1806,7 +1778,6 @@ enum CQFW_FUNCTION_MODES_SUPPORTED {
FNM_VNIC_DEF_EN = 0x800000 /* Set when VNIC Default enabled */
};
-
struct mbx_common_config_vlan {
struct mbx_hdr hdr;
union {
@@ -2098,7 +2069,6 @@ struct mbx_common_get_func_config {
} params;
};
-
/* OPCODE_COMMON_GET_PROFILE_CONFIG */
struct mbx_common_get_profile_config {
@@ -2150,7 +2120,6 @@ struct oce_nic_resc_desc {
};
-
struct flash_file_hdr {
uint8_t sign[52];
uint8_t ufi_version[4];
@@ -2198,7 +2167,6 @@ struct flash_sec_info {
struct flash_section_entry fsec_entry[32];
};
-
enum LOWLEVEL_SUBSYSTEM_OPCODES {
/* Opcodes used for lowlevel functions common to many subystems.
* Some of these opcodes are used for diagnostic functions only.
@@ -2896,8 +2864,6 @@ struct mbx_delete_nic_wq {
} params;
};
-
-
struct mbx_create_nic_rq {
struct mbx_hdr hdr;
union {
@@ -2921,8 +2887,6 @@ struct mbx_create_nic_rq {
} params;
};
-
-
/* [10] NIC_DELETE_RQ */
struct mbx_delete_nic_rq {
/* dw0 - dw3 */
@@ -2947,9 +2911,6 @@ struct mbx_delete_nic_rq {
} params;
};
-
-
-
struct oce_port_rxf_stats_v0 {
uint32_t rx_bytes_lsd; /* dword 0*/
uint32_t rx_bytes_msd; /* dword 1*/
@@ -3019,7 +2980,6 @@ struct oce_port_rxf_stats_v0 {
uint32_t rx_input_fifo_overflow_drop; /* dword 65*/
};
-
struct oce_rxf_stats_v0 {
struct oce_port_rxf_stats_v0 port[2];
uint32_t rx_drops_no_pbuf; /* dword 132*/
@@ -3090,7 +3050,6 @@ struct oce_port_rxf_stats_v2 {
uint32_t rsvd7[19];
};
-
struct oce_port_rxf_stats_v1 {
uint32_t rsvd0[12];
uint32_t rx_crc_errors;
@@ -3167,7 +3126,6 @@ struct oce_erx_stats_v1 {
uint32_t rsvd[4];
};
-
struct oce_erx_stats_v0 {
uint32_t rx_drops_no_fragments[44];
uint32_t rsvd[4];
@@ -3186,7 +3144,6 @@ struct oce_hw_stats_v2 {
uint32_t rsvd1[18];
};
-
struct oce_hw_stats_v1 {
struct oce_rxf_stats_v1 rxf;
uint32_t rsvd0[OCE_TXP_SW_SZ];
@@ -3445,7 +3402,6 @@ struct mbx_get_queue_stats {
} params;
};
-
/* [01] NIC_CONFIG_RSS */
#define OCE_HASH_TBL_SZ 10
#define OCE_CPU_TBL_SZ 128
@@ -3478,11 +3434,9 @@ struct mbx_config_nic_rss {
} rsp;
} params;
};
-
#pragma pack()
-
typedef uint32_t oce_stat_t; /* statistic counter */
enum OCE_RXF_PORT_STATS {
@@ -3885,7 +3839,6 @@ struct mbx_nic_set_iface_lro_config {
} params;
};
-
struct mbx_create_nic_rq_v2 {
struct mbx_hdr hdr;
union {
@@ -4074,7 +4027,7 @@ struct nic_hwlro_singleton_cqe {
uint32_t debug:7;
uint32_t cqe_type:2;
uint32_t valid:1;
-
+
/* dw 3 */
uint32_t rss_hash_value;
#endif
Modified: head/sys/dev/oce/oce_if.c
==============================================================================
--- head/sys/dev/oce/oce_if.c Tue Sep 1 22:02:12 2020 (r365186)
+++ head/sys/dev/oce/oce_if.c Tue Sep 1 22:02:32 2020 (r365187)
@@ -132,7 +132,6 @@ struct oce_common_cqe_info{
uint16_t vtag;
};
-
/* Driver entry points prototypes */
static int oce_probe(device_t dev);
static int oce_attach(device_t dev);
@@ -190,7 +189,6 @@ static void oce_get_config(POCE_SOFTC sc);
static struct mbuf *oce_insert_vlan_tag(POCE_SOFTC sc, struct mbuf *m, boolean_t *complete);
static void oce_read_env_variables(POCE_SOFTC sc);
-
/* IP specific */
#if defined(INET6) || defined(INET)
static int oce_init_lro(POCE_SOFTC sc);
@@ -213,7 +211,6 @@ static driver_t oce_driver = {
};
static devclass_t oce_devclass;
-
/* global vars */
const char component_revision[32] = {"///" COMPONENT_REVISION "///"};
@@ -225,7 +222,6 @@ uint32_t oce_rq_buf_size = 2048;
TUNABLE_INT("hw.oce.max_rsp_handled", &oce_max_rsp_handled);
TUNABLE_INT("hw.oce.enable_rss", &oce_enable_rss);
-
/* Supported devices table */
static uint32_t supportedDevices[] = {
(PCI_VENDOR_SERVERENGINES << 16) | PCI_PRODUCT_BE2,
@@ -236,7 +232,6 @@ static uint32_t supportedDevices[] = {
(PCI_VENDOR_EMULEX << 16) | PCI_PRODUCT_SH
};
-
DRIVER_MODULE(oce, pci, oce_driver, oce_devclass, 0, 0);
MODULE_PNP_INFO("W32:vendor/device", pci, oce, supportedDevices,
nitems(supportedDevices));
@@ -244,7 +239,6 @@ MODULE_DEPEND(oce, pci, 1, 1, 1);
MODULE_DEPEND(oce, ether, 1, 1, 1);
MODULE_VERSION(oce, 1);
-
POCE_SOFTC softc_head = NULL;
POCE_SOFTC softc_tail = NULL;
@@ -302,7 +296,6 @@ oce_probe(device_t dev)
return ENXIO;
}
-
static int
oce_attach(device_t dev)
{
@@ -414,7 +407,6 @@ pci_res_free:
}
-
static int
oce_detach(device_t dev)
{
@@ -441,7 +433,7 @@ oce_detach(device_t dev)
UNLOCK(&sc->dev_lock);
callout_drain(&sc->timer);
-
+
if (sc->vlan_attach != NULL)
EVENTHANDLER_DEREGISTER(vlan_config, sc->vlan_attach);
if (sc->vlan_detach != NULL)
@@ -458,18 +450,16 @@ oce_detach(device_t dev)
return 0;
}
-
static int
oce_shutdown(device_t dev)
{
int rc;
-
+
rc = oce_detach(dev);
return rc;
}
-
static int
oce_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
{
@@ -481,7 +471,6 @@ oce_ioctl(struct ifnet *ifp, u_long command, caddr_t d
uint32_t u;
switch (command) {
-
case SIOCGIFMEDIA:
rc = ifmedia_ioctl(ifp, ifr, &sc->media, command);
break;
@@ -634,24 +623,22 @@ oce_ioctl(struct ifnet *ifp, u_long command, caddr_t d
return rc;
}
-
static void
oce_init(void *arg)
{
POCE_SOFTC sc = arg;
-
+
LOCK(&sc->dev_lock);
if (sc->ifp->if_flags & IFF_UP) {
oce_if_deactivate(sc);
oce_if_activate(sc);
}
-
+
UNLOCK(&sc->dev_lock);
}
-
static int
oce_multiq_start(struct ifnet *ifp, struct mbuf *m)
{
@@ -676,7 +663,6 @@ oce_multiq_start(struct ifnet *ifp, struct mbuf *m)
}
-
static void
oce_multiq_flush(struct ifnet *ifp)
{
@@ -691,8 +677,6 @@ oce_multiq_flush(struct ifnet *ifp)
if_qflush(ifp);
}
-
-
/*****************************************************************************
* Driver interrupt routines functions *
*****************************************************************************/
@@ -708,7 +692,6 @@ oce_intr(void *arg, int pending)
struct oce_cq *cq = NULL;
int i, num_eqes = 0;
-
bus_dmamap_sync(eq->ring->dma.tag, eq->ring->dma.map,
BUS_DMASYNC_POSTWRITE);
do {
@@ -722,7 +705,7 @@ oce_intr(void *arg, int pending)
num_eqes++;
} while (TRUE);
-
+
if (!num_eqes)
goto eq_arm; /* Spurious */
@@ -747,7 +730,6 @@ eq_arm:
return;
}
-
static int
oce_setup_intr(POCE_SOFTC sc)
{
@@ -816,7 +798,6 @@ error:
return rc;
}
-
static int
oce_fast_isr(void *arg)
{
@@ -835,7 +816,6 @@ oce_fast_isr(void *arg)
return FILTER_HANDLED;
}
-
static int
oce_alloc_intr(POCE_SOFTC sc, int vector, void (*isr) (void *arg, int pending))
{
@@ -885,12 +865,11 @@ oce_alloc_intr(POCE_SOFTC sc, int vector, void (*isr)
}
-
void
oce_intr_free(POCE_SOFTC sc)
{
int i = 0;
-
+
for (i = 0; i < sc->intr_count; i++) {
if (sc->intrs[i].tag != NULL)
@@ -912,8 +891,6 @@ oce_intr_free(POCE_SOFTC sc)
}
-
-
/******************************************************************************
* Media callbacks functions *
******************************************************************************/
@@ -923,15 +900,14 @@ oce_media_status(struct ifnet *ifp, struct ifmediareq
{
POCE_SOFTC sc = (POCE_SOFTC) ifp->if_softc;
-
req->ifm_status = IFM_AVALID;
req->ifm_active = IFM_ETHER;
-
+
if (sc->link_status == 1)
req->ifm_status |= IFM_ACTIVE;
else
return;
-
+
switch (sc->link_speed) {
case 1: /* 10 Mbps */
req->ifm_active |= IFM_10_T | IFM_FDX;
@@ -965,18 +941,16 @@ oce_media_status(struct ifnet *ifp, struct ifmediareq
sc->speed = 0;
break;
}
-
+
return;
}
-
int
oce_media_change(struct ifnet *ifp)
{
return 0;
}
-
static void oce_is_pkt_dest_bmc(POCE_SOFTC sc,
struct mbuf *m, boolean_t *os2bmc,
struct mbuf **m_new)
@@ -1050,8 +1024,6 @@ done:
}
}
-
-
/*****************************************************************************
* Transmit routines functions *
*****************************************************************************/
@@ -1094,7 +1066,6 @@ oce_tx(POCE_SOFTC sc, struct mbuf **mpp, int wq_index)
device_printf(sc->dev, "Insertion unsuccessful\n");
return 0;
}
-
}
/* Lancer, SH ASIC has a bug wherein Packets that are 32 bytes or less
@@ -1123,7 +1094,6 @@ tx_start:
}
}
-
pd = &wq->pckts[wq->pkt_desc_head];
retry:
@@ -1252,7 +1222,7 @@ retry:
m = m_new;
goto tx_start;
}
-
+
return 0;
free_ret:
@@ -1261,7 +1231,6 @@ free_ret:
return rc;
}
-
static void
oce_process_tx_completion(struct oce_wq *wq)
{
@@ -1280,7 +1249,6 @@ oce_process_tx_completion(struct oce_wq *wq)
m_freem(m);
pd->mbuf = NULL;
-
if (sc->ifp->if_drv_flags & IFF_DRV_OACTIVE) {
if (wq->ring->num_used < (wq->ring->num_items / 2)) {
sc->ifp->if_drv_flags &= ~(IFF_DRV_OACTIVE);
@@ -1289,7 +1257,6 @@ oce_process_tx_completion(struct oce_wq *wq)
}
}
-
static void
oce_tx_restart(POCE_SOFTC sc, struct oce_wq *wq)
{
@@ -1302,7 +1269,6 @@ oce_tx_restart(POCE_SOFTC sc, struct oce_wq *wq)
}
-
#if defined(INET6) || defined(INET)
static struct mbuf *
oce_tso_setup(POCE_SOFTC sc, struct mbuf **mpp)
@@ -1318,7 +1284,7 @@ oce_tso_setup(POCE_SOFTC sc, struct mbuf **mpp)
struct tcphdr *th;
uint16_t etype;
int total_len = 0, ehdrlen = 0;
-
+
m = *mpp;
if (M_WRITABLE(m) == 0) {
@@ -1362,13 +1328,13 @@ oce_tso_setup(POCE_SOFTC sc, struct mbuf **mpp)
default:
return NULL;
}
-
+
m = m_pullup(m, total_len);
if (!m)
return NULL;
*mpp = m;
return m;
-
+
}
#endif /* INET6 || INET */
@@ -1389,7 +1355,6 @@ oce_tx_task(void *arg, int npending)
UNLOCK(&wq->tx_lock);
}
-
void
oce_start(struct ifnet *ifp)
{
@@ -1404,7 +1369,7 @@ oce_start(struct ifnet *ifp)
if (!sc->link_status)
return;
-
+
while (true) {
IF_DEQUEUE(&sc->ifp->if_snd, m);
if (m == NULL)
@@ -1425,7 +1390,6 @@ oce_start(struct ifnet *ifp)
}
}
-
/* Handle the Completion Queue for transmit */
uint16_t
oce_wq_handler(void *arg)
@@ -1460,12 +1424,11 @@ oce_wq_handler(void *arg)
if (num_cqes)
oce_arm_cq(sc, cq->cq_id, num_cqes, FALSE);
-
+
UNLOCK(&wq->tx_compl_lock);
return num_cqes;
}
-
static int
oce_multiq_transmit(struct ifnet *ifp, struct mbuf *m, struct oce_wq *wq)
{
@@ -1505,9 +1468,6 @@ oce_multiq_transmit(struct ifnet *ifp, struct mbuf *m,
return 0;
}
-
-
-
/*****************************************************************************
* Receive routines functions *
*****************************************************************************/
@@ -1730,7 +1690,7 @@ oce_rx(struct oce_rq *rq, struct oce_nic_rx_cqe *cqe)
vtag = BSWAP_16(cqe->u0.s.vlan_tag);
else
vtag = cqe->u0.s.vlan_tag;
-
+
cq_info.l4_cksum_pass = cqe->u0.s.l4_cksum_pass;
cq_info.ip_cksum_pass = cqe->u0.s.ip_cksum_pass;
cq_info.ipv6_frame = cqe->u0.s.ip_ver;
@@ -1773,7 +1733,6 @@ oce_rx(struct oce_rq *rq, struct oce_nic_rx_cqe *cqe)
(cqe->u0.s.l4_cksum_pass) &&
(!cqe->u0.s.ip_ver) &&
(rq->lro.lro_cnt != 0)) {
-
if (tcp_lro_rx(&rq->lro, m, 0) == 0) {
rq->lro_pkts_queued ++;
goto post_done;
@@ -1781,7 +1740,7 @@ oce_rx(struct oce_rq *rq, struct oce_nic_rx_cqe *cqe)
/* If LRO posting fails then try to post to STACK */
}
#endif
-
+
(*sc->ifp->if_input) (sc->ifp, m);
#if defined(INET6) || defined(INET)
post_done:
@@ -1799,7 +1758,6 @@ exit:
return;
}
-
void
oce_discard_rx_comp(struct oce_rq *rq, int num_frags)
{
@@ -1826,7 +1784,6 @@ oce_discard_rx_comp(struct oce_rq *rq, int num_frags)
}
}
-
static int
oce_cqe_vtp_valid(POCE_SOFTC sc, struct oce_nic_rx_cqe *cqe)
{
@@ -1838,12 +1795,11 @@ oce_cqe_vtp_valid(POCE_SOFTC sc, struct oce_nic_rx_cqe
vtp = cqe_v1->u0.s.vlan_tag_present;
} else
vtp = cqe->u0.s.vlan_tag_present;
-
+
return vtp;
}
-
static int
oce_cqe_portid_valid(POCE_SOFTC sc, struct oce_nic_rx_cqe *cqe)
{
@@ -1857,7 +1813,7 @@ oce_cqe_portid_valid(POCE_SOFTC sc, struct oce_nic_rx_
return 0;
} else
;/* For BE3 legacy and Lancer this is dummy */
-
+
return 1;
}
@@ -1874,11 +1830,10 @@ oce_rx_flush_lro(struct oce_rq *rq)
tcp_lro_flush_all(lro);
rq->lro_pkts_queued = 0;
-
+
return;
}
-
static int
oce_init_lro(POCE_SOFTC sc)
{
@@ -1898,7 +1853,6 @@ oce_init_lro(POCE_SOFTC sc)
return rc;
}
-
void
oce_free_lro(POCE_SOFTC sc)
{
@@ -1991,7 +1945,7 @@ oce_alloc_rx_bufs(struct oce_rq *rq, int count)
}
}
}
-
+
return 0;
}
@@ -2143,9 +2097,6 @@ oce_rq_handler(void *arg)
}
-
-
-
/*****************************************************************************
* Helper function prototypes in this file *
*****************************************************************************/
@@ -2191,7 +2142,7 @@ oce_attach_ifp(POCE_SOFTC sc)
sc->ifp->if_capabilities |= IFCAP_LRO;
sc->ifp->if_capabilities |= IFCAP_VLAN_HWTSO;
#endif
-
+
sc->ifp->if_capenable = sc->ifp->if_capabilities;
sc->ifp->if_baudrate = IF_Gbps(10);
@@ -2200,11 +2151,10 @@ oce_attach_ifp(POCE_SOFTC sc)
sc->ifp->if_hw_tsomaxsegsize = 4096;
ether_ifattach(sc->ifp, sc->macaddr.mac_addr);
-
+
return 0;
}
-
static void
oce_add_vlan(void *arg, struct ifnet *ifp, uint16_t vtag)
{
@@ -2221,7 +2171,6 @@ oce_add_vlan(void *arg, struct ifnet *ifp, uint16_t vt
oce_vid_config(sc);
}
-
static void
oce_del_vlan(void *arg, struct ifnet *ifp, uint16_t vtag)
{
@@ -2237,7 +2186,6 @@ oce_del_vlan(void *arg, struct ifnet *ifp, uint16_t vt
oce_vid_config(sc);
}
-
/*
* A max of 64 vlans can be configured in BE. If the user configures
* more, place the card in vlan promiscuous mode.
@@ -2266,14 +2214,12 @@ oce_vid_config(POCE_SOFTC sc)
return status;
}
-
static void
oce_mac_addr_set(POCE_SOFTC sc)
{
uint32_t old_pmac_id = sc->pmac_id;
int status = 0;
-
status = bcmp((IF_LLADDR(sc->ifp)), sc->macaddr.mac_addr,
sc->macaddr.size_of_struct);
if (!status)
@@ -2291,7 +2237,6 @@ oce_mac_addr_set(POCE_SOFTC sc)
}
-
static int
oce_handle_passthrough(struct ifnet *ifp, caddr_t data)
{
@@ -2501,22 +2446,21 @@ static void oce_detect_hw_error(POCE_SOFTC sc)
}
-
static void
oce_local_timer(void *arg)
{
POCE_SOFTC sc = arg;
int i = 0;
-
+
oce_detect_hw_error(sc);
oce_refresh_nic_stats(sc);
oce_refresh_queue_stats(sc);
oce_mac_addr_set(sc);
-
+
/* TX Watch Dog*/
for (i = 0; i < sc->nwqs; i++)
oce_tx_restart(sc, sc->wq[i]);
-
+
/* calculate and set the eq delay for optimal interrupt rate */
if (IS_BE(sc) || IS_SH(sc))
oce_eqd_set_periodic(sc);
@@ -2613,7 +2557,6 @@ oce_if_deactivate(POCE_SOFTC sc)
DELAY(10);
}
*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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