svn commit: r365086 - in head/sys/dev/sfxge: . common
Mateusz Guzik
mjg at FreeBSD.org
Tue Sep 1 21:29:06 UTC 2020
Author: mjg
Date: Tue Sep 1 21:29:01 2020
New Revision: 365086
URL: https://svnweb.freebsd.org/changeset/base/365086
Log:
sfxge: clean up empty lines in .c and .h files
Modified:
head/sys/dev/sfxge/common/ef10_ev.c
head/sys/dev/sfxge/common/ef10_filter.c
head/sys/dev/sfxge/common/ef10_image.c
head/sys/dev/sfxge/common/ef10_impl.h
head/sys/dev/sfxge/common/ef10_intr.c
head/sys/dev/sfxge/common/ef10_mac.c
head/sys/dev/sfxge/common/ef10_mcdi.c
head/sys/dev/sfxge/common/ef10_nic.c
head/sys/dev/sfxge/common/ef10_nvram.c
head/sys/dev/sfxge/common/ef10_phy.c
head/sys/dev/sfxge/common/ef10_rx.c
head/sys/dev/sfxge/common/ef10_tlv_layout.h
head/sys/dev/sfxge/common/ef10_tx.c
head/sys/dev/sfxge/common/ef10_vpd.c
head/sys/dev/sfxge/common/efsys.h
head/sys/dev/sfxge/common/efx.h
head/sys/dev/sfxge/common/efx_bootcfg.c
head/sys/dev/sfxge/common/efx_ev.c
head/sys/dev/sfxge/common/efx_filter.c
head/sys/dev/sfxge/common/efx_hash.c
head/sys/dev/sfxge/common/efx_impl.h
head/sys/dev/sfxge/common/efx_intr.c
head/sys/dev/sfxge/common/efx_lic.c
head/sys/dev/sfxge/common/efx_mac.c
head/sys/dev/sfxge/common/efx_mcdi.c
head/sys/dev/sfxge/common/efx_mcdi.h
head/sys/dev/sfxge/common/efx_mon.c
head/sys/dev/sfxge/common/efx_nic.c
head/sys/dev/sfxge/common/efx_nvram.c
head/sys/dev/sfxge/common/efx_phy.c
head/sys/dev/sfxge/common/efx_phy_ids.h
head/sys/dev/sfxge/common/efx_regs.h
head/sys/dev/sfxge/common/efx_regs_ef10.h
head/sys/dev/sfxge/common/efx_regs_mcdi.h
head/sys/dev/sfxge/common/efx_regs_mcdi_aoe.h
head/sys/dev/sfxge/common/efx_regs_pci.h
head/sys/dev/sfxge/common/efx_rx.c
head/sys/dev/sfxge/common/efx_sram.c
head/sys/dev/sfxge/common/efx_tunnel.c
head/sys/dev/sfxge/common/efx_tx.c
head/sys/dev/sfxge/common/efx_types.h
head/sys/dev/sfxge/common/hunt_impl.h
head/sys/dev/sfxge/common/hunt_nic.c
head/sys/dev/sfxge/common/mcdi_mon.c
head/sys/dev/sfxge/common/mcdi_mon.h
head/sys/dev/sfxge/common/medford2_impl.h
head/sys/dev/sfxge/common/medford2_nic.c
head/sys/dev/sfxge/common/medford_impl.h
head/sys/dev/sfxge/common/medford_nic.c
head/sys/dev/sfxge/common/siena_flash.h
head/sys/dev/sfxge/common/siena_impl.h
head/sys/dev/sfxge/common/siena_mcdi.c
head/sys/dev/sfxge/common/siena_nic.c
head/sys/dev/sfxge/common/siena_nvram.c
head/sys/dev/sfxge/sfxge.c
head/sys/dev/sfxge/sfxge.h
head/sys/dev/sfxge/sfxge_ev.c
head/sys/dev/sfxge/sfxge_intr.c
head/sys/dev/sfxge/sfxge_mcdi.c
head/sys/dev/sfxge/sfxge_nvram.c
head/sys/dev/sfxge/sfxge_rx.c
head/sys/dev/sfxge/sfxge_tx.c
head/sys/dev/sfxge/sfxge_tx.h
Modified: head/sys/dev/sfxge/common/ef10_ev.c
==============================================================================
--- head/sys/dev/sfxge/common/ef10_ev.c Tue Sep 1 21:27:34 2020 (r365085)
+++ head/sys/dev/sfxge/common/ef10_ev.c Tue Sep 1 21:29:01 2020 (r365086)
@@ -91,7 +91,6 @@ ef10_ev_mcdi(
__in const efx_ev_callbacks_t *eecp,
__in_opt void *arg);
-
static __checkReturn efx_rc_t
efx_mcdi_set_evq_tmr(
__in efx_nic_t *enp,
@@ -273,7 +272,6 @@ fail1:
return (rc);
}
-
static __checkReturn efx_rc_t
efx_mcdi_init_evq_v2(
__in efx_nic_t *enp,
@@ -440,8 +438,6 @@ fail1:
return (rc);
}
-
-
__checkReturn efx_rc_t
ef10_ev_init(
__in efx_nic_t *enp)
@@ -753,7 +749,6 @@ fail1:
return (rc);
}
-
#if EFSYS_OPT_QSTATS
void
Modified: head/sys/dev/sfxge/common/ef10_filter.c
==============================================================================
--- head/sys/dev/sfxge/common/ef10_filter.c Tue Sep 1 21:27:34 2020 (r365085)
+++ head/sys/dev/sfxge/common/ef10_filter.c Tue Sep 1 21:29:01 2020 (r365086)
@@ -577,7 +577,6 @@ ef10_filter_restore(
enp->en_family == EFX_FAMILY_MEDFORD2);
for (tbl_id = 0; tbl_id < EFX_EF10_FILTER_TBL_ROWS; tbl_id++) {
-
EFSYS_LOCK(enp->en_eslp, state);
spec = ef10_filter_entry_spec(eftp, tbl_id);
@@ -729,7 +728,6 @@ found:
/* This is a filter we are refreshing */
ef10_filter_set_entry_not_auto_old(eftp, ins_index);
goto out_unlock;
-
}
replacing = B_TRUE;
} else {
@@ -835,7 +833,6 @@ fail1:
return (rc);
}
-
static __checkReturn efx_rc_t
ef10_filter_delete_internal(
__in efx_nic_t *enp,
@@ -1288,7 +1285,6 @@ ef10_filter_insert_multicast_list(
/* Only stop upon failure if told to rollback */
goto rollback;
}
-
}
if (brdcst == B_TRUE) {
@@ -1493,7 +1489,6 @@ ef10_filter_remove_old(
}
}
-
static __checkReturn efx_rc_t
ef10_filter_get_workarounds(
__in efx_nic_t *enp)
@@ -1529,7 +1524,6 @@ fail1:
}
-
/*
* Reconfigure all filters.
* If all_unicst and/or all mulcst filters cannot be applied then
@@ -1767,7 +1761,6 @@ ef10_filter_get_default_rxq(
*using_rss = table->eft_using_rss;
}
-
void
ef10_filter_default_rxq_set(
__in efx_nic_t *enp,
@@ -1796,7 +1789,6 @@ ef10_filter_default_rxq_clear(
table->eft_default_rxq = NULL;
table->eft_using_rss = B_FALSE;
}
-
#endif /* EFSYS_OPT_FILTER */
Modified: head/sys/dev/sfxge/common/ef10_image.c
==============================================================================
--- head/sys/dev/sfxge/common/ef10_image.c Tue Sep 1 21:27:34 2020 (r365085)
+++ head/sys/dev/sfxge/common/ef10_image.c Tue Sep 1 21:29:01 2020 (r365086)
@@ -67,7 +67,6 @@ typedef struct efx_asn1_cursor_s {
uint32_t val_size;
} efx_asn1_cursor_t;
-
/* Parse header of DER encoded ASN.1 TLV and match tag */
static __checkReturn efx_rc_t
efx_asn1_parse_header_match_tag(
@@ -305,7 +304,6 @@ fail1:
return (rc);
}
-
/*
* Utility routines for parsing CMS headers (see RFC2315, PKCS#7)
*/
@@ -538,7 +536,6 @@ efx_check_reflash_image(
void *imagep;
efx_rc_t rc;
-
EFSYS_ASSERT(infop != NULL);
if (infop == NULL) {
rc = EINVAL;
@@ -907,8 +904,6 @@ fail1:
return (rc);
}
-
-
#endif /* EFSYS_OPT_IMAGE_LAYOUT */
Modified: head/sys/dev/sfxge/common/ef10_impl.h
==============================================================================
--- head/sys/dev/sfxge/common/ef10_impl.h Tue Sep 1 21:27:34 2020 (r365085)
+++ head/sys/dev/sfxge/common/ef10_impl.h Tue Sep 1 21:29:01 2020 (r365086)
@@ -37,7 +37,6 @@
extern "C" {
#endif
-
/* Number of hardware PIO buffers (for compile-time resource dimensions) */
#define EF10_MAX_PIOBUF_NBUFS (16)
@@ -57,8 +56,6 @@ extern "C" {
# endif
#endif /* EFSYS_OPT_MEDFORD2 */
-
-
/*
* FIXME: This is just a power of 2 which fits in an MCDI v1 message, and could
* possibly be increased, or the write size reported by newer firmware used
@@ -81,7 +78,6 @@ extern "C" {
/* Invalid RSS context handle */
#define EF10_RSS_CONTEXT_INVALID (0xffffffff)
-
/* EV */
__checkReturn efx_rc_t
@@ -240,7 +236,6 @@ extern void
ef10_nic_unprobe(
__in efx_nic_t *enp);
-
/* MAC */
extern __checkReturn efx_rc_t
@@ -311,7 +306,6 @@ ef10_mac_stats_update(
#endif /* EFSYS_OPT_MAC_STATS */
-
/* MCDI */
#if EFSYS_OPT_MCDI
@@ -615,7 +609,6 @@ ef10_nvram_buffer_finish(
#endif /* EFSYS_OPT_NVRAM */
-
/* PHY */
typedef struct ef10_link_state_s {
@@ -876,7 +869,6 @@ ef10_nic_pio_unlink(
__inout efx_nic_t *enp,
__in uint32_t vi_index);
-
/* VPD */
#if EFSYS_OPT_VPD
@@ -942,7 +934,6 @@ ef10_vpd_fini(
#endif /* EFSYS_OPT_VPD */
-
/* RX */
extern __checkReturn efx_rc_t
@@ -956,7 +947,6 @@ ef10_rx_scatter_enable(
__in unsigned int buf_size);
#endif /* EFSYS_OPT_RX_SCATTER */
-
#if EFSYS_OPT_RX_SCALE
extern __checkReturn efx_rc_t
@@ -1166,7 +1156,6 @@ extern void
ef10_filter_default_rxq_clear(
__in efx_nic_t *enp);
-
#endif /* EFSYS_OPT_FILTER */
extern __checkReturn efx_rc_t
@@ -1215,7 +1204,6 @@ efx_mcdi_get_clock(
__out uint32_t *sys_freqp,
__out uint32_t *dpcpu_freqp);
-
extern __checkReturn efx_rc_t
efx_mcdi_get_rxdp_config(
__in efx_nic_t *enp,
@@ -1248,7 +1236,6 @@ efx_mcdi_set_nic_global(
__in uint32_t value);
#endif /* EFSYS_OPT_FW_SUBVARIANT_AWARE */
-
#if EFSYS_OPT_RX_PACKED_STREAM
Modified: head/sys/dev/sfxge/common/ef10_intr.c
==============================================================================
--- head/sys/dev/sfxge/common/ef10_intr.c Tue Sep 1 21:27:34 2020 (r365085)
+++ head/sys/dev/sfxge/common/ef10_intr.c Tue Sep 1 21:29:01 2020 (r365086)
@@ -34,7 +34,6 @@ __FBSDID("$FreeBSD$");
#include "efx.h"
#include "efx_impl.h"
-
#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
__checkReturn efx_rc_t
@@ -47,7 +46,6 @@ ef10_intr_init(
return (0);
}
-
void
ef10_intr_enable(
__in efx_nic_t *enp)
@@ -55,7 +53,6 @@ ef10_intr_enable(
_NOTE(ARGUNUSED(enp))
}
-
void
ef10_intr_disable(
__in efx_nic_t *enp)
@@ -63,14 +60,12 @@ ef10_intr_disable(
_NOTE(ARGUNUSED(enp))
}
-
void
ef10_intr_disable_unlocked(
__in efx_nic_t *enp)
{
_NOTE(ARGUNUSED(enp))
}
-
static __checkReturn efx_rc_t
efx_mcdi_trigger_interrupt(
Modified: head/sys/dev/sfxge/common/ef10_mac.c
==============================================================================
--- head/sys/dev/sfxge/common/ef10_mac.c Tue Sep 1 21:27:34 2020 (r365085)
+++ head/sys/dev/sfxge/common/ef10_mac.c Tue Sep 1 21:29:01 2020 (r365086)
@@ -34,7 +34,6 @@ __FBSDID("$FreeBSD$");
#include "efx.h"
#include "efx_impl.h"
-
#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
__checkReturn efx_rc_t
@@ -442,7 +441,6 @@ ef10_mac_filter_default_rxq_clear(
epp->ep_mulcst_addr_count);
}
-
#if EFSYS_OPT_LOOPBACK
__checkReturn efx_rc_t
@@ -603,7 +601,6 @@ fail1:
#define EF10_MAC_STAT_READ(_esmp, _field, _eqp) \
EFSYS_MEM_READQ((_esmp), (_field) * sizeof (efx_qword_t), _eqp)
-
__checkReturn efx_rc_t
ef10_mac_stats_update(
__in efx_nic_t *enp,
@@ -856,7 +853,6 @@ ef10_mac_stats_update(
EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RXDP_HLB_WAIT_CONDITIONS, &value);
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RXDP_HLB_WAIT]), &value);
-
/* VADAPTER RX */
EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_UNICAST_PACKETS,
&value);
@@ -938,7 +934,6 @@ ef10_mac_stats_update(
EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_OVERFLOW, &value);
EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_OVERFLOW]), &value);
-
if (encp->enc_mac_stats_nstats < MC_CMD_MAC_NSTATS_V2)
goto done;
Modified: head/sys/dev/sfxge/common/ef10_mcdi.c
==============================================================================
--- head/sys/dev/sfxge/common/ef10_mcdi.c Tue Sep 1 21:27:34 2020 (r365085)
+++ head/sys/dev/sfxge/common/ef10_mcdi.c Tue Sep 1 21:29:01 2020 (r365086)
@@ -34,7 +34,6 @@ __FBSDID("$FreeBSD$");
#include "efx.h"
#include "efx_impl.h"
-
#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
#if EFSYS_OPT_MCDI
@@ -42,7 +41,6 @@ __FBSDID("$FreeBSD$");
#ifndef WITH_MCDI_V2
#error "WITH_MCDI_V2 required for EF10 MCDIv2 commands."
#endif
-
__checkReturn efx_rc_t
ef10_mcdi_init(
Modified: head/sys/dev/sfxge/common/ef10_nic.c
==============================================================================
--- head/sys/dev/sfxge/common/ef10_nic.c Tue Sep 1 21:27:34 2020 (r365085)
+++ head/sys/dev/sfxge/common/ef10_nic.c Tue Sep 1 21:29:01 2020 (r365086)
@@ -669,7 +669,6 @@ fail1:
return (rc);
}
-
static __checkReturn efx_rc_t
efx_mcdi_free_vis(
__in efx_nic_t *enp)
@@ -702,7 +701,6 @@ fail1:
return (rc);
}
-
static __checkReturn efx_rc_t
efx_mcdi_alloc_piobuf(
__in efx_nic_t *enp,
@@ -886,7 +884,6 @@ fail1:
enp->en_arch.ef10.ena_piobuf_count = 0;
}
-
static void
ef10_nic_free_piobufs(
__in efx_nic_t *enp)
@@ -1075,7 +1072,6 @@ ef10_get_datapath_caps(
if ((rc = ef10_mcdi_get_pf_count(enp, &encp->enc_hw_pf_count)) != 0)
goto fail1;
-
req.emr_cmd = MC_CMD_GET_CAPABILITIES;
req.emr_in_buf = payload;
req.emr_in_length = MC_CMD_GET_CAPABILITIES_IN_LEN;
@@ -1416,7 +1412,6 @@ fail1:
return (rc);
}
-
#define EF10_LEGACY_PF_PRIVILEGE_MASK \
(MC_CMD_PRIVILEGE_MASK_IN_GRP_ADMIN | \
MC_CMD_PRIVILEGE_MASK_IN_GRP_LINK | \
@@ -1432,7 +1427,6 @@ fail1:
#define EF10_LEGACY_VF_PRIVILEGE_MASK 0
-
__checkReturn efx_rc_t
ef10_get_privilege_mask(
__in efx_nic_t *enp,
@@ -1467,7 +1461,6 @@ fail1:
return (rc);
}
-
#define EFX_EXT_PORT_MAX 4
#define EFX_EXT_PORT_NA 0xFF
@@ -2137,7 +2130,6 @@ fail1:
return (rc);
}
-
__checkReturn efx_rc_t
ef10_nic_reset(
__in efx_nic_t *enp)
@@ -2445,7 +2437,6 @@ ef10_nic_set_hw_unavailable(
EFSYS_PROBE(hw_unavail);
enp->en_reset_flags |= EFX_RESET_HW_UNAVAIL;
}
-
void
ef10_nic_fini(
Modified: head/sys/dev/sfxge/common/ef10_nvram.c
==============================================================================
--- head/sys/dev/sfxge/common/ef10_nvram.c Tue Sep 1 21:27:34 2020 (r365085)
+++ head/sys/dev/sfxge/common/ef10_nvram.c Tue Sep 1 21:29:01 2020 (r365086)
@@ -63,12 +63,10 @@ typedef struct nvram_partition_s {
tlv_cursor_t tlv_cursor;
} nvram_partition_t;
-
static __checkReturn efx_rc_t
tlv_validate_state(
__inout tlv_cursor_t *cursor);
-
static void
tlv_init_block(
__out uint32_t *block)
@@ -130,7 +128,6 @@ tlv_item(
#define TLV_DWORD_COUNT(length) \
(1 + 1 + (((length) + sizeof (uint32_t) - 1) / sizeof (uint32_t)))
-
static uint32_t *
tlv_next_item_ptr(
__in tlv_cursor_t *cursor)
@@ -375,7 +372,6 @@ tlv_last_segment_end(
return (last_segment_end);
}
-
static uint32_t *
tlv_write(
__in tlv_cursor_t *cursor,
@@ -1168,7 +1164,6 @@ fail1:
return (rc);
}
-
__checkReturn efx_rc_t
ef10_nvram_buffer_delete_item(
__in_bcount(buffer_size)
@@ -1233,8 +1228,6 @@ fail1:
return (rc);
}
-
-
/*
* Read and validate a segment from a partition. A segment is a complete
Modified: head/sys/dev/sfxge/common/ef10_phy.c
==============================================================================
--- head/sys/dev/sfxge/common/ef10_phy.c Tue Sep 1 21:27:34 2020 (r365085)
+++ head/sys/dev/sfxge/common/ef10_phy.c Tue Sep 1 21:29:01 2020 (r365086)
@@ -188,7 +188,6 @@ mcdi_phy_decode_link_mode(
}
}
-
void
ef10_phy_link_ev(
__in efx_nic_t *enp,
@@ -335,7 +334,6 @@ ef10_phy_get_link(
&elsp->epls.epls_ld_cap_mask);
}
-
#if EFSYS_OPT_LOOPBACK
/*
* MC_CMD_LOOPBACK and EFX_LOOPBACK names are equivalent, so use the
@@ -598,7 +596,6 @@ fail1:
return (rc);
}
-
#if EFSYS_OPT_PHY_STATS
Modified: head/sys/dev/sfxge/common/ef10_rx.c
==============================================================================
--- head/sys/dev/sfxge/common/ef10_rx.c Tue Sep 1 21:27:34 2020 (r365085)
+++ head/sys/dev/sfxge/common/ef10_rx.c Tue Sep 1 21:29:01 2020 (r365086)
@@ -34,10 +34,8 @@ __FBSDID("$FreeBSD$");
#include "efx.h"
#include "efx_impl.h"
-
#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
-
static __checkReturn efx_rc_t
efx_mcdi_init_rxq(
__in efx_nic_t *enp,
@@ -539,7 +537,6 @@ fail1:
}
#endif /* EFSYS_OPT_RX_SCALE */
-
__checkReturn efx_rc_t
ef10_rx_init(
__in efx_nic_t *enp)
@@ -712,7 +709,6 @@ ef10_rx_scale_tbl_set(
{
efx_rc_t rc;
-
if (rss_context == EFX_RSS_CONTEXT_DEFAULT) {
if (enp->en_rss_context_type == EFX_RX_SCALE_UNAVAILABLE) {
rc = ENOTSUP;
@@ -736,7 +732,6 @@ fail1:
}
#endif /* EFSYS_OPT_RX_SCALE */
-
/*
* EF10 RX pseudo-header
* ---------------------
@@ -972,7 +967,6 @@ ef10_rx_qps_packet_info(
return (pkt_start);
}
-
#endif
Modified: head/sys/dev/sfxge/common/ef10_tlv_layout.h
==============================================================================
--- head/sys/dev/sfxge/common/ef10_tlv_layout.h Tue Sep 1 21:27:34 2020 (r365085)
+++ head/sys/dev/sfxge/common/ef10_tlv_layout.h Tue Sep 1 21:29:01 2020 (r365086)
@@ -85,17 +85,14 @@
* well enough.)
*/
-
#ifndef CI_MGMT_TLV_LAYOUT_H
#define CI_MGMT_TLV_LAYOUT_H
-
/* ----------------------------------------------------------------------------
* General structure (defined by SF-108797-SW)
* ----------------------------------------------------------------------------
*/
-
/* The "end" tag.
*
* (Note that this is *not* followed by length or value fields: anything after
@@ -104,14 +101,12 @@
#define TLV_TAG_END (0xEEEEEEEE)
-
/* Other special reserved tag values.
*/
#define TLV_TAG_SKIP (0x00000000)
#define TLV_TAG_INVALID (0xFFFFFFFF)
-
/* TLV partition header.
*
* In a TLV partition, this must be the first item in the sequence, at offset
@@ -133,7 +128,6 @@ struct tlv_partition_header {
uint32_t total_length;
};
-
/* TLV partition trailer.
*
* In a TLV partition, this must be the last item in the sequence, immediately
@@ -149,7 +143,6 @@ struct tlv_partition_trailer {
uint32_t checksum;
};
-
/* Appendable TLV partition header.
*
* In an appendable TLV partition, this must be the first item in the sequence,
@@ -166,13 +159,11 @@ struct tlv_appendable_partition_header {
uint16_t reserved;
};
-
/* ----------------------------------------------------------------------------
* Configuration items
* ----------------------------------------------------------------------------
*/
-
/* NIC global capabilities.
*/
@@ -184,7 +175,6 @@ struct tlv_global_capabilities {
uint32_t flags;
};
-
/* Siena-style per-port MAC address allocation.
*
* There are <count> addresses, starting at <base_address> and incrementing
@@ -205,7 +195,6 @@ struct tlv_port_mac {
uint16_t stride;
};
-
/* Static VPD.
*
* This is the portion of VPD which is set at manufacturing time and not
@@ -230,7 +219,6 @@ struct tlv_global_static_vpd {
uint8_t bytes[];
};
-
/* Dynamic VPD.
*
* This is the portion of VPD which may be changed (e.g. by firmware updates).
@@ -255,7 +243,6 @@ struct tlv_global_dynamic_vpd {
uint8_t bytes[];
};
-
/* "DBI" PCI config space changes.
*
* This is a set of edits made to the default PCI config space values before
@@ -276,7 +263,6 @@ struct tlv_pf_dbi {
} items[];
};
-
#define TLV_TAG_GLOBAL_DBI (0x00210000)
struct tlv_global_dbi {
@@ -289,7 +275,6 @@ struct tlv_global_dbi {
} items[];
};
-
/* Partition subtype codes.
*
* A subtype may optionally be stored for each type of partition present in
@@ -310,7 +295,6 @@ struct tlv_partition_subtype {
uint8_t description[];
};
-
/* Partition version codes.
*
* A version may optionally be stored for each type of partition present in
@@ -366,7 +350,6 @@ struct tlv_per_pf_pcie_config {
uint16_t msix_vec_base;
};
-
/* Development ONLY. This is a single TLV tag for all the gubbins
* that can be set through the MC command-line other than the PCIe
* settings. This is a temporary measure. */
@@ -411,7 +394,6 @@ struct tlv_global_port_config {
uint32_t max_port_speed;
};
-
/* Firmware options.
*
* This is intended for user-configurable selection of optional firmware
@@ -468,7 +450,6 @@ struct tlv_0v9_settings {
uint16_t panic_high; /* In millivolts */
};
-
/* Clock configuration */
#define TLV_TAG_CLOCK_CONFIG (0x000d0000) /* legacy symbol - do not use */
@@ -496,7 +477,6 @@ struct tlv_clock_config_medford {
uint16_t clk_pcs; /* MHz */
};
-
/* EF10-style global pool of MAC addresses.
*
* There are <count> addresses, starting at <base_address>, which are
@@ -536,7 +516,6 @@ struct tlv_pcie_tx_amp_config {
uint8_t quad_tx_imp50[4];
uint8_t lane_amp[16];
};
-
/* Global PCIe configuration, second revision. This represents the visible PFs
* by a bitmap rather than having the number of the highest visible one. As such
Modified: head/sys/dev/sfxge/common/ef10_tx.c
==============================================================================
--- head/sys/dev/sfxge/common/ef10_tx.c Tue Sep 1 21:27:34 2020 (r365085)
+++ head/sys/dev/sfxge/common/ef10_tx.c Tue Sep 1 21:29:01 2020 (r365086)
@@ -34,7 +34,6 @@ __FBSDID("$FreeBSD$");
#include "efx.h"
#include "efx_impl.h"
-
#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
#if EFSYS_OPT_QSTATS
@@ -393,7 +392,6 @@ ef10_tx_qpio_post(
unsigned int added = *addedp;
efx_rc_t rc;
-
if (added - completed + 1 > EFX_TXQ_LIMIT(etp->et_mask + 1)) {
rc = ENOSPC;
goto fail1;
@@ -716,7 +714,6 @@ ef10_tx_qdesc_checksum_create(
ESF_DZ_TX_OPTION_INNER_IP_CSUM,
(flags & EFX_TXQ_CKSUM_INNER_IPV4) ? 1 : 0);
}
-
__checkReturn efx_rc_t
ef10_tx_qpace(
Modified: head/sys/dev/sfxge/common/ef10_vpd.c
==============================================================================
--- head/sys/dev/sfxge/common/ef10_vpd.c Tue Sep 1 21:27:34 2020 (r365085)
+++ head/sys/dev/sfxge/common/ef10_vpd.c Tue Sep 1 21:29:01 2020 (r365086)
@@ -34,7 +34,6 @@ __FBSDID("$FreeBSD$");
#include "efx.h"
#include "efx_impl.h"
-
#if EFSYS_OPT_VPD
#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
Modified: head/sys/dev/sfxge/common/efsys.h
==============================================================================
--- head/sys/dev/sfxge/common/efsys.h Tue Sep 1 21:27:34 2020 (r365085)
+++ head/sys/dev/sfxge/common/efsys.h Tue Sep 1 21:29:01 2020 (r365086)
@@ -159,7 +159,6 @@ sfxge_map_mbuf_fast(bus_dma_tag_t tag, bus_dmamap_t ma
/* Code inclusion options */
-
#define EFSYS_OPT_NAMES 1
#define EFSYS_OPT_SIENA 1
@@ -332,7 +331,6 @@ typedef struct efsys_mem_s {
#define EFSYS_MEM_IS_NULL(_esmp) \
((_esmp)->esm_base == NULL)
-
#define EFSYS_MEM_ZERO(_esmp, _size) \
do { \
Modified: head/sys/dev/sfxge/common/efx.h
==============================================================================
--- head/sys/dev/sfxge/common/efx.h Tue Sep 1 21:27:34 2020 (r365085)
+++ head/sys/dev/sfxge/common/efx.h Tue Sep 1 21:29:01 2020 (r365086)
@@ -72,7 +72,6 @@ extern "C" {
typedef __success(return == 0) int efx_rc_t;
-
/* Chip families */
typedef enum efx_family_e {
@@ -92,7 +91,6 @@ efx_family(
__out efx_family_t *efp,
__out unsigned int *membarp);
-
#define EFX_PCI_VENID_SFC 0x1924
#define EFX_PCI_DEVID_FALCON 0x0710 /* SFC4000 */
@@ -116,7 +114,6 @@ efx_family(
#define EFX_PCI_DEVID_MEDFORD2 0x0B03 /* SFC9250 PF */
#define EFX_PCI_DEVID_MEDFORD2_VF 0x1B03 /* SFC9250 VF */
-
#define EFX_MEM_BAR_SIENA 2
#define EFX_MEM_BAR_HUNTINGTON_PF 2
@@ -127,7 +124,6 @@ efx_family(
#define EFX_MEM_BAR_MEDFORD2 0
-
/* Error codes */
enum {
@@ -153,7 +149,6 @@ efx_crc32_calculate(
__in_ecount(length) uint8_t const *input,
__in int length);
-
/* Type prototypes */
typedef struct efx_rxq_s efx_rxq_t;
@@ -609,7 +604,6 @@ efx_mac_fcntl_get(
__out unsigned int *fcntl_wantedp,
__out unsigned int *fcntl_linkp);
-
#if EFSYS_OPT_MAC_STATS
#if EFSYS_OPT_NAMES
@@ -645,7 +639,6 @@ efx_mac_stats_get_mask(
((_mask)[(_stat) / EFX_MAC_STATS_MASK_BITS_PER_PAGE] & \
(1ULL << ((_stat) & (EFX_MAC_STATS_MASK_BITS_PER_PAGE - 1))))
-
extern __checkReturn efx_rc_t
efx_mac_stats_clear(
__in efx_nic_t *enp);
@@ -1022,7 +1015,6 @@ typedef enum efx_phy_cap_type_e {
EFX_PHY_CAP_NTYPES
} efx_phy_cap_type_t;
-
#define EFX_PHY_CAP_CURRENT 0x00000000
#define EFX_PHY_CAP_DEFAULT 0x00000001
#define EFX_PHY_CAP_PERM 0x00000002
@@ -1097,7 +1089,6 @@ efx_phy_media_type_get(
*/
#define EFX_PHY_MEDIA_INFO_MAX_OFFSET 0x100
-
extern __checkReturn efx_rc_t
efx_phy_module_get_info(
__in efx_nic_t *enp,
@@ -1180,7 +1171,6 @@ efx_phy_stats_update(
#endif /* EFSYS_OPT_PHY_STATS */
-
#if EFSYS_OPT_BIST
typedef enum efx_bist_type_e {
@@ -1512,7 +1502,6 @@ efx_nic_get_vi_pool(
__out uint32_t *rxq_countp,
__out uint32_t *txq_countp);
-
#if EFSYS_OPT_VPD
typedef enum efx_vpd_tag_e {
@@ -1531,7 +1520,6 @@ typedef struct efx_vpd_value_s {
uint8_t evv_value[0x100];
} efx_vpd_value_t;
-
#define EFX_VPD_KEYWORD(x, y) ((x) | ((y) << 8))
extern __checkReturn efx_rc_t
@@ -1742,7 +1730,6 @@ efx_bootcfg_write(
__in_bcount(size) uint8_t *data,
__in size_t size);
-
/*
* Processing routines for buffers arranged in the DHCP/BOOTP option format
* (see https://tools.ietf.org/html/rfc1533)
@@ -1798,7 +1785,6 @@ efx_dhcp_find_end(
__in size_t buffer_length,
__deref_out uint8_t **endpp);
-
extern __checkReturn efx_rc_t
efx_dhcp_delete_tag(
__inout_bcount(buffer_length) uint8_t *bufferp,
@@ -1822,7 +1808,6 @@ efx_dhcp_update_tag(
__in_bcount_opt(value_length) uint8_t *valuep,
__in size_t value_length);
-
#endif /* EFSYS_OPT_BOOTCFG */
#if EFSYS_OPT_IMAGE_LAYOUT
@@ -1875,7 +1860,6 @@ typedef struct efx_image_header_s {
#define EFX_IMAGE_HEADER_VERSION (4)
#define EFX_IMAGE_HEADER_MAGIC (0x106F1A5)
-
typedef struct efx_image_trailer_s {
uint32_t eit_crc;
} efx_image_trailer_t;
@@ -2076,7 +2060,6 @@ typedef __checkReturn boolean_t
#define EFX_PKT_PACKED_STREAM_NEW_BUFFER EFX_PKT_START
#define EFX_PKT_PACKED_STREAM_PARSE_INCOMPLETE EFX_PKT_CONT
-
#define EFX_EV_RX_NLABELS 32
#define EFX_EV_TX_NLABELS 32
@@ -2448,7 +2431,6 @@ efx_rx_hash_default_support_get(
__in efx_nic_t *enp,
__out efx_rx_hash_support_t *supportp);
-
extern __checkReturn efx_rc_t
efx_rx_scale_default_support_get(
__in efx_nic_t *enp,
@@ -2818,7 +2800,6 @@ extern void
efx_tx_qdestroy(
__in efx_txq_t *etp);
-
/* FILTER */
#if EFSYS_OPT_FILTER
@@ -2937,7 +2918,6 @@ typedef struct efx_filter_spec_s {
uint8_t efs_ifrm_loc_mac[EFX_MAC_ADDR_LEN];
} efx_filter_spec_t;
-
/* Default values for use in filter specifications */
#define EFX_FILTER_SPEC_RX_DMAQ_ID_DROP 0xfff
#define EFX_FILTER_SPEC_VID_UNSPEC 0xffff
@@ -3124,7 +3104,6 @@ efx_lic_get_id(
__out size_t *lengthp,
__out_opt uint8_t *bufferp);
-
extern __checkReturn efx_rc_t
efx_lic_find_start(
__in efx_nic_t *enp,
@@ -3313,7 +3292,6 @@ extern __checkReturn efx_rc_t
efx_phy_link_state_get(
__in efx_nic_t *enp,
__out efx_phy_link_state_t *eplsp);
-
#ifdef __cplusplus
}
Modified: head/sys/dev/sfxge/common/efx_bootcfg.c
==============================================================================
--- head/sys/dev/sfxge/common/efx_bootcfg.c Tue Sep 1 21:27:34 2020 (r365085)
+++ head/sys/dev/sfxge/common/efx_bootcfg.c Tue Sep 1 21:29:01 2020 (r365086)
@@ -76,7 +76,6 @@ typedef struct efx_dhcp_tag_hdr_s {
#define DHCP_CALC_TAG_LENGTH(payload_len) \
((payload_len) + sizeof (efx_dhcp_tag_hdr_t))
-
/* Report the layout of bootcfg sectors in NVRAM partition. */
__checkReturn efx_rc_t
efx_bootcfg_sector_info(
@@ -163,7 +162,6 @@ fail1:
return (rc);
}
-
__checkReturn uint8_t
efx_dhcp_csum(
__in_bcount(size) uint8_t const *data,
@@ -399,7 +397,6 @@ fail1:
return (rc);
}
-
/*
* Delete the given tag from anywhere in the buffer. Copes with
* encapsulated tags, and updates or deletes the encapsulating opt as
@@ -750,7 +747,6 @@ fail1:
return (rc);
}
-
/*
* Copy bootcfg sector data to a target buffer which may differ in size.
Modified: head/sys/dev/sfxge/common/efx_ev.c
==============================================================================
--- head/sys/dev/sfxge/common/efx_ev.c Tue Sep 1 21:27:34 2020 (r365085)
+++ head/sys/dev/sfxge/common/efx_ev.c Tue Sep 1 21:29:01 2020 (r365086)
@@ -53,8 +53,6 @@ __FBSDID("$FreeBSD$");
(EFX_QWORD_FIELD((_qword), EFX_DWORD_0) != 0xffffffff && \
EFX_QWORD_FIELD((_qword), EFX_DWORD_1) != 0xffffffff)
-
-
#if EFSYS_OPT_SIENA
static __checkReturn efx_rc_t
@@ -135,7 +133,6 @@ static const efx_ev_ops_t __efx_ev_ef10_ops = {
};
#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
-
__checkReturn efx_rc_t
efx_ev_init(
__in efx_nic_t *enp)
@@ -221,7 +218,6 @@ efx_ev_fini(
enp->en_mod_flags &= ~EFX_MOD_EV;
}
-
__checkReturn efx_rc_t
efx_ev_qcreate(
__in efx_nic_t *enp,
@@ -903,7 +899,6 @@ siena_ev_tx(
EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_PKT_ERR) == 0 &&
EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_PKT_TOO_BIG) == 0 &&
EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_WQ_FF_FULL) == 0) {
-
id = EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_DESC_PTR);
label = EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_Q_LABEL);
Modified: head/sys/dev/sfxge/common/efx_filter.c
==============================================================================
--- head/sys/dev/sfxge/common/efx_filter.c Tue Sep 1 21:27:34 2020 (r365085)
+++ head/sys/dev/sfxge/common/efx_filter.c Tue Sep 1 21:29:01 2020 (r365086)
@@ -36,7 +36,6 @@ __FBSDID("$FreeBSD$");
#include "efx.h"
#include "efx_impl.h"
-
#if EFSYS_OPT_FILTER
*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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