svn commit: r365076 - in head/sys/mips: atheros atheros/ar531x beri broadcom cavium cavium/cryptocteon cavium/octe cavium/usb include ingenic malta mediatek mips nlm nlm/dev/net nlm/dev/net/ucore n...
Mateusz Guzik
mjg at FreeBSD.org
Tue Sep 1 21:21:30 UTC 2020
Author: mjg
Date: Tue Sep 1 21:21:19 2020
New Revision: 365076
URL: https://svnweb.freebsd.org/changeset/base/365076
Log:
mips: clean up empty lines in .c and .h files
Modified:
head/sys/mips/atheros/apb.c
head/sys/mips/atheros/ar531x/apb.c
head/sys/mips/atheros/ar531x/ar5312_chip.c
head/sys/mips/atheros/ar531x/ar5315_chip.c
head/sys/mips/atheros/ar531x/ar5315_cpudef.h
head/sys/mips/atheros/ar531x/ar5315_gpio.c
head/sys/mips/atheros/ar531x/ar5315_machdep.c
head/sys/mips/atheros/ar531x/ar5315_setup.c
head/sys/mips/atheros/ar531x/ar5315_wdog.c
head/sys/mips/atheros/ar531x/ar5315reg.h
head/sys/mips/atheros/ar531x/if_are.c
head/sys/mips/atheros/ar531x/if_arereg.h
head/sys/mips/atheros/ar71xx_cpudef.h
head/sys/mips/atheros/ar71xx_gpio.c
head/sys/mips/atheros/ar71xx_ohci.c
head/sys/mips/atheros/ar71xx_pci.c
head/sys/mips/atheros/ar71xx_pci_bus_space.c
head/sys/mips/atheros/ar71xx_setup.c
head/sys/mips/atheros/ar71xx_spi.c
head/sys/mips/atheros/ar71xx_wdog.c
head/sys/mips/atheros/ar724x_pci.c
head/sys/mips/atheros/ar933x_chip.c
head/sys/mips/atheros/ar934x_chip.c
head/sys/mips/atheros/if_arge.c
head/sys/mips/atheros/if_argevar.h
head/sys/mips/atheros/pcf2123reg.h
head/sys/mips/atheros/qca955xreg.h
head/sys/mips/atheros/uart_dev_ar933x.c
head/sys/mips/beri/beri_iommu.c
head/sys/mips/beri/beri_machdep.c
head/sys/mips/beri/beri_mp.c
head/sys/mips/broadcom/bcm_bmips.c
head/sys/mips/broadcom/bcm_bmips_exts.h
head/sys/mips/broadcom/bcm_mips.c
head/sys/mips/broadcom/bcm_mips74k.c
head/sys/mips/broadcom/bcm_mips74kreg.h
head/sys/mips/broadcom/bcm_mipsvar.h
head/sys/mips/broadcom/bcm_nvram_cfe.c
head/sys/mips/broadcom/bcm_pmu.c
head/sys/mips/broadcom/bhnd_nexus.c
head/sys/mips/broadcom/uart_bus_chipc.c
head/sys/mips/cavium/ciu.c
head/sys/mips/cavium/cryptocteon/cavium_crypto.c
head/sys/mips/cavium/cryptocteon/cryptocteon.c
head/sys/mips/cavium/if_octm.c
head/sys/mips/cavium/obio.c
head/sys/mips/cavium/obiovar.h
head/sys/mips/cavium/octe/cavium-ethernet.h
head/sys/mips/cavium/octe/ethernet-common.c
head/sys/mips/cavium/octe/ethernet-common.h
head/sys/mips/cavium/octe/ethernet-defines.h
head/sys/mips/cavium/octe/ethernet-headers.h
head/sys/mips/cavium/octe/ethernet-mdio.c
head/sys/mips/cavium/octe/ethernet-mdio.h
head/sys/mips/cavium/octe/ethernet-mem.c
head/sys/mips/cavium/octe/ethernet-mem.h
head/sys/mips/cavium/octe/ethernet-rgmii.c
head/sys/mips/cavium/octe/ethernet-rx.c
head/sys/mips/cavium/octe/ethernet-rx.h
head/sys/mips/cavium/octe/ethernet-sgmii.c
head/sys/mips/cavium/octe/ethernet-spi.c
head/sys/mips/cavium/octe/ethernet-tx.c
head/sys/mips/cavium/octe/ethernet-tx.h
head/sys/mips/cavium/octe/ethernet-util.h
head/sys/mips/cavium/octe/ethernet-xaui.c
head/sys/mips/cavium/octe/ethernet.c
head/sys/mips/cavium/octe/mv88e61xxphy.c
head/sys/mips/cavium/octe/octe.c
head/sys/mips/cavium/octe/octebus.c
head/sys/mips/cavium/octe/wrapper-cvmx-includes.h
head/sys/mips/cavium/octeon_ds1337.c
head/sys/mips/cavium/octeon_ebt3000_cf.c
head/sys/mips/cavium/octeon_gpio.c
head/sys/mips/cavium/octeon_machdep.c
head/sys/mips/cavium/octeon_rnd.c
head/sys/mips/cavium/octeon_rtc.c
head/sys/mips/cavium/octopci.c
head/sys/mips/cavium/octopci_bus_space.c
head/sys/mips/cavium/octopcireg.h
head/sys/mips/cavium/uart_dev_oct16550.c
head/sys/mips/cavium/usb/octusb.c
head/sys/mips/cavium/usb/octusb.h
head/sys/mips/cavium/usb/octusb_octeon.c
head/sys/mips/include/bus.h
head/sys/mips/include/cpufunc.h
head/sys/mips/include/cpuregs.h
head/sys/mips/include/db_machdep.h
head/sys/mips/include/mips_opcode.h
head/sys/mips/include/regnum.h
head/sys/mips/ingenic/jz4780_clk_gen.c
head/sys/mips/ingenic/jz4780_clock.c
head/sys/mips/ingenic/jz4780_machdep.c
head/sys/mips/ingenic/jz4780_pdma.c
head/sys/mips/ingenic/jz4780_pinctrl.c
head/sys/mips/ingenic/jz4780_pinctrl.h
head/sys/mips/ingenic/jz4780_timer.c
head/sys/mips/malta/gt.c
head/sys/mips/malta/gt_pci.c
head/sys/mips/malta/gtreg.h
head/sys/mips/malta/malta_machdep.c
head/sys/mips/malta/maltareg.h
head/sys/mips/malta/obio.c
head/sys/mips/malta/obiovar.h
head/sys/mips/mediatek/fdt_reset.c
head/sys/mips/mediatek/fdt_reset.h
head/sys/mips/mediatek/mtk_gpio_v1.c
head/sys/mips/mediatek/mtk_machdep.c
head/sys/mips/mediatek/mtk_pcie.c
head/sys/mips/mediatek/mtk_pinctrl.h
head/sys/mips/mediatek/mtk_spi_v1.c
head/sys/mips/mediatek/mtk_spi_v2.c
head/sys/mips/mediatek/uart_dev_mtk.c
head/sys/mips/mips/busdma_machdep.c
head/sys/mips/mips/cache_mipsNN.c
head/sys/mips/mips/cpu.c
head/sys/mips/mips/db_interface.c
head/sys/mips/mips/db_trace.c
head/sys/mips/mips/elf_trampoline.c
head/sys/mips/mips/gdb_machdep.c
head/sys/mips/mips/mips_pic.c
head/sys/mips/mips/nexus.c
head/sys/mips/mips/pm_machdep.c
head/sys/mips/mips/pmap.c
head/sys/mips/mips/tick.c
head/sys/mips/mips/trap.c
head/sys/mips/mips/vm_machdep.c
head/sys/mips/nlm/board.c
head/sys/mips/nlm/bus_space_rmi.c
head/sys/mips/nlm/bus_space_rmi_pci.c
head/sys/mips/nlm/cms.c
head/sys/mips/nlm/dev/net/ucore/ucore.h
head/sys/mips/nlm/dev/net/ucore/ucore_app.c
head/sys/mips/nlm/dev/net/xaui.c
head/sys/mips/nlm/dev/net/xlpge.c
head/sys/mips/nlm/dev/sec/nlmseclib.h
head/sys/mips/nlm/hal/cpucontrol.h
head/sys/mips/nlm/hal/mmu.h
head/sys/mips/nlm/hal/usb.h
head/sys/mips/nlm/tick.c
head/sys/mips/nlm/usb_init.c
Modified: head/sys/mips/atheros/apb.c
==============================================================================
--- head/sys/mips/atheros/apb.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/atheros/apb.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -356,7 +356,6 @@ apb_filter(void *arg)
reg = ATH_READ_REG(AR71XX_MISC_INTR_STATUS);
for (irq = 0; irq < APB_NIRQS; irq++) {
if (reg & (1 << irq)) {
-
switch (ar71xx_soc) {
case AR71XX_SOC_AR7240:
case AR71XX_SOC_AR7241:
@@ -508,7 +507,6 @@ apb_print_child(device_t bus, device_t child)
return (retval);
}
-
static device_method_t apb_methods[] = {
DEVMETHOD(bus_activate_resource, apb_activate_resource),
Modified: head/sys/mips/atheros/ar531x/apb.c
==============================================================================
--- head/sys/mips/atheros/ar531x/apb.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/atheros/ar531x/apb.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -386,7 +386,6 @@ apb_release_resource(device_t dev, device_t child, int
return (0);
}
-
static int
apb_setup_intr(device_t bus, device_t child, struct resource *ires,
int flags, driver_filter_t *filt, driver_intr_t *handler,
@@ -402,7 +401,7 @@ apb_setup_intr(device_t bus, device_t child, struct re
#ifdef INTRNG
struct intr_irqsrc *isrc;
const char *name;
-
+
if ((rman_get_flags(ires) & RF_SHAREABLE) == 0)
flags |= INTR_EXCL;
@@ -479,7 +478,6 @@ apb_teardown_intr(device_t dev, device_t child, struct
#endif
}
-
static int
apb_filter(void *arg)
{
@@ -496,7 +494,6 @@ apb_filter(void *arg)
for (irq = 0; irq < APB_NIRQS; irq++) {
if (reg & (1 << irq)) {
-
if(ar531x_soc >= AR531X_SOC_AR5315) {
ATH_WRITE_REG(AR5315_SYSREG_BASE +
AR5315_SYSREG_MISC_INTSTAT,
Modified: head/sys/mips/atheros/ar531x/ar5312_chip.c
==============================================================================
--- head/sys/mips/atheros/ar531x/ar5312_chip.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/atheros/ar531x/ar5312_chip.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -87,7 +87,6 @@ ar5312_chip_detect_sys_frequency(void)
uint32_t predivisor;
uint32_t multiplier;
-
const uint32_t clockctl = ATH_READ_REG(AR5312_SYSREG_BASE + AR5312_SYSREG_CLOCKCTL);
if(ar531x_soc == AR531X_SOC_AR5313) {
predivisor = __SHIFTOUT(clockctl, AR2313_CLOCKCTL_PREDIVIDE);
Modified: head/sys/mips/atheros/ar531x/ar5315_chip.c
==============================================================================
--- head/sys/mips/atheros/ar531x/ar5315_chip.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/atheros/ar531x/ar5315_chip.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -181,7 +181,7 @@ ar5315_chip_device_start(void)
ATH_WRITE_REG(AR5315_SYSREG_BASE+AR5315_SYSREG_AHB_ARB_CTL,
ATH_READ_REG(AR5315_SYSREG_BASE+AR5315_SYSREG_AHB_ARB_CTL) |
AR5315_ARB_ENET);
-
+
// set Ethernet controller byteswap control
/*
ATH_WRITE_REG(AR5315_SYSREG_BASE+AR5315_SYSREG_ENDIAN,
Modified: head/sys/mips/atheros/ar531x/ar5315_cpudef.h
==============================================================================
--- head/sys/mips/atheros/ar531x/ar5315_cpudef.h Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/atheros/ar531x/ar5315_cpudef.h Tue Sep 1 21:21:19 2020 (r365076)
@@ -122,18 +122,14 @@ extern uint32_t u_ar531x_gpio_pins;
extern uint32_t u_ar531x_wdog_ctl;
extern uint32_t u_ar531x_wdog_timer;
-
static inline uint32_t ar531x_cpu_freq(void) { return u_ar531x_cpu_freq; }
static inline uint32_t ar531x_ahb_freq(void) { return u_ar531x_ahb_freq; }
static inline uint32_t ar531x_ddr_freq(void) { return u_ar531x_ddr_freq; }
-
static inline uint32_t ar531x_uart_addr(void) { return u_ar531x_uart_addr; }
-
static inline uint32_t ar531x_gpio_di(void) { return u_ar531x_gpio_di; }
static inline uint32_t ar531x_gpio_cr(void) { return u_ar531x_gpio_cr; }
static inline uint32_t ar531x_gpio_do(void) { return u_ar531x_gpio_do; }
static inline uint32_t ar531x_gpio_pins(void) { return u_ar531x_gpio_pins; }
-
static inline uint32_t ar531x_wdog_ctl(void) { return u_ar531x_wdog_ctl; }
static inline uint32_t ar531x_wdog_timer(void) { return u_ar531x_wdog_timer; }
#endif
Modified: head/sys/mips/atheros/ar531x/ar5315_gpio.c
==============================================================================
--- head/sys/mips/atheros/ar531x/ar5315_gpio.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/atheros/ar531x/ar5315_gpio.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -308,8 +308,6 @@ ar5315_gpio_filter(void *arg)
return (FILTER_STRAY);
}
-
-
static void
ar5315_gpio_intr(void *arg)
{
Modified: head/sys/mips/atheros/ar531x/ar5315_machdep.c
==============================================================================
--- head/sys/mips/atheros/ar531x/ar5315_machdep.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/atheros/ar531x/ar5315_machdep.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -241,7 +241,6 @@ platform_start(__register_t a0 __unused, __register_t
/* Detect the system type - this is needed for subsequent chipset-specific calls */
-
ar531x_device_soc_init();
ar531x_detect_sys_frequency();
Modified: head/sys/mips/atheros/ar531x/ar5315_setup.c
==============================================================================
--- head/sys/mips/atheros/ar531x/ar5315_setup.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/atheros/ar531x/ar5315_setup.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -39,12 +39,12 @@ __FBSDID("$FreeBSD$");
#include <sys/cons.h>
#include <sys/kdb.h>
#include <sys/reboot.h>
-
+
#include <vm/vm.h>
#include <vm/vm_page.h>
-
+
#include <net/ethernet.h>
-
+
#include <machine/clock.h>
#include <machine/cpu.h>
#include <machine/cpuregs.h>
@@ -52,7 +52,7 @@ __FBSDID("$FreeBSD$");
#include <machine/md_var.h>
#include <machine/trap.h>
#include <machine/vmparam.h>
-
+
#include <mips/atheros/ar531x/ar5315reg.h>
#include <mips/atheros/ar531x/ar5312reg.h>
#include <mips/atheros/ar531x/ar5315_setup.h>
@@ -158,4 +158,3 @@ ar5315_get_system_type(void)
{
return ar5315_sys_type;
}
-
Modified: head/sys/mips/atheros/ar531x/ar5315_wdog.c
==============================================================================
--- head/sys/mips/atheros/ar531x/ar5315_wdog.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/atheros/ar531x/ar5315_wdog.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -116,12 +116,11 @@ ar5315_wdog_sysctl(device_t dev)
"whether the system rebooted from the watchdog");
}
-
static int
ar5315_wdog_attach(device_t dev)
{
struct ar5315_wdog_softc *sc = device_get_softc(dev);
-
+
/* Initialise */
sc->reboot_from_watchdog = 0;
sc->armed = 0;
Modified: head/sys/mips/atheros/ar531x/ar5315reg.h
==============================================================================
--- head/sys/mips/atheros/ar531x/ar5315reg.h Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/atheros/ar531x/ar5315reg.h Tue Sep 1 21:21:19 2020 (r365076)
@@ -223,7 +223,7 @@
#define ATH_READ_REG(reg) \
*((volatile uint32_t *)MIPS_PHYS_TO_KSEG1((reg)))
-
+
#define ATH_WRITE_REG(reg, val) \
*((volatile uint32_t *)MIPS_PHYS_TO_KSEG1((reg))) = (val)
Modified: head/sys/mips/atheros/ar531x/if_are.c
==============================================================================
--- head/sys/mips/atheros/ar531x/if_are.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/atheros/ar531x/if_are.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -195,7 +195,6 @@ DRIVER_MODULE(aremdio, nexus, aremdio_driver, aremdio_
DRIVER_MODULE(mdio, aremdio, mdio_driver, mdio_devclass, 0, 0);
#endif
-
static int
are_probe(device_t dev)
{
@@ -1472,7 +1471,6 @@ are_fixup_rx(struct mbuf *m)
m->m_data -= ETHER_ALIGN;
}
-
static void
are_tx(struct are_softc *sc)
{
@@ -1538,7 +1536,6 @@ are_tx(struct are_softc *sc)
sc->are_cdata.are_tx_ring_map, BUS_DMASYNC_PREWRITE);
}
-
static void
are_rx(struct are_softc *sc)
{
@@ -1611,7 +1608,6 @@ are_rx(struct are_softc *sc)
bus_dmamap_sync(sc->are_cdata.are_rx_ring_tag,
sc->are_cdata.are_rx_ring_map,
BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
-
}
if (prog > 0) {
Modified: head/sys/mips/atheros/ar531x/if_arereg.h
==============================================================================
--- head/sys/mips/atheros/ar531x/if_arereg.h Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/atheros/ar531x/if_arereg.h Tue Sep 1 21:21:19 2020 (r365076)
@@ -141,7 +141,6 @@ struct are_softc {
#define CSR_READ_4(sc, reg) \
bus_space_read_4(sc->are_btag, sc->are_bhandle, reg)
-
/* $NetBSD: aereg.h,v 1.2 2008/04/28 20:23:28 martin Exp $ */
/*-
@@ -254,7 +253,7 @@ struct are_softc {
#define CSR_MIIDATA 0x0018 /* mii data */
#define CSR_FLOWC 0x001C /* flow control */
#define CSR_VL1 0x0020 /* vlan 1 tag */
-
+
/* these are more or less normal Tulip registers */
#define CSR_BUSMODE 0x1000 /* bus mode */
#define CSR_TXPOLL 0x1004 /* tx poll demand */
@@ -331,7 +330,6 @@ struct are_softc {
/* CSR_TXPOLL - Transmit Poll Demand */
#define TXPOLL_TPD 0x00000001 /* transmit poll demand */
-
/* CSR_RXPOLL - Receive Poll Demand */
#define RXPOLL_RPD 0x00000001 /* receive poll demand */
@@ -392,7 +390,6 @@ struct are_softc {
/* CSR_INTEN - Interrupt Enable */
/* See bits for CSR_STATUS -- Status */
-
/* CSR_MISSED - Missed Frames */
#define MISSED_MFC 0xffff0000 /* missed packet count */
Modified: head/sys/mips/atheros/ar71xx_cpudef.h
==============================================================================
--- head/sys/mips/atheros/ar71xx_cpudef.h Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/atheros/ar71xx_cpudef.h Tue Sep 1 21:21:19 2020 (r365076)
@@ -171,7 +171,6 @@ extern uint32_t u_ar71xx_ddr_freq;
extern uint32_t u_ar71xx_uart_freq;
extern uint32_t u_ar71xx_wdt_freq;
extern uint32_t u_ar71xx_mdio_freq;
-
static inline uint64_t ar71xx_refclk(void) { return u_ar71xx_refclk; }
static inline uint64_t ar71xx_cpu_freq(void) { return u_ar71xx_cpu_freq; }
static inline uint64_t ar71xx_ahb_freq(void) { return u_ar71xx_ahb_freq; }
Modified: head/sys/mips/atheros/ar71xx_gpio.c
==============================================================================
--- head/sys/mips/atheros/ar71xx_gpio.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/atheros/ar71xx_gpio.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -411,8 +411,6 @@ ar71xx_gpio_filter(void *arg)
return (FILTER_STRAY);
}
-
-
static void
ar71xx_gpio_intr(void *arg)
{
Modified: head/sys/mips/atheros/ar71xx_ohci.c
==============================================================================
--- head/sys/mips/atheros/ar71xx_ohci.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/atheros/ar71xx_ohci.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -79,7 +79,6 @@ ar71xx_ohci_intr(void *arg)
ohci_interrupt(arg);
}
-
static int
ar71xx_ohci_attach(device_t dev)
{
Modified: head/sys/mips/atheros/ar71xx_pci.c
==============================================================================
--- head/sys/mips/atheros/ar71xx_pci.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/atheros/ar71xx_pci.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -358,7 +358,6 @@ ar71xx_pci_slot_fixup(device_t dev, u_int bus, u_int s
return;
}
-
device_printf(dev, "found EEPROM at 0x%lx on %d.%d.%d\n",
flash_addr, bus, slot, func);
ar71xx_pci_fixup(dev, bus, slot, func, flash_addr, size);
@@ -660,7 +659,7 @@ static int
ar71xx_pci_route_interrupt(device_t pcib, device_t device, int pin)
{
struct ar71xx_pci_softc *sc = device_get_softc(pcib);
-
+
if (pci_get_slot(device) < sc->sc_baseslot)
panic("%s: PCI slot %d is less then AR71XX_PCI_BASE_SLOT",
__func__, pci_get_slot(device));
Modified: head/sys/mips/atheros/ar71xx_pci_bus_space.c
==============================================================================
--- head/sys/mips/atheros/ar71xx_pci_bus_space.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/atheros/ar71xx_pci_bus_space.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -188,7 +188,7 @@ pcimem_bs_w_2_s(void *t, bus_space_handle_t h, bus_siz
static uint32_t
pcimem_bs_r_4_s(void *t, bus_space_handle_t h, bus_size_t o)
{
-
+
return le32toh(readl(h + o));
}
Modified: head/sys/mips/atheros/ar71xx_setup.c
==============================================================================
--- head/sys/mips/atheros/ar71xx_setup.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/atheros/ar71xx_setup.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -39,12 +39,12 @@ __FBSDID("$FreeBSD$");
#include <sys/cons.h>
#include <sys/kdb.h>
#include <sys/reboot.h>
-
+
#include <vm/vm.h>
#include <vm/vm_page.h>
-
+
#include <net/ethernet.h>
-
+
#include <machine/clock.h>
#include <machine/cpu.h>
#include <machine/cpuregs.h>
@@ -52,7 +52,7 @@ __FBSDID("$FreeBSD$");
#include <machine/md_var.h>
#include <machine/trap.h>
#include <machine/vmparam.h>
-
+
#include <mips/atheros/ar71xxreg.h>
#include <mips/atheros/ar933xreg.h>
#include <mips/atheros/ar934xreg.h>
@@ -234,4 +234,3 @@ ar71xx_get_system_type(void)
{
return ar71xx_sys_type;
}
-
Modified: head/sys/mips/atheros/ar71xx_spi.c
==============================================================================
--- head/sys/mips/atheros/ar71xx_spi.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/atheros/ar71xx_spi.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -282,7 +282,6 @@ static device_method_t ar71xx_spi_methods[] = {
DEVMETHOD(device_detach, ar71xx_spi_detach),
DEVMETHOD(spibus_transfer, ar71xx_spi_transfer),
-
{0, 0}
};
Modified: head/sys/mips/atheros/ar71xx_wdog.c
==============================================================================
--- head/sys/mips/atheros/ar71xx_wdog.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/atheros/ar71xx_wdog.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -143,12 +143,11 @@ ar71xx_wdog_sysctl(device_t dev)
"whether the system rebooted from the watchdog");
}
-
static int
ar71xx_wdog_attach(device_t dev)
{
struct ar71xx_wdog_softc *sc = device_get_softc(dev);
-
+
/* Initialise */
sc->reboot_from_watchdog = 0;
sc->armed = 0;
Modified: head/sys/mips/atheros/ar724x_pci.c
==============================================================================
--- head/sys/mips/atheros/ar724x_pci.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/atheros/ar724x_pci.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -594,7 +594,6 @@ ar724x_pci_intr(void *arg)
struct intr_event *event;
uint32_t reg, irq, mask;
-
reg = ATH_READ_REG(AR724X_PCI_INTR_STATUS);
mask = ATH_READ_REG(AR724X_PCI_INTR_MASK);
/*
@@ -602,7 +601,6 @@ ar724x_pci_intr(void *arg)
*/
reg &= mask;
if (reg & AR724X_PCI_INTR_DEV0) {
-
irq = AR71XX_PCI_IRQ_START;
event = sc->sc_eventstab[irq];
if (!event || CK_SLIST_EMPTY(&event->ie_handlers)) {
Modified: head/sys/mips/atheros/ar933x_chip.c
==============================================================================
--- head/sys/mips/atheros/ar933x_chip.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/atheros/ar933x_chip.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -215,7 +215,6 @@ ar933x_chip_ddr_flush(ar71xx_flush_ddr_id_t id)
}
}
-
static uint32_t
ar933x_chip_get_eth_pll(unsigned int mac, int speed)
{
Modified: head/sys/mips/atheros/ar934x_chip.c
==============================================================================
--- head/sys/mips/atheros/ar934x_chip.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/atheros/ar934x_chip.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -286,7 +286,6 @@ ar934x_chip_ddr_flush(ar71xx_flush_ddr_id_t id)
}
}
-
static uint32_t
ar934x_chip_get_eth_pll(unsigned int mac, int speed)
{
Modified: head/sys/mips/atheros/if_arge.c
==============================================================================
--- head/sys/mips/atheros/if_arge.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/atheros/if_arge.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -84,7 +84,6 @@ __FBSDID("$FreeBSD$");
#include "mdio_if.h"
#endif
-
MODULE_DEPEND(arge, ether, 1, 1, 1);
MODULE_DEPEND(arge, miibus, 1, 1, 1);
MODULE_VERSION(arge, 1);
@@ -230,7 +229,7 @@ static device_method_t argemdio_methods[] = {
/* bus interface */
DEVMETHOD(bus_add_child, device_add_child_ordered),
-
+
/* MDIO access */
DEVMETHOD(mdio_readreg, arge_miibus_readreg),
DEVMETHOD(mdio_writereg, arge_miibus_writereg),
@@ -1242,7 +1241,6 @@ arge_update_link_locked(struct arge_softc *sc)
}
if (mii->mii_media_status & IFM_ACTIVE) {
-
media = IFM_SUBTYPE(mii->mii_media_active);
if (media != IFM_NONE) {
sc->arge_link_status = 1;
@@ -1373,7 +1371,6 @@ arge_set_pll(struct arge_softc *sc, int media, int dup
#endif
}
-
static void
arge_reset_dma(struct arge_softc *sc)
{
@@ -1738,7 +1735,6 @@ arge_start_locked(struct ifnet *ifp)
if (m_head == NULL)
break;
-
/*
* Pack the data into the transmit ring.
*/
@@ -1784,7 +1780,6 @@ arge_stop(struct arge_softc *sc)
arge_tx_ring_free(sc);
}
-
static int
arge_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
{
@@ -2419,7 +2414,6 @@ arge_poll(struct ifnet *ifp, enum poll_cmd cmd, int co
}
#endif /* DEVICE_POLLING */
-
static void
arge_tx_locked(struct arge_softc *sc)
{
@@ -2484,7 +2478,6 @@ arge_tx_locked(struct arge_softc *sc)
sc->arge_cdata.arge_tx_ring_map, BUS_DMASYNC_PREWRITE);
}
-
static int
arge_rx_locked(struct arge_softc *sc)
{
@@ -2541,7 +2534,6 @@ arge_rx_locked(struct arge_softc *sc)
}
if (prog > 0) {
-
i = sc->arge_cdata.arge_rx_cons;
for (; prog > 0 ; prog--) {
if (arge_newbuf(sc, i) != 0) {
@@ -2698,7 +2690,6 @@ arge_intr(void *arg)
*/
ARGE_WRITE(sc, AR71XX_DMA_INTR, DMA_INTR_ALL);
}
-
static void
arge_tick(void *xsc)
Modified: head/sys/mips/atheros/if_argevar.h
==============================================================================
--- head/sys/mips/atheros/if_argevar.h Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/atheros/if_argevar.h Tue Sep 1 21:21:19 2020 (r365076)
@@ -50,7 +50,6 @@
((sc)->arge_rdata.arge_rx_ring_paddr + sizeof(struct arge_desc) * (i))
#define ARGE_INC(x,y) (x) = (((x) + 1) % y)
-
#define ARGE_MII_TIMEOUT 1000
#define ARGE_LOCK(_sc) mtx_lock(&(_sc)->arge_mtx)
Modified: head/sys/mips/atheros/pcf2123reg.h
==============================================================================
--- head/sys/mips/atheros/pcf2123reg.h Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/atheros/pcf2123reg.h Tue Sep 1 21:21:19 2020 (r365076)
@@ -66,4 +66,3 @@
#define PCF2123_WRITE(reg) (PCF2123_CMD_WRITE | (1 << 4) | (reg))
#endif /* __PCF2123REG_H__ */
-
Modified: head/sys/mips/atheros/qca955xreg.h
==============================================================================
--- head/sys/mips/atheros/qca955xreg.h Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/atheros/qca955xreg.h Tue Sep 1 21:21:19 2020 (r365076)
@@ -193,7 +193,6 @@
#define QCA955X_NFC_BASE 0x1b800200
#define QCA955X_NFC_SIZE 0xb8
-
/* GMAC Interface */
#define QCA955X_GMAC_REG_ETH_CFG (QCA955X_GMAC_BASE + 0x00)
Modified: head/sys/mips/atheros/uart_dev_ar933x.c
==============================================================================
--- head/sys/mips/atheros/uart_dev_ar933x.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/atheros/uart_dev_ar933x.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -54,8 +54,6 @@ __FBSDID("$FreeBSD$");
#define ar933x_setreg(bas, reg, value) \
bus_space_write_4((bas)->bst, (bas)->bsh, reg, value)
-
-
static int
ar933x_drain(struct uart_bas *bas, int what)
{
@@ -78,7 +76,6 @@ ar933x_drain(struct uart_bas *bas, int what)
if (what & UART_DRAIN_RECEIVER) {
limit=10*4096;
while (--limit) {
-
/* XXX duplicated from ar933x_getc() */
/* XXX TODO: refactor! */
@@ -192,7 +189,6 @@ ar933x_param(struct uart_bas *bas, int baudrate, int d
uart_barrier(bas);
return (0);
}
-
/*
* Low-level UART interface.
Modified: head/sys/mips/beri/beri_iommu.c
==============================================================================
--- head/sys/mips/beri/beri_iommu.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/beri/beri_iommu.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -210,7 +210,6 @@ beri_iommu_detach(device_t dev)
}
static device_method_t beri_iommu_methods[] = {
-
/* xDMA IOMMU interface */
DEVMETHOD(xdma_iommu_init, beri_iommu_init),
DEVMETHOD(xdma_iommu_release, beri_iommu_release),
@@ -221,7 +220,6 @@ static device_method_t beri_iommu_methods[] = {
DEVMETHOD(device_probe, beri_iommu_probe),
DEVMETHOD(device_attach, beri_iommu_attach),
DEVMETHOD(device_detach, beri_iommu_detach),
-
{ 0, 0 }
};
Modified: head/sys/mips/beri/beri_machdep.c
==============================================================================
--- head/sys/mips/beri/beri_machdep.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/beri/beri_machdep.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -115,7 +115,6 @@ mips_init(void)
#ifdef FDT
if (fdt_get_mem_regions(mr, &mr_cnt, &val) == 0) {
-
physmem = btoc(val);
KASSERT((phys_avail[0] >= mr[0].mr_start) && \
Modified: head/sys/mips/beri/beri_mp.c
==============================================================================
--- head/sys/mips/beri/beri_mp.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/beri/beri_mp.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -171,7 +171,6 @@ platform_init_secondary(int cpuid)
}
}
-
void
platform_ipi_send(int cpuid)
{
Modified: head/sys/mips/broadcom/bcm_bmips.c
==============================================================================
--- head/sys/mips/broadcom/bcm_bmips.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/broadcom/bcm_bmips.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -103,7 +103,6 @@ bcm_bmips_probe(device_t dev)
return (BUS_PROBE_DEFAULT);
}
-
static int
bcm_bmips_attach(device_t dev)
{
Modified: head/sys/mips/broadcom/bcm_bmips_exts.h
==============================================================================
--- head/sys/mips/broadcom/bcm_bmips_exts.h Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/broadcom/bcm_bmips_exts.h Tue Sep 1 21:21:19 2020 (r365076)
@@ -39,7 +39,6 @@
* $FreeBSD$
*/
-
/* *********************************************************************
* Broadcom Common Firmware Environment (CFE)
*
Modified: head/sys/mips/broadcom/bcm_mips.c
==============================================================================
--- head/sys/mips/broadcom/bcm_mips.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/broadcom/bcm_mips.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -477,7 +477,6 @@ bcm_mips_pic_teardown_intr(device_t dev, struct intr_i
return (error);
}
-
/** return our PIC's xref */
static uintptr_t
bcm_mips_pic_xref(struct bcm_mips_softc *sc)
Modified: head/sys/mips/broadcom/bcm_mips74k.c
==============================================================================
--- head/sys/mips/broadcom/bcm_mips74k.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/broadcom/bcm_mips74k.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -200,7 +200,6 @@ bcm_mips74k_detach(device_t dev)
return (0);
}
-
/* PIC_DISABLE_INTR() */
static void
bcm_mips74k_pic_disable_intr(device_t dev, struct intr_irqsrc *irqsrc)
Modified: head/sys/mips/broadcom/bcm_mips74kreg.h
==============================================================================
--- head/sys/mips/broadcom/bcm_mips74kreg.h Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/broadcom/bcm_mips74kreg.h Tue Sep 1 21:21:19 2020 (r365076)
@@ -64,5 +64,4 @@
#define BCM_MIPS74K_GET_TIMER_IRQ() \
((mips_rd_intctl() & MIPS_INTCTL_IPTI_MASK) >> MIPS_INTCTL_IPTI_SHIFT)
-
#endif /* _MIPS_BROADCOM_MIPS74KREG_H_ */
Modified: head/sys/mips/broadcom/bcm_mipsvar.h
==============================================================================
--- head/sys/mips/broadcom/bcm_mipsvar.h Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/broadcom/bcm_mipsvar.h Tue Sep 1 21:21:19 2020 (r365076)
@@ -51,7 +51,6 @@ struct bcm_mips_softc;
#define BCM_MIPS_IRQ_SHARED 0 /**< MIPS CPU IRQ reserved for shared interrupt handling */
#define INTR_MAP_DATA_BCM_MIPS INTR_MAP_DATA_PLAT_2 /**< Broadcom MIPS PIC interrupt map data type */
-
int bcm_mips_attach(device_t dev, u_int num_cpuirqs, u_int timer_irq,
driver_filter_t filter);
int bcm_mips_detach(device_t dev);
@@ -99,7 +98,6 @@ struct bcm_mips_softc {
struct bcm_mips_irqsrc isrcs[BCM_MIPS_NINTR];
struct mtx mtx;
};
-
#define BCM_MIPS_IVEC_MASK(_isrc) (1 << ((_isrc)->ivec))
Modified: head/sys/mips/broadcom/bcm_nvram_cfe.c
==============================================================================
--- head/sys/mips/broadcom/bcm_nvram_cfe.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/broadcom/bcm_nvram_cfe.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -104,7 +104,6 @@ bhnd_nvram_cfe_probe(device_t dev)
return (BUS_PROBE_NOWILDCARD);
}
-
static int
bhnd_nvram_cfe_attach(device_t dev)
{
@@ -240,7 +239,6 @@ bcm_nvram_find_cfedev(struct bcm_nvram_iocfe *iocfe,
return (ENODEV);
}
-
/**
* Initialize a new CFE device-backed I/O context.
*
@@ -343,7 +341,6 @@ bcm_nvram_iocfe_init(struct bcm_nvram_iocfe *iocfe, ch
req_blk_erase = !(fi.flash_flags & FLASH_FLAG_NOERASE);
}
-
/* Verify that the full NVRAM layout can be represented via size_t */
if (nv_size > SIZE_MAX || SIZE_MAX - nv_size < nv_offset) {
IOCFE_LOG(iocfe, "invalid NVRAM layout (%#x/%#jx)\n",
@@ -449,7 +446,7 @@ bhnd_nvram_iocfe_read(struct bhnd_nvram_io *io, size_t
cfe_noff = cfe_offset + nread;
p = ((uint8_t *)buffer + nread);
nreq = ummin(INT_MAX, remain);
-
+
nr = cfe_readblk(iocfe->fd, cfe_noff, p, nreq);
if (nr < 0) {
IOCFE_LOG(iocfe, "cfe_readblk() failed: %d\n", nr);
Modified: head/sys/mips/broadcom/bcm_pmu.c
==============================================================================
--- head/sys/mips/broadcom/bcm_pmu.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/broadcom/bcm_pmu.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -121,7 +121,7 @@ bcm_get_uart_clkcfg(struct bcm_platform *bp)
/* PLL M2 clock source? */
if (!bcm_has_pmu(bp) && BCM_PMU_PLL_TYPE(bp) == CHIPC_PLL_TYPE1) {
uint32_t n, m;
-
+
n = BCM_CHIPC_READ_4(bp, CHIPC_CLKC_N);
m = BCM_CHIPC_READ_4(bp, CHIPC_CLKC_M2);
@@ -130,7 +130,7 @@ bcm_get_uart_clkcfg(struct bcm_platform *bp)
BCM_UART_RCLK_PLL_T1_DIV,
bhnd_pwrctl_clock_rate(BCM_PMU_PLL_TYPE(bp), n, m)
};
-
+
return (cfg);
}
@@ -247,7 +247,7 @@ bcm_get_cpufreq(struct bcm_platform *bp)
m = BCM_CHIPC_READ_4(bp, mreg);
return (bhnd_pwrctl_cpu_clock_rate(&bp->cid, pll_type, n, m));
-
+
}
/** Backplane clock frequency (in Hz) */
@@ -276,7 +276,6 @@ bcm_get_sifreq(struct bcm_platform *bp)
return (bhnd_pwrctl_si_clock_rate(&bp->cid, pll_type, n, m));
}
-
static uint32_t
bcm_pmu_read4(bus_size_t reg, void *ctx) {
Modified: head/sys/mips/broadcom/bhnd_nexus.c
==============================================================================
--- head/sys/mips/broadcom/bhnd_nexus.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/broadcom/bhnd_nexus.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -63,7 +63,6 @@ __FBSDID("$FreeBSD$");
#include "bhnd_nexusvar.h"
-
/**
* Default bhnd_nexus implementation of BHND_BUS_GET_SERVICE_REGISTRY().
*/
Modified: head/sys/mips/broadcom/uart_bus_chipc.c
==============================================================================
--- head/sys/mips/broadcom/uart_bus_chipc.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/broadcom/uart_bus_chipc.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -50,7 +50,6 @@ __FBSDID("$FreeBSD$");
#include "bcm_machdep.h"
-
static int
uart_chipc_probe(device_t dev)
{
Modified: head/sys/mips/cavium/ciu.c
==============================================================================
--- head/sys/mips/cavium/ciu.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/cavium/ciu.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -143,7 +143,7 @@ ciu_attach(device_t dev)
sc->irq_rman.rm_type = RMAN_ARRAY;
sc->irq_rman.rm_descr = "CIU IRQ";
-
+
error = rman_init(&sc->irq_rman);
if (error != 0)
return (error);
@@ -178,7 +178,7 @@ ciu_alloc_resource(device_t bus, device_t child, int t
{
struct resource *res;
struct ciu_softc *sc;
-
+
sc = device_get_softc(bus);
switch (type) {
@@ -276,7 +276,7 @@ ciu_bind_intr(device_t bus, device_t child, struct res
{
struct intr_event *event;
int irq;
-
+
irq = rman_get_start(res);
if (irq <= CIU_IRQ_EN0_END)
event = ciu_en0_intr_events[irq - CIU_IRQ_EN0_BEGIN];
@@ -295,7 +295,7 @@ ciu_describe_intr(device_t bus, device_t child, struct
mips_intrcnt_t intrcnt;
int error;
int irq;
-
+
irq = rman_get_start(res);
if (irq <= CIU_IRQ_EN0_END) {
event = ciu_en0_intr_events[irq - CIU_IRQ_EN0_BEGIN];
@@ -476,7 +476,6 @@ static device_method_t ciu_methods[] = {
DEVMETHOD(bus_add_child, bus_generic_add_child),
DEVMETHOD(bus_hinted_child, ciu_hinted_child),
-
{ 0, 0 }
};
Modified: head/sys/mips/cavium/cryptocteon/cavium_crypto.c
==============================================================================
--- head/sys/mips/cavium/cryptocteon/cavium_crypto.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/cavium/cryptocteon/cavium_crypto.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -388,7 +388,6 @@ octo_aes_cbc_encrypt(
return 0;
}
-
int
octo_aes_cbc_decrypt(
struct octo_sess *od,
@@ -645,7 +644,6 @@ octo_aes_cbc_sha1_encrypt(
mydata[1].data32[0] = *data32;
IOV_CONSUME(iov, data32, data_i, data_l);
mydata[1].data32[1] = *data32;
-
if (crypt_off <= 0) {
if (crypt_len > 0) {
Modified: head/sys/mips/cavium/cryptocteon/cryptocteon.c
==============================================================================
--- head/sys/mips/cavium/cryptocteon/cryptocteon.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/cavium/cryptocteon/cryptocteon.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -372,7 +372,6 @@ cryptocteon_process(device_t dev, struct cryptop *crp,
panic("can't happen");
}
-
/*
* setup a new explicit key
*/
@@ -381,7 +380,6 @@ cryptocteon_process(device_t dev, struct cryptop *crp,
if (crp->crp_auth_key != NULL)
cryptocteon_calc_hash(csp, crp->crp_auth_key, od);
-
if (CRYPTO_OP_IS_ENCRYPT(crp->crp_op))
(*od->octo_encrypt)(od, od->octo_iov, iovcnt, iovlen,
auth_off, auth_len, crypt_off, crypt_len, icv, ivp);
@@ -414,7 +412,6 @@ static device_method_t cryptocteon_methods[] = {
DEVMETHOD(cryptodev_probesession, cryptocteon_probesession),
DEVMETHOD(cryptodev_newsession, cryptocteon_newsession),
DEVMETHOD(cryptodev_process, cryptocteon_process),
-
{ 0, 0 }
};
Modified: head/sys/mips/cavium/if_octm.c
==============================================================================
--- head/sys/mips/cavium/if_octm.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/cavium/if_octm.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -99,7 +99,6 @@ static device_method_t octm_methods[] = {
DEVMETHOD(device_attach, octm_attach),
DEVMETHOD(device_detach, octm_detach),
DEVMETHOD(device_shutdown, octm_shutdown),
-
{ 0, 0 }
};
@@ -464,7 +463,7 @@ octm_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data
}
sc->sc_flags = ifp->if_flags;
return (0);
-
+
case SIOCSIFCAP:
/*
* Just change the capabilities in software, currently none
@@ -484,7 +483,7 @@ octm_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data
if (error != 0)
return (error);
return (0);
-
+
default:
error = ether_ioctl(ifp, cmd, data);
if (error != 0)
@@ -512,7 +511,6 @@ octm_rx_intr(void *arg)
device_printf(sc->sc_dev, "no memory for receive mbuf.\n");
return;
}
-
len = cvmx_mgmt_port_receive(sc->sc_port, MCLBYTES, m->m_data);
if (len > 0) {
Modified: head/sys/mips/cavium/obio.c
==============================================================================
--- head/sys/mips/cavium/obio.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/cavium/obio.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -165,7 +165,7 @@ obio_alloc_resource(device_t bus, device_t child, int
rman_set_rid(rv, *rid);
rman_set_bustag(rv, bt);
rman_set_bushandle(rv, bh);
-
+
if (0) {
if (bus_activate_resource(child, type, *rid, rv)) {
rman_release_resource(rv);
Modified: head/sys/mips/cavium/obiovar.h
==============================================================================
--- head/sys/mips/cavium/obiovar.h Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/cavium/obiovar.h Tue Sep 1 21:21:19 2020 (r365076)
@@ -51,7 +51,7 @@ struct obio_softc {
bus_size_t oba_size; /* size of device */
struct rman oba_rman;
struct rman oba_irq_rman;
-
+
};
#endif /* _OCTEON_OBIOVAR_H_ */
Modified: head/sys/mips/cavium/octe/cavium-ethernet.h
==============================================================================
--- head/sys/mips/cavium/octe/cavium-ethernet.h Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/cavium/octe/cavium-ethernet.h Tue Sep 1 21:21:19 2020 (r365076)
@@ -4,7 +4,6 @@ SPDX-License-Identifier: BSD-3-Clause
Copyright (c) 2003-2007 Cavium Networks (support at cavium.com). All rights
reserved.
-
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:
@@ -89,7 +88,6 @@ typedef struct {
struct mtx tx_mtx;
} cvm_oct_private_t;
-
/**
* Free a work queue entry received in a intercept callback.
Modified: head/sys/mips/cavium/octe/ethernet-common.c
==============================================================================
--- head/sys/mips/cavium/octe/ethernet-common.c Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/cavium/octe/ethernet-common.c Tue Sep 1 21:21:19 2020 (r365076)
@@ -4,7 +4,6 @@ SPDX-License-Identifier: BSD-3-Clause
Copyright (c) 2003-2007 Cavium Networks (support at cavium.com). All rights
reserved.
-
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:
@@ -91,7 +90,6 @@ void cvm_oct_common_set_multicast_list(struct ifnet *i
}
}
-
/**
* Assign a MAC addres from the pool of available MAC addresses
* Can return as either a 64-bit value and/or 6 octets.
@@ -116,7 +114,7 @@ int cvm_assign_mac_address(uint64_t *macp, uint8_t *oc
if (cvm_oct_mac_addr_offset >= cvmx_sysinfo_get()->mac_addr_count)
return ENXIO; /* Out of addresses to assign */
-
+
if (macp)
*macp = cvm_oct_mac_addr;
if (octets)
@@ -165,7 +163,6 @@ void cvm_oct_common_set_mac_address(struct ifnet *ifp,
}
}
-
/**
* Change the link MTU. Unimplemented
*
@@ -210,7 +207,6 @@ int cvm_oct_common_change_mtu(struct ifnet *ifp, int n
return 0;
}
-
/**
* Enable port.
*/
@@ -240,7 +236,6 @@ int cvm_oct_common_open(struct ifnet *ifp)
return 0;
}
-
/**
* Disable port.
*/
@@ -298,7 +293,6 @@ void cvm_oct_common_poll(struct ifnet *ifp)
priv->need_link_update = 1;
}
-
/**
* Per network device initialization
*
@@ -344,4 +338,3 @@ void cvm_oct_common_uninit(struct ifnet *ifp)
{
/* Currently nothing to do */
}
-
Modified: head/sys/mips/cavium/octe/ethernet-common.h
==============================================================================
--- head/sys/mips/cavium/octe/ethernet-common.h Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/cavium/octe/ethernet-common.h Tue Sep 1 21:21:19 2020 (r365076)
@@ -4,7 +4,6 @@ SPDX-License-Identifier: BSD-3-Clause
Copyright (c) 2003-2007 Cavium Networks (support at cavium.com). All rights
reserved.
-
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:
@@ -54,4 +53,3 @@ int cvm_oct_sgmii_init(struct ifnet *ifp);
int cvm_oct_spi_init(struct ifnet *ifp);
void cvm_oct_spi_uninit(struct ifnet *ifp);
int cvm_oct_xaui_init(struct ifnet *ifp);
-
Modified: head/sys/mips/cavium/octe/ethernet-defines.h
==============================================================================
--- head/sys/mips/cavium/octe/ethernet-defines.h Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/cavium/octe/ethernet-defines.h Tue Sep 1 21:21:19 2020 (r365076)
@@ -4,7 +4,6 @@ SPDX-License-Identifier: BSD-3-Clause
Copyright (c) 2003-2007 Cavium Networks (support at cavium.com). All rights
reserved.
-
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:
@@ -50,4 +49,3 @@ AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROM
#define FAU_NUM_PACKET_BUFFERS_TO_FREE (CVMX_FAU_REG_END - sizeof(uint32_t))
#define TOTAL_NUMBER_OF_PORTS (CVMX_PIP_NUM_INPUT_PORTS+1)
-
Modified: head/sys/mips/cavium/octe/ethernet-headers.h
==============================================================================
--- head/sys/mips/cavium/octe/ethernet-headers.h Tue Sep 1 21:21:03 2020 (r365075)
+++ head/sys/mips/cavium/octe/ethernet-headers.h Tue Sep 1 21:21:19 2020 (r365076)
@@ -4,7 +4,6 @@ SPDX-License-Identifier: BSD-3-Clause
Copyright (c) 2003-2007 Cavium Networks (support at cavium.com). All rights
reserved.
*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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