svn commit: r352749 - stable/12/sys/dev/jme

[Mark Johnston]

Author: markj
Date: Thu Sep 26 15:37:40 2019
New Revision: 352749
URL: https://svnweb.freebsd.org/changeset/base/352749

Log:
  MFC r352625:
  Revert r316820.
  
  PR:	233952

Modified:
  stable/12/sys/dev/jme/if_jme.c
Directory Properties:
  stable/12/   (props changed)

Modified: stable/12/sys/dev/jme/if_jme.c
==============================================================================
--- stable/12/sys/dev/jme/if_jme.c	Thu Sep 26 15:35:35 2019	(r352748)
+++ stable/12/sys/dev/jme/if_jme.c	Thu Sep 26 15:37:40 2019	(r352749)
@@ -559,7 +559,7 @@ jme_map_intr_vector(struct jme_softc *sc)
 	bzero(map, sizeof(map));
 
 	/* Map Tx interrupts source to MSI/MSIX vector 2. */
-	map[MSINUM_REG_INDEX(N_INTR_TXQ0_COMP)] |=
+	map[MSINUM_REG_INDEX(N_INTR_TXQ0_COMP)] =
 	    MSINUM_INTR_SOURCE(2, N_INTR_TXQ0_COMP);
 	map[MSINUM_REG_INDEX(N_INTR_TXQ1_COMP)] |=
 	    MSINUM_INTR_SOURCE(2, N_INTR_TXQ1_COMP);
@@ -581,37 +581,37 @@ jme_map_intr_vector(struct jme_softc *sc)
 	    MSINUM_INTR_SOURCE(2, N_INTR_TXQ_COAL_TO);
 
 	/* Map Rx interrupts source to MSI/MSIX vector 1. */
-	map[MSINUM_REG_INDEX(N_INTR_RXQ0_COMP)] |=
+	map[MSINUM_REG_INDEX(N_INTR_RXQ0_COMP)] =
 	    MSINUM_INTR_SOURCE(1, N_INTR_RXQ0_COMP);
-	map[MSINUM_REG_INDEX(N_INTR_RXQ1_COMP)] |=
+	map[MSINUM_REG_INDEX(N_INTR_RXQ1_COMP)] =
 	    MSINUM_INTR_SOURCE(1, N_INTR_RXQ1_COMP);
-	map[MSINUM_REG_INDEX(N_INTR_RXQ2_COMP)] |=
+	map[MSINUM_REG_INDEX(N_INTR_RXQ2_COMP)] =
 	    MSINUM_INTR_SOURCE(1, N_INTR_RXQ2_COMP);
-	map[MSINUM_REG_INDEX(N_INTR_RXQ3_COMP)] |=
+	map[MSINUM_REG_INDEX(N_INTR_RXQ3_COMP)] =
 	    MSINUM_INTR_SOURCE(1, N_INTR_RXQ3_COMP);
-	map[MSINUM_REG_INDEX(N_INTR_RXQ0_DESC_EMPTY)] |=
+	map[MSINUM_REG_INDEX(N_INTR_RXQ0_DESC_EMPTY)] =
 	    MSINUM_INTR_SOURCE(1, N_INTR_RXQ0_DESC_EMPTY);
-	map[MSINUM_REG_INDEX(N_INTR_RXQ1_DESC_EMPTY)] |=
+	map[MSINUM_REG_INDEX(N_INTR_RXQ1_DESC_EMPTY)] =
 	    MSINUM_INTR_SOURCE(1, N_INTR_RXQ1_DESC_EMPTY);
-	map[MSINUM_REG_INDEX(N_INTR_RXQ2_DESC_EMPTY)] |=
+	map[MSINUM_REG_INDEX(N_INTR_RXQ2_DESC_EMPTY)] =
 	    MSINUM_INTR_SOURCE(1, N_INTR_RXQ2_DESC_EMPTY);
-	map[MSINUM_REG_INDEX(N_INTR_RXQ3_DESC_EMPTY)] |=
+	map[MSINUM_REG_INDEX(N_INTR_RXQ3_DESC_EMPTY)] =
 	    MSINUM_INTR_SOURCE(1, N_INTR_RXQ3_DESC_EMPTY);
-	map[MSINUM_REG_INDEX(N_INTR_RXQ0_COAL)] |=
+	map[MSINUM_REG_INDEX(N_INTR_RXQ0_COAL)] =
 	    MSINUM_INTR_SOURCE(1, N_INTR_RXQ0_COAL);
-	map[MSINUM_REG_INDEX(N_INTR_RXQ1_COAL)] |=
+	map[MSINUM_REG_INDEX(N_INTR_RXQ1_COAL)] =
 	    MSINUM_INTR_SOURCE(1, N_INTR_RXQ1_COAL);
-	map[MSINUM_REG_INDEX(N_INTR_RXQ2_COAL)] |=
+	map[MSINUM_REG_INDEX(N_INTR_RXQ2_COAL)] =
 	    MSINUM_INTR_SOURCE(1, N_INTR_RXQ2_COAL);
-	map[MSINUM_REG_INDEX(N_INTR_RXQ3_COAL)] |=
+	map[MSINUM_REG_INDEX(N_INTR_RXQ3_COAL)] =
 	    MSINUM_INTR_SOURCE(1, N_INTR_RXQ3_COAL);
-	map[MSINUM_REG_INDEX(N_INTR_RXQ0_COAL_TO)] |=
+	map[MSINUM_REG_INDEX(N_INTR_RXQ0_COAL_TO)] =
 	    MSINUM_INTR_SOURCE(1, N_INTR_RXQ0_COAL_TO);
-	map[MSINUM_REG_INDEX(N_INTR_RXQ1_COAL_TO)] |=
+	map[MSINUM_REG_INDEX(N_INTR_RXQ1_COAL_TO)] =
 	    MSINUM_INTR_SOURCE(1, N_INTR_RXQ1_COAL_TO);
-	map[MSINUM_REG_INDEX(N_INTR_RXQ2_COAL_TO)] |=
+	map[MSINUM_REG_INDEX(N_INTR_RXQ2_COAL_TO)] =
 	    MSINUM_INTR_SOURCE(1, N_INTR_RXQ2_COAL_TO);
-	map[MSINUM_REG_INDEX(N_INTR_RXQ3_COAL_TO)] |=
+	map[MSINUM_REG_INDEX(N_INTR_RXQ3_COAL_TO)] =
 	    MSINUM_INTR_SOURCE(1, N_INTR_RXQ3_COAL_TO);
 
 	/* Map all other interrupts source to MSI/MSIX vector 0. */