svn commit: r344437 - head/sys/dev/ntb/ntb_hw
Enji Cooper
yaneurabeya at gmail.com
Thu Feb 21 18:22:44 UTC 2019
> On Feb 21, 2019, at 10:19 AM, Alexander Motin <mav at FreeBSD.org> wrote:
>
> On 21.02.2019 13:13, Enji Cooper wrote:
>>
>>> On Feb 21, 2019, at 6:10 AM, Alexander Motin <mav at FreeBSD.org> wrote:
>>>
>>> Author: mav
>>> Date: Thu Feb 21 14:10:14 2019
>>> New Revision: 344437
>>> URL: https://svnweb.freebsd.org/changeset/base/344437
>>>
>>> Log:
>>> Allow I/OAT of present Xeon E5/E7 to work thorugh PLX NTB.
>>>
>>> Its a hack, we can't know/list all DMA engines, but this covers all
>>> I/OAT of Xeon E5/E7 at least from Sandy Bridge till Skylake I saw.
>>>
>>> MFC after: 1 week
>>> Sponsored by: iXsystems, Inc.
>>>
>>> Modified:
>>> head/sys/dev/ntb/ntb_hw/ntb_hw_plx.c
>>>
>>> Modified: head/sys/dev/ntb/ntb_hw/ntb_hw_plx.c
>>> ==============================================================================
>>> --- head/sys/dev/ntb/ntb_hw/ntb_hw_plx.c Thu Feb 21 12:13:27 2019 (r344436)
>>> +++ head/sys/dev/ntb/ntb_hw/ntb_hw_plx.c Thu Feb 21 14:10:14 2019 (r344437)
>>> @@ -202,16 +202,24 @@ ntb_plx_init(device_t dev)
>>> if (sc->alut)
>>> PNTX_WRITE(sc, 0xc94, 0);
>>>
>>> - /* Enable Link Interface LUT entries 0/1 for peer 0/1. */
>>> - PNTX_WRITE(sc, 0xdb4, 0x00090001);
>>> + /* Enable all Link Interface LUT entries for peer. */
>>> + for (i = 0; i < 32; i += 2) {
>>
>> Is `32` written down in the NTB spec somewhere? Should it be a #define, or should it be programmatically adjusted based on the CPU?
>
> It is a property of the hardware, it has 32 LUT entries.
Cool! I was thinking that this is probably a number that can change in the future, as processor designs evolve.
> #define would be good indeed, but the code is already full of other numeric constants.
Yes, but it would make the code more readable/easier to reason through. That’s where my concern is coming from.
Also, thank you very much for working on this :).
Cheers!
-Enji
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