svn commit: r341204 - head/sys/dev/sfxge/common

[Andrew Rybchenko]

Author: arybchik
Date: Thu Nov 29 06:45:26 2018
New Revision: 341204
URL: https://svnweb.freebsd.org/changeset/base/341204

Log:
  sfxge(4): detect equal stride super-buffer support
  
  Equal stride super-buffer Rx mode is supported on Medford2 by
  DPDK firmware variant.
  
  Sponsored by:   Solarflare Communications, Inc.
  Differential Revision:  https://reviews.freebsd.org/D18235

Modified:
  head/sys/dev/sfxge/common/ef10_nic.c
  head/sys/dev/sfxge/common/efx.h
  head/sys/dev/sfxge/common/siena_nic.c

Modified: head/sys/dev/sfxge/common/ef10_nic.c
==============================================================================
--- head/sys/dev/sfxge/common/ef10_nic.c	Thu Nov 29 06:45:15 2018	(r341203)
+++ head/sys/dev/sfxge/common/ef10_nic.c	Thu Nov 29 06:45:26 2018	(r341204)
@@ -1141,6 +1141,12 @@ ef10_get_datapath_caps(
 	else
 		encp->enc_rx_var_packed_stream_supported = B_FALSE;
 
+	/* Check if the firmware supports equal stride super-buffer mode */
+	if (CAP_FLAGS2(req, EQUAL_STRIDE_SUPER_BUFFER))
+		encp->enc_rx_es_super_buffer_supported = B_TRUE;
+	else
+		encp->enc_rx_es_super_buffer_supported = B_FALSE;
+
 	/* Check if the firmware supports FW subvariant w/o Tx checksumming */
 	if (CAP_FLAGS2(req, FW_SUBVARIANT_NO_TX_CSUM))
 		encp->enc_fw_subvariant_no_tx_csum_supported = B_TRUE;

Modified: head/sys/dev/sfxge/common/efx.h
==============================================================================
--- head/sys/dev/sfxge/common/efx.h	Thu Nov 29 06:45:15 2018	(r341203)
+++ head/sys/dev/sfxge/common/efx.h	Thu Nov 29 06:45:26 2018	(r341204)
@@ -1298,6 +1298,7 @@ typedef struct efx_nic_cfg_s {
 	boolean_t		enc_init_evq_v2_supported;
 	boolean_t		enc_rx_packed_stream_supported;
 	boolean_t		enc_rx_var_packed_stream_supported;
+	boolean_t		enc_rx_es_super_buffer_supported;
 	boolean_t		enc_fw_subvariant_no_tx_csum_supported;
 	boolean_t		enc_pm_and_rxdp_counters;
 	boolean_t		enc_mac_stats_40g_tx_size_bins;

Modified: head/sys/dev/sfxge/common/siena_nic.c
==============================================================================
--- head/sys/dev/sfxge/common/siena_nic.c	Thu Nov 29 06:45:15 2018	(r341203)
+++ head/sys/dev/sfxge/common/siena_nic.c	Thu Nov 29 06:45:26 2018	(r341204)
@@ -190,6 +190,7 @@ siena_board_cfg(
 	encp->enc_allow_set_mac_with_installed_filters = B_TRUE;
 	encp->enc_rx_packed_stream_supported = B_FALSE;
 	encp->enc_rx_var_packed_stream_supported = B_FALSE;
+	encp->enc_rx_es_super_buffer_supported = B_FALSE;
 	encp->enc_fw_subvariant_no_tx_csum_supported = B_FALSE;
 
 	/* Siena supports two 10G ports, and 8 lanes of PCIe Gen2 */