svn commit: r341114 - head/sys/dev/sfxge/common

[Andrew Rybchenko]

Author: arybchik
Date: Wed Nov 28 06:55:24 2018
New Revision: 341114
URL: https://svnweb.freebsd.org/changeset/base/341114

Log:
  sfxge(4): move Rx config to ef10 NIC board config
  
  Submitted by:   Andy Moreton <amoreton at solarflare.com>
  Sponsored by:   Solarflare Communications, Inc.
  Differential Revision:  https://reviews.freebsd.org/D18190

Modified:
  head/sys/dev/sfxge/common/ef10_nic.c
  head/sys/dev/sfxge/common/hunt_nic.c
  head/sys/dev/sfxge/common/medford2_nic.c   (contents, props changed)
  head/sys/dev/sfxge/common/medford_nic.c

Modified: head/sys/dev/sfxge/common/ef10_nic.c
==============================================================================
--- head/sys/dev/sfxge/common/ef10_nic.c	Wed Nov 28 06:55:12 2018	(r341113)
+++ head/sys/dev/sfxge/common/ef10_nic.c	Wed Nov 28 06:55:24 2018	(r341114)
@@ -1662,6 +1662,17 @@ ef10_nic_board_cfg(
 	if ((rc = ef10_get_datapath_caps(enp)) != 0)
 		goto fail8;
 
+	/* Alignment for WPTR updates */
+	encp->enc_rx_push_align = EF10_RX_WPTR_ALIGN;
+
+	/*
+	 * Maximum number of exclusive RSS contexts. EF10 hardware supports 64
+	 * in total, but 6 are reserved for shared contexts. They are a global
+	 * resource so not all may be available.
+	 */
+	encp->enc_rx_scale_max_exclusive_contexts = 64 - 6;
+
+
 	/* Get remaining controller-specific board config */
 	if ((rc = enop->eno_board_cfg(enp)) != 0)
 		if (rc != EACCES)

Modified: head/sys/dev/sfxge/common/hunt_nic.c
==============================================================================
--- head/sys/dev/sfxge/common/hunt_nic.c	Wed Nov 28 06:55:12 2018	(r341113)
+++ head/sys/dev/sfxge/common/hunt_nic.c	Wed Nov 28 06:55:24 2018	(r341114)
@@ -232,16 +232,6 @@ hunt_board_cfg(
 	encp->enc_rx_buf_align_start = 1;
 	encp->enc_rx_buf_align_end = 64; /* RX DMA end padding */
 
-	/* Alignment for WPTR updates */
-	encp->enc_rx_push_align = EF10_RX_WPTR_ALIGN;
-
-	/*
-	 * Maximum number of exclusive RSS contexts which can be allocated. The
-	 * hardware supports 64, but 6 are reserved for shared contexts. They
-	 * are a global resource so not all may be available.
-	 */
-	encp->enc_rx_scale_max_exclusive_contexts = 58;
-
 	encp->enc_tx_dma_desc_size_max = EFX_MASK32(ESF_DZ_RX_KER_BYTE_CNT);
 	/* No boundary crossing limits */
 	encp->enc_tx_dma_desc_boundary = 0;

Modified: head/sys/dev/sfxge/common/medford2_nic.c
==============================================================================
--- head/sys/dev/sfxge/common/medford2_nic.c	Wed Nov 28 06:55:12 2018	(r341113)
+++ head/sys/dev/sfxge/common/medford2_nic.c	Wed Nov 28 06:55:24 2018	(r341114)
@@ -166,16 +166,6 @@ medford2_board_cfg(
 	}
 	encp->enc_rx_buf_align_end = end_padding;
 
-	/* Alignment for WPTR updates */
-	encp->enc_rx_push_align = EF10_RX_WPTR_ALIGN;
-
-	/*
-	 * Maximum number of exclusive RSS contexts which can be allocated. The
-	 * hardware supports 64, but 6 are reserved for shared contexts. They
-	 * are a global resource so not all may be available.
-	 */
-	encp->enc_rx_scale_max_exclusive_contexts = 58;
-
 	encp->enc_tx_dma_desc_size_max = EFX_MASK32(ESF_DZ_RX_KER_BYTE_CNT);
 	/* No boundary crossing limits */
 	encp->enc_tx_dma_desc_boundary = 0;

Modified: head/sys/dev/sfxge/common/medford_nic.c
==============================================================================
--- head/sys/dev/sfxge/common/medford_nic.c	Wed Nov 28 06:55:12 2018	(r341113)
+++ head/sys/dev/sfxge/common/medford_nic.c	Wed Nov 28 06:55:24 2018	(r341114)
@@ -163,16 +163,6 @@ medford_board_cfg(
 	}
 	encp->enc_rx_buf_align_end = end_padding;
 
-	/* Alignment for WPTR updates */
-	encp->enc_rx_push_align = EF10_RX_WPTR_ALIGN;
-
-	/*
-	 * Maximum number of exclusive RSS contexts which can be allocated. The
-	 * hardware supports 64, but 6 are reserved for shared contexts. They
-	 * are a global resource so not all may be available.
-	 */
-	encp->enc_rx_scale_max_exclusive_contexts = 58;
-
 	encp->enc_tx_dma_desc_size_max = EFX_MASK32(ESF_DZ_RX_KER_BYTE_CNT);
 	/* No boundary crossing limits */
 	encp->enc_tx_dma_desc_boundary = 0;