svn commit: r334151 - in stable/11/sys/x86: include x86

[Konstantin Belousov]

Author: kib
Date: Thu May 24 12:14:14 2018
New Revision: 334151
URL: https://svnweb.freebsd.org/changeset/base/334151

Log:
  MFC r334004:
  Add definition for Intel Speculative Store Bypass Disable MSR bits.
  
  Security:	CVE-2018-3639
  Approved by:	re (gjb)

Modified:
  stable/11/sys/x86/include/specialreg.h
  stable/11/sys/x86/x86/identcpu.c
Directory Properties:
  stable/11/   (props changed)

Modified: stable/11/sys/x86/include/specialreg.h
==============================================================================
--- stable/11/sys/x86/include/specialreg.h	Thu May 24 11:59:33 2018	(r334150)
+++ stable/11/sys/x86/include/specialreg.h	Thu May 24 12:14:14 2018	(r334151)
@@ -388,10 +388,12 @@
 #define	CPUID_STDEXT3_IBPB	0x04000000
 #define	CPUID_STDEXT3_STIBP	0x08000000
 #define	CPUID_STDEXT3_ARCH_CAP	0x20000000
+#define	CPUID_STDEXT3_SSBD	0x80000000
 
 /* MSR IA32_ARCH_CAP(ABILITIES) bits */
 #define	IA32_ARCH_CAP_RDCL_NO	0x00000001
 #define	IA32_ARCH_CAP_IBRS_ALL	0x00000002
+#define	IA32_ARCH_CAP_SSBD_NO	0x00000004
 
 /*
  * CPUID manufacturers identifiers
@@ -585,6 +587,7 @@
 /* MSR IA32_SPEC_CTRL */
 #define	IA32_SPEC_CTRL_IBRS	0x00000001
 #define	IA32_SPEC_CTRL_STIBP	0x00000002
+#define	IA32_SPEC_CTRL_SSBD	0x00000004
 
 /* MSR IA32_PRED_CMD */
 #define	IA32_PRED_CMD_IBPB_BARRIER	0x0000000000000001ULL

Modified: stable/11/sys/x86/x86/identcpu.c
==============================================================================
--- stable/11/sys/x86/x86/identcpu.c	Thu May 24 11:59:33 2018	(r334150)
+++ stable/11/sys/x86/x86/identcpu.c	Thu May 24 12:14:14 2018	(r334151)
@@ -989,6 +989,7 @@ printcpuinfo(void)
 				       "\033IBPB"
 				       "\034STIBP"
 				       "\036ARCH_CAP"
+				       "\040SSBD"
 				       );
 			}