svn commit: r328278 - head/sys/powerpc/powernv

[Wojciech Macek]

Author: wma
Date: Tue Jan 23 08:07:00 2018
New Revision: 328278
URL: https://svnweb.freebsd.org/changeset/base/328278

Log:
  PowerNV: send MSI_EOI always after MSI unmask
  
  MSI/MSI-x interrupts are edge-triggered. If an interrupt
  arrives when IRQ line is masked, it will be lost and will
  never recover. Perform MSI_EOI always after unmask to give
  a chance for PHB/XICS to send an interrupt again if MSI/MSI-x
  pending bit is set in MSI/MSI-x BAR space.
  
  Submitted by:          Wojciech Macek <wma at semihalf.org>
  Obtained from:         Semihalf
  Sponsored by:          IBM, QCM Technologies

Modified:
  head/sys/powerpc/powernv/opal_pci.c

Modified: head/sys/powerpc/powernv/opal_pci.c
==============================================================================
--- head/sys/powerpc/powernv/opal_pci.c	Tue Jan 23 05:03:26 2018	(r328277)
+++ head/sys/powerpc/powernv/opal_pci.c	Tue Jan 23 08:07:00 2018	(r328278)
@@ -601,7 +601,13 @@ static void opalpic_pic_mask(device_t dev, u_int irq)
 
 static void opalpic_pic_unmask(device_t dev, u_int irq)
 {
+	struct opalpci_softc *sc;
+
+	sc = device_get_softc(dev);
+
 	PIC_UNMASK(root_pic, irq);
+
+	opal_call(OPAL_PCI_MSI_EOI, sc->phb_id, irq);
 }