svn commit: r325651 - in head/sys/dev/mlx5: . mlx5_core

[Hans Petter Selasky]

Author: hselasky
Date: Fri Nov 10 13:38:43 2017
New Revision: 325651
URL: https://svnweb.freebsd.org/changeset/base/325651

Log:
  Set ATOMIC endian mode in mlx5 core.
  
  The hardware is capable of 2 requestor endianness modes for standard 8
  byte atomics: BE (0x0) and host endianness (0x1). Read the supported
  modes from hca atomic capabilities and configure HW to host endianness
  mode if supported.
  
  Sponsored by:	Mellanox Technologies
  MFC after:	1 week

Modified:
  head/sys/dev/mlx5/mlx5_core/mlx5_main.c
  head/sys/dev/mlx5/mlx5_ifc.h

Modified: head/sys/dev/mlx5/mlx5_core/mlx5_main.c
==============================================================================
--- head/sys/dev/mlx5/mlx5_core/mlx5_main.c	Fri Nov 10 13:30:14 2017	(r325650)
+++ head/sys/dev/mlx5/mlx5_core/mlx5_main.c	Fri Nov 10 13:38:43 2017	(r325651)
@@ -74,6 +74,11 @@ struct mlx5_device_context {
 	void		       *context;
 };
 
+enum {
+	MLX5_ATOMIC_REQ_MODE_BE = 0x0,
+	MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS = 0x1,
+};
+
 static struct mlx5_profile profiles[] = {
 	[0] = {
 		.mask           = 0,
@@ -393,6 +398,53 @@ query_ex:
 	return err;
 }
 
+static int handle_hca_cap_atomic(struct mlx5_core_dev *dev)
+{
+	void *set_ctx;
+	void *set_hca_cap;
+	int set_sz = MLX5_ST_SZ_BYTES(set_hca_cap_in);
+	int req_endianness;
+	int err;
+
+	if (MLX5_CAP_GEN(dev, atomic)) {
+		err = mlx5_core_get_caps(dev, MLX5_CAP_ATOMIC,
+					 HCA_CAP_OPMOD_GET_MAX);
+		if (err)
+			return err;
+
+		err = mlx5_core_get_caps(dev, MLX5_CAP_ATOMIC,
+					 HCA_CAP_OPMOD_GET_CUR);
+		if (err)
+			return err;
+	} else {
+		return 0;
+	}
+
+	req_endianness =
+		MLX5_CAP_ATOMIC(dev,
+				supported_atomic_req_8B_endianess_mode_1);
+
+	if (req_endianness != MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS)
+		return 0;
+
+	set_ctx = kzalloc(set_sz, GFP_KERNEL);
+	if (!set_ctx)
+		return -ENOMEM;
+
+	MLX5_SET(set_hca_cap_in, set_ctx, op_mod,
+		 MLX5_SET_HCA_CAP_OP_MOD_ATOMIC << 1);
+	set_hca_cap = MLX5_ADDR_OF(set_hca_cap_in, set_ctx, capability);
+
+	/* Set requestor to host endianness */
+	MLX5_SET(atomic_caps, set_hca_cap, atomic_req_8B_endianess_mode,
+		 MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS);
+
+	err = set_caps(dev, set_ctx, set_sz);
+
+	kfree(set_ctx);
+	return err;
+}
+
 static int set_hca_ctrl(struct mlx5_core_dev *dev)
 {
 	struct mlx5_reg_host_endianess he_in;
@@ -717,15 +769,21 @@ static int mlx5_dev_init(struct mlx5_core_dev *dev, st
 		goto err_pagealloc_stop;
 	}
 
+	err = set_hca_ctrl(dev);
+	if (err) {
+		device_printf((&pdev->dev)->bsddev, "ERR: ""set_hca_ctrl failed\n");
+		goto reclaim_boot_pages;
+	}
+
 	err = handle_hca_cap(dev);
 	if (err) {
 		device_printf((&pdev->dev)->bsddev, "ERR: ""handle_hca_cap failed\n");
 		goto reclaim_boot_pages;
 	}
 
-	err = set_hca_ctrl(dev);
+	err = handle_hca_cap_atomic(dev);
 	if (err) {
-		device_printf((&pdev->dev)->bsddev, "ERR: ""set_hca_ctrl failed\n");
+		device_printf((&pdev->dev)->bsddev, "ERR: ""handle_hca_cap_atomic failed\n");
 		goto reclaim_boot_pages;
 	}
 

Modified: head/sys/dev/mlx5/mlx5_ifc.h
==============================================================================
--- head/sys/dev/mlx5/mlx5_ifc.h	Fri Nov 10 13:30:14 2017	(r325650)
+++ head/sys/dev/mlx5/mlx5_ifc.h	Fri Nov 10 13:38:43 2017	(r325651)
@@ -74,6 +74,11 @@ enum {
 };
 
 enum {
+	MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE        = 0x0,
+	MLX5_SET_HCA_CAP_OP_MOD_ATOMIC                = 0x3,
+};
+
+enum {
 	MLX5_CMD_OP_QUERY_HCA_CAP                 = 0x100,
 	MLX5_CMD_OP_QUERY_ADAPTER                 = 0x101,
 	MLX5_CMD_OP_INIT_HCA                      = 0x102,