svn commit: r320200 - head/sys/boot/fdt/dts/arm
Zbigniew Bodek
zbb at FreeBSD.org
Wed Jun 21 18:28:38 UTC 2017
Author: zbb
Date: Wed Jun 21 18:28:37 2017
New Revision: 320200
URL: https://svnweb.freebsd.org/changeset/base/320200
Log:
Enable arm,io-coherent property of PL310 L2 cache on Armada 38x platforms
This patch disables outer cache sync in PL310 driver
by adding "arm,io-coherent" property. In addition to
the previous patches it was the last bit needed
for enabling proper operation of Armada 38x SoCs
with the IO cache coherency.
Submitted by: Michal Mazur <mkm at semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Reviewed by: mmel
Differential revision: https://reviews.freebsd.org/D11204
Modified:
head/sys/boot/fdt/dts/arm/armada-38x.dtsi
Modified: head/sys/boot/fdt/dts/arm/armada-38x.dtsi
==============================================================================
--- head/sys/boot/fdt/dts/arm/armada-38x.dtsi Wed Jun 21 18:27:05 2017 (r320199)
+++ head/sys/boot/fdt/dts/arm/armada-38x.dtsi Wed Jun 21 18:28:37 2017 (r320200)
@@ -177,6 +177,7 @@
reg = <0x8000 0x1000>;
cache-unified;
cache-level = <2>;
+ arm,io-coherent;
};
scu at c000 {
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